2 layers88.9 × 114.3 mm Raw, the printed circuit board in 3D

Raw

resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…

Open in PCBKit

Size: 88.9 × 114.3 mm
Copper layers: 2
Thickness: 1.6 mm
Parts: 190
Nets: 172
Pads: 834
Tracks, vias: 5,330, 346
Pours: 9
Routed: Yes
KiCad: KiCad 5 (file 20171130)
Created: 28 Mar 2023
Updated: 18 Jan 2024

Overview

Raw is an open-source printed circuit board by PCBench, from the PCBench/PCBench repository on GitHub, published under the MIT licence. It is a 2-layer board of 88.9 × 114.3 mm with 190 parts on 172 nets, routed with 5,330 tracks and 346 vias.

It is built around the SIP32408EVB, ST485EBDR and PLR135/T8, with the RT8299AZQW, FT2232HL and NC7WZ14P6 among its other parts. Its parts include 85 capacitors, 38 resistors, 14 ICs, 9 diodes and 7 connectors. It belongs with the FPGA and CPLD boards of this library.

Main components

README

README.md

PCBench: A Dataset for Printed Circuit Board Routing

PCBench is a dataset for PCB routing task, it includes a dataset consisting of 164 printed circuit boards (PCB), a data augmentation script to expand the dataset for supervised learning (SL) tasks, and a reinforcement learning (RL) environment.

Dataset

Folder Structure

All the PCB designs in our dataset are stored in the folder PCBs, where each PCB design is stored in a subfolder named {author/org}_{PCB_name}_{design_version(optional)}. Below is the folder structure of the dataset.

text

├── PCBs
│   ├── master_metadata.json
│   ├── subfolder1
│   │   ├── raw.kicad_pcb
│   │   ├── processed.kicad_pcb
│   │   ├── final.json
│   │   ├── metadata.json
│   │   ├── visual.png
│   ├── subfolder2
│   │   ├── raw.kicad_pcb
│   │   ├── processed.kicad_pcb
│   │   ├── final.json
│   │   ├── metadata.json
│   │   ├── visual.png
│   ├── ...

The raw.kicad_pcb is the raw PCB design file, process.kicad_pcb is the file after cleaning up, final.json stores only routing-related information used for ML tasks. metadata.json stores the meta information for each single PCB design. visual.png is a visualization of each single PCB design. master_meta.json contains metadata of all PCBs and global-level information.

PCB Routing Description Language (PCB-RDL)

We propose a JSON specification (final.json for each PCB design) called the PCB Routing Description Language (PCB-RDL) that expresses a PCB routing problem and its solutions intuitively using basic concepts in order to facilitate research into automated PCB routing using ML. Following figure shows is an example of PCB with marked components in PCB-RDL (Left) and it corrsponding PCB-RDL (Right).

PCB example

Data Augmentation

Run

The augmentation data can be generated with the script Scripts/Data_augmentation/augmentation.py. To generate 3 samples by randomly extracting 50% nets from the PCB 1Bitsy_1bitsy, please run the following command

text

cd Scripts/Data_augmentation/
python augmentation.py --num_samples 3 --net_ratio 0.5 --pcb_name 1Bitsy_1bitsy

Output

All the generated PCBs will be stored in the folder named augmented_data under Scripts/Data_augmentation/. In augmented_data, all the generated samples will be stored in a subfolder with the name of selected PCB. Each generated sample has the name sample_index.json. For example, the above command will generate the following file under Scripts/Data_augmentation/

text

├── augmented_data
│   ├── 1Bitsy_1bitsy
│   │   ├── 1.json
│   │   ├── 2.json
│   │   ├── 3.json

RL environment

Installation

The RL environment requires Python >= 3.7. You can simply install the environment with the following commands:

text

git clone https://github.com/PCBench/PCBench.git
cd PCBench
python setup.py install

After installation, open a Python console and type

text

from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnv

If no error occurs, you have successfully installed the PCB routing environment.

API Usage

The following content shows an example of API usage of PCBRoutingEnv.

text

from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnv
import random

resolution = [0.5, 0.5]
pcb_folder = '../PCBs/'
pcb_names = ["1Bitsy_1bitsy"]
iters = 30
env = PCBRoutingEnv(resolution=resolution, pcb_folder=pcb_folder, pcb_names=pcb_names)
obs, info = env.reset()
for _ in range(iters):
    act = random.randint(0,5)
    obs, rew, terminal, _, info = env.step(act)
    if terminal:
        env.reset()

You can find more examples of customizing functions of reward and state observation from RLEnv/examples.ipynb.

Parts

190

Qty	Value	Footprint	References
44	0.1uF	Capacitors_SMD:C_0805	C1, C2, C3, C11, C14, C18, C25, C26, C27, C29, C30, C31, C32, C33, C34, C35 +28
15	10uF	Capacitors_SMD:C_1206	C10, C13, C15, C17, C20, C28, C45, C46, C52, C54, C55, C61, C70, C71, C81
11	10k	Resistors_SMD:R_0805	R1, R2, R3, R5, R11, R12, R15, R16, R21, R22, R38
10	1uF	Capacitors_SMD:C_0805	C24, C56, C62, C66, C67, C73, C75, C77, C80, C84
9	Ferrite bead	Resistors_SMD:R_0805	FB1, FB2, FB3, FB4, FB5, FB6, FB7, FB8, FB9
7	2.54mm 2x10 right angle female header	Socket_Strips:Socket_Strip_Angled_2x10_Mirror	MOD1, MOD2, MOD3, MOD4, MOD5, MOD6, MOD7
7	22uF	Capacitors_SMD:c_elec_6.3x7.7	C43, C44, C50, C51, C53, C59, C60
6	100k	Resistors_SMD:R_0805	R23, R27, R31, R32, R33, R35
4	2.2k	Resistors_SMD:R_0805	R6, R34, R36, R37
4	BAT54 2x common cathode	TO_SOT_Packages_SMD:SOT-23	D2, D4, D6, D7
3	150	Resistors_SMD:R_0805	R14, R24, R28
3	SiP32408	TDFN4:TDFN4	U9, U10, U11
2	10	Resistors_SMD:R_0805	R8, R9
2	100pF	Capacitors_SMD:C_0805	C49, C58
2	16k 1%	Resistors_SMD:R_0805	R20, R29
2	1nF	Capacitors_SMD:C_0805	C19, C23
2	20pF	Capacitors_SMD:C_0805	C12, C16
2	240	Resistors_SMD:R_0805	R13, R19
2	4.7k	Resistors_SMD:R_0805	R4, R7
2	5.1k 1%	Resistors_SMD:R_0805	R26, R30
2	750	Resistors_SMD:R_0805	R17, R18
2	8.5VWM	TO_SOT_Packages_SMD:SOT-23	D8, D9
2	RT8299A	Housings_SOIC:SOIC-8-1EP_3.9x4.9mm_Pitch1.27mm	U7, U8
1	10/100baseT transformer	Housings_SOIC:SOIC-16_7.5x10.3mm_Pitch1.27mm	T1
1	10uF	Capacitors_SMD:C_1206	C22
1	12 MHz	Crystals:Crystal_HC49-SD_SMD	X1
1	12k 1%	Resistors_SMD:R_0805	R10
1	1nF	Capacitors_SMD:C_1808	C21
1	1uF	Capacitors_SMD:C_0805	C47
1	2.5mm 5-24V 5A	Connect:BARREL_JACK	CON4
1	200mA PTC	Resistors_SMD:R_1206	F1
1	22uH	Air_Coils_SML_NEOSID:COIL_SMD_6mm_1mmCrtYd	L1
1	22uH	COIL_SMD_6mm_1mmCrtYd	L2
1	25.0000 MHz 15ppm 8pF	Crystals:crystal_FA238-TSX3225	X2
1	27k 1%	Resistors_SMD:R_0805	R25
1	2A PTC	Resistors_SMD:R_1812	F2
1	2N7002P	TO_SOT_Packages_SMD:SOT-23	Q2
1	5-24V 16A	Terminal_Blocks:TerminalBlock_Pheonix_PT-3.5mm_4pol	CON5
1	93C56	Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm	U1
1	AOD4189	TO_SOT_Packages_SMD:TO-252-2Lead	Q3
1	AP2204K-5.0	TO_SOT_Packages_SMD:SOT-23-5	U4
1	BAT54 2x common anode	TO_SOT_Packages_SMD:SOT-23	D3
1	DMN3190LDW	TO_SOT_Packages_SMD:SC-70-6	Q1
1	FT2232H	Housings_QFP:LQFP-64_10x10mm_Pitch0.5mm	U2
1	LED_BGR	LEDs:LED_RGB_PLLC-6	D5
1	LOGO	Wiggleport:wiggle-spine-back-silk	G***
1	LOGO	Wiggleport:wiggle-spine-front-silk	G***
1	NC7WZ14	TO_SOT_Packages_SMD:SC-70-6	U3
1	PLR135	TOSLINK:Everlight-PLR135-T8	CON6
1	PLT133	TOSLINK:Everlight-PLT133-T6A	CON7
1	ST485E	Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm	U5
1	Si5351B	Housings_DFN_QFN:QFN-20-1EP_4x4mm_Pitch0.5mm	U14
1	TCR2EF12	TO_SOT_Packages_SMD:SOT-23-5	U13
1	TCR2EF25	TO_SOT_Packages_SMD:SOT-23-5	U12
1	TVS DIODE 5.5VWM	TO_SOT_Packages_SMD:SC-70-6	D1
1	USB-A	Connect:USB_A_Vertical	CON3
1	USB-B	Connect:USB_B	CON1
1	XLR-3 Female	Connect:XLR3MC	CON2
1	iCE40-HX1K-TQ144	Housings_QFP:TQFP-144_20x20mm_Pitch0.5mm	U6

The 181 most common of 190 parts.

Questions

How big is the Raw PCB?

It measures 88.9 × 114.3 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Raw use?

190 parts, built around the SIP32408EVB, ST485EBDR, PLR135/T8 and RT8299AZQW. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Raw KiCad files?

From the PCBench/PCBench repository on GitHub, at the commit this page was made from: the board is PCBs/wiggleport_wiggle-spine/raw.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Raw design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

Category and platform

FPGA and CPLD

Project files

Show this board on your page

A live frame, for any web page

<iframe src="https://pcbkit.io/embed/boards/pcbench-pcbench-raw-14" title="Raw in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe>

A picture

<img src="https://pcbkit.io/embed/boards/pcbench-pcbench-raw-14.jpg" alt="Raw" width="1200" height="900">

A picture that opens the board, for a README

[![Raw](https://pcbkit.io/embed/boards/pcbench-pcbench-raw-14.jpg?size=s)](https://pcbkit.io/boards/pcbench-pcbench-raw-14)

Source

Repository: PCBench/PCBench
Board file: PCBs/wiggleport_wiggle-spine/raw.kicad_pcb
Commit: dec3be7
Licence: MIT
Copies: 2 copies in 1 repository

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