PCBench/PCBench21resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
Eeg brainboard wearable is an open-source printed circuit board by PCBench, from the PCBench/PCBench repository on GitHub, published under the MIT licence. It is a 4-layer board of 40 × 50.8 mm with 59 parts on 48 nets, routed with 802 tracks and 54 vias.
It is built around the OPA376AID, FR015L3EZ and ABM3B-8.000MHZ-B2-T, with the BLM18PG121SN1 and JS102011SAQN among its other parts. Its parts include 25 capacitors, 9 resistors, 7 ICs, 2 connectors and 1 diode. It belongs with the wearables boards and the AVR (ATmega, ATtiny) boards of this library.
PCBench is a dataset for PCB routing task, it includes a dataset consisting of 164 printed circuit boards (PCB), a data augmentation script to expand the dataset for supervised learning (SL) tasks, and a reinforcement learning (RL) environment.
All the PCB designs in our dataset are stored in the folder PCBs, where each PCB design is stored in a subfolder named {author/org}_{PCB_name}_{design_version(optional)}. Below is the folder structure of the dataset.
├── PCBs
│ ├── master_metadata.json
│ ├── subfolder1
│ │ ├── raw.kicad_pcb
│ │ ├── processed.kicad_pcb
│ │ ├── final.json
│ │ ├── metadata.json
│ │ ├── visual.png
│ ├── subfolder2
│ │ ├── raw.kicad_pcb
│ │ ├── processed.kicad_pcb
│ │ ├── final.json
│ │ ├── metadata.json
│ │ ├── visual.png
│ ├── ...The raw.kicad_pcb is the raw PCB design file, process.kicad_pcb is the file after cleaning up, final.json stores only routing-related information used for ML tasks. metadata.json stores the meta information for each single PCB design. visual.png is a visualization of each single PCB design. master_meta.json contains metadata of all PCBs and global-level information.
We propose a JSON specification (final.json for each PCB design) called the PCB Routing Description Language (PCB-RDL) that expresses a PCB routing problem and its solutions intuitively using basic concepts in order to facilitate research into automated PCB routing using ML. Following figure shows is an example of PCB with marked components in PCB-RDL (Left) and it corrsponding PCB-RDL (Right).
The augmentation data can be generated with the script Scripts/Data_augmentation/augmentation.py. To generate 3 samples by randomly extracting 50% nets from the PCB 1Bitsy_1bitsy, please run the following command
cd Scripts/Data_augmentation/
python augmentation.py --num_samples 3 --net_ratio 0.5 --pcb_name 1Bitsy_1bitsyAll the generated PCBs will be stored in the folder named augmented_data under Scripts/Data_augmentation/. In augmented_data, all the generated samples will be stored in a subfolder with the name of selected PCB. Each generated sample has the name sample_index.json. For example, the above command will generate the following file under Scripts/Data_augmentation/
├── augmented_data
│ ├── 1Bitsy_1bitsy
│ │ ├── 1.json
│ │ ├── 2.json
│ │ ├── 3.jsonThe RL environment requires Python >= 3.7. You can simply install the environment with the following commands:
git clone https://github.com/PCBench/PCBench.git
cd PCBench
python setup.py installAfter installation, open a Python console and type
from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnvIf no error occurs, you have successfully installed the PCB routing environment.
The following content shows an example of API usage of PCBRoutingEnv.
from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnv
import random
resolution = [0.5, 0.5]
pcb_folder = '../PCBs/'
pcb_names = ["1Bitsy_1bitsy"]
iters = 30
env = PCBRoutingEnv(resolution=resolution, pcb_folder=pcb_folder, pcb_names=pcb_names)
obs, info = env.reset()
for _ in range(iters):
act = random.randint(0,5)
obs, rew, terminal, _, info = env.step(act)
if terminal:
env.reset()You can find more examples of customizing functions of reward and state observation from RLEnv/examples.ipynb.
| Qty | Value | Footprint | References |
|---|---|---|---|
| 10 | 0.1uF | c_0402 | C1, C2, C4, C5, C6, C13, C14, C19, C27, C29 |
| 6 | 1uF | c_0402 | C3, C11, C23, C24, C26, C28 |
| 4 | 10k | r_0402 | R3, R4, R12, R13 |
| 4 | 10uF | c_0603 | C9, C10, C12, C20 |
| 2 | 1M | r_0402 | R2, R14 |
| 2 | 30pF | c_0402 | C7, C8 |
| 2 | 4.7nF | c_0402 | C21, C22 |
| 1 | 1.5nF | c_0402 | C25 |
| 1 | 10uH | inductor_smd_0603 | L1 |
| 1 | 2.2M | r_0402 | R1 |
| 1 | 2.2k | r_0402 | R6 |
| 1 | 3V3 | testpoint_1mm | TP4 |
| 1 | 51k | r_0402 | R11 |
| 1 | ABM3B-8.000MHZ | crystal_smd_5x3.2mm | Y1 |
| 1 | ADS1291/2 | s-pvqfn-n32-nopad | U7 |
| 1 | ADXL362 | 16-LGA-3x3.25 | U4 |
| 1 | ATMEGA328P-28PIN | qfn-28-nopad | U3 |
| 1 | BLM18PG121SN1 | inductor_smd_0603 | FB1 |
| 1 | BLUETOOTH-RN42 | w_rf_modules:roving_rn-42 | U5 |
| 1 | BTCTS | PINTST | TP13 |
| 1 | BTRTS | PINTST | TP12 |
| 1 | BTRX | PINTST | TP10 |
| 1 | BTTX | PINTST | TP11 |
| 1 | CONN | testpoint_1mm | TP14 |
| 1 | CONN_7X2 | pin_socket_7x2-90 | P2 |
| 1 | FACT | testpoint_1mm | TP16 |
| 1 | FR015L3EZ | MLP6-2x2 | U1 |
| 1 | GND | testpoint_1mm | TP3 |
| 1 | ICSP | pin_strip_3x2 | P1 |
| 1 | JS102011SAQN | JS102011SAQN | S1 |
| 1 | LIR2450 | keystone_3008 | BT1 |
| 1 | MHOLE | mounting_hole_0in125 | MTG1 |
| 1 | OPA376 | sc70-5 | U6 |
| 1 | RED | Led_0402 | D1 |
| 1 | STATUS | PINTST | TP17 |
| 1 | TPS727XXDSE | S-PWSON-N6 | U2 |
It measures 40 × 50.8 mm and has 4 copper layers, 1.6 mm thick.
59 parts, built around the OPA376AID, FR015L3EZ, ABM3B-8.000MHZ-B2-T and BLM18PG121SN1. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the PCBench/PCBench repository on GitHub, at the commit this page was made from: the board is PCBs/eeg_brainboard_wearable/processed.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
PCBench/PCBench
resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…
paltatech/current_sensor
Isolated delta sigma current sensor for high speed high current application
afkiwers/GroundTruth
KiCad 10 plugin and CLI that simulates return currents, EMI, power stages, PDN impedance and thermal rise with a field solver, and suggests vias and design fixes.
Duet3D/Duet-2-Hardware
The KiCAD source for the Duet 3d printer controller see www.duet3d.com
keeos-io/ogham
Ogham — a dual-voice bytebeat synthesizer for Eurorack. Firmware (MIT) and hardware (CC BY-SA 4.0).
Eight4aWish/eurorack_electronics
Analogue designs and breadboard layouts: the Dual Pingable LPG, and the board behind Boy.