
Macrolev
heiso/macrolev
Macrolev is an open source analog keyboard powered by Hall Effect switches
STMicroelectronicsExtended
-40℃~+85℃ 1.7V~3.6V 100MHz 128KB 12bit 32 Bit 36 512KB ARM Cortex-M4 Built-in FLASH UFQFPN-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHS
The STM32F411CEU6 is a microcontroller made by STMicroelectronics in a UFQFPN-48(7x7) package with 49 pins. -40℃~+85℃ 1.7V~3.6V 100MHz 128KB 12bit 32 Bit 36 512KB ARM Cortex-M4 Built-in FLASH UFQFPN-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (MCU_ST_STM32F4:STM32F411CEUx, from KiCad's library) and its footprint (Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm, from KiCad's library), ready for a KiCad board. 463 are in stock at JLCPCB (part C2054095). 46 open-source boards in 41 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| External main supply voltage (including VDDA, VDD and VBAT) VDD–VSS | min -0.3 · max 4 V | 60 | |
| Input voltage on any other pin VIN | Minimum VSS–0.3 | max 4 V | 60 |
| Input voltage for BOOT0 VIN | Minimum VSS | max 9 V | 60 |
| Variations between different VDD power pins |ΔVDDx| | max 50 mV | 60 | |
| Variations between all the different ground pins |VSSX −VSS| | max 50 mV | 60 | |
| Total current into sum of all VDD_x power lines (source) ΣIVDD | max 160 mA | 61 | |
| Total current out of sum of all VSS_x ground lines (sink) Σ IVSS | max -160 mA | 61 | |
| Maximum current into each VDD_x power line (source) IVDD | max 100 mA | 61 | |
| Maximum current out of each VSS_x ground line (sink) IVSS | max -100 mA | 61 | |
| Output current sunk by any I/O and control pin IIO | max 25 mA | 61 | |
| Output current sourced by any I/O and control pin IIO | max -25 mA | 61 | |
| Total output current sunk by sum of all I/O and control pins ΣIIO | max 120 mA | 61 | |
| Total output current sourced by sum of all I/Os and control pins ΣIIO | max -120 mA | 61 | |
| Injected current on FT and TC pins IINJ(PIN) | Negative/positive injection limits –5/+0 mA | min -5 · max 0 mA | 61 |
| Injected current on NRST and B pins IINJ(PIN) | Negative/positive injection limits –5/+0 mA | min -5 · max 0 mA | 61 |
| Total injected current (sum of all I/O and control pins) ΣIINJ(PIN) | Absolute sum of positive and negative injected currents; ±25 mA | max 25 mA | 61 |
| Storage temperature range TSTG | min -65 · max 150 °C | 61 | |
| Maximum junction temperature TJ | max 130 °C | 61 | |
| Internal AHB clock frequency fHCLK | Power Scale3: Regulator ON, VOS[1:0] bits in PWR_CR register = 0x01 | min 0 · max 64 MHz | 62 |
| Internal AHB clock frequency fHCLK | Power Scale2: Regulator ON, VOS[1:0] bits in PWR_CR register = 0x10 | min 0 · max 84 MHz | 62 |
| Internal AHB clock frequency fHCLK | Power Scale1: Regulator ON, VOS[1:0] bits in PWR_CR register = 0x11 | min 0 · max 100 MHz | 62 |
| Internal APB1 clock frequency fPCLK1 | min 0 · max 50 MHz | 62 | |
| Internal APB2 clock frequency fPCLK2 | min 0 · max 100 MHz | 62 | |
| Standard operating voltage VDD | 1.7 V minimum requires an external power supply supervisor | min 1.7 · max 3.6 V | 62 |
| Analog operating voltage (ADC limited to 1.2 M samples) VDDA | Must be the same potential as VDD; 1.7 V minimum requires an external power supply supervisor | min 1.7 · max 2.4 V | 62 |
| Analog operating voltage (ADC limited to 2.4 M samples) VDDA | Must be the same potential as VDD | min 2.4 · max 3.6 V | 62 |
| Backup operating voltage VBAT | min 1.65 · max 3.6 V | 62 | |
| Regulator ON: 1.2 V internal voltage on VCAP_1/VCAP_2 pins V12 | VOS[1:0] bits in PWR_CR register = 0x11; max frequency 100 MHz | min 1.26 · typ 1.32 · max 1.38 V | 62 |
| Input voltage on RST, FT and TC pins VIN | 2 V ≤ VDD ≤ 3.6 V | min -0.3 · max 5.5 V | 62 |
| Input voltage on RST, FT and TC pins VIN | VDD ≤ 2 V | min -0.3 · max 5.2 V | 62 |
| Input voltage on BOOT0 pin VIN | min 0 · max 9 V | 62 | |
| Power dissipation at TA = 85°C (range 6) or 105 °C (range 7) PD | UFQFPN48; range 6, TA = 85°C | max 625 mW | 62 |
| Ambient temperature for range 6 TA | Maximum power dissipation | min -40 · max 85 °C | 63 |
| Ambient temperature for range 6 TA | Low power dissipation; TJ must not exceed TJmax | min -40 · max 105 °C | 63 |
| Junction temperature range TJ | Range 6 | min -40 · max 105 °C | 63 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 25 °C | typ 21.4 · max 23 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 85 °C | max 23.6 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 25 °C | typ 17.2 · max 18.9 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 85 °C | max 19.1 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 25 °C | typ 11.9 · max 12.9 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 85 °C | max 13.2 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 25 °C | typ 9.4 · max 10.1 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 85 °C | max 10.4 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 25 °C | typ 4.3 · max 4.8 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 85 °C | max 5 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals enabled; 16 MHz; TA = 25 °C | typ 3 · max 3.3 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals enabled; 16 MHz; TA = 85 °C | max 3.6 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals enabled; 1 MHz; TA = 25 °C | typ 0.5 · max 0.7 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals enabled; 1 MHz; TA = 85 °C | max 1 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 100 MHz; TA = 25 °C | typ 12.7 · max 14 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 100 MHz; TA = 85 °C | max 14.4 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 84 MHz; TA = 25 °C | typ 10.2 · max 11.6 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 84 MHz; TA = 85 °C | max 11.8 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 64 MHz; TA = 25 °C | typ 7.1 · max 7.9 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 64 MHz; TA = 85 °C | max 8.2 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 50 MHz; TA = 25 °C | typ 5.6 · max 6.3 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 50 MHz; TA = 85 °C | max 6.5 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 20 MHz; TA = 25 °C | typ 2.5 · max 3 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL on, all peripherals disabled; 20 MHz; TA = 85 °C | max 3.3 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals disabled; 16 MHz; TA = 25 °C | typ 1.9 · max 2.1 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals disabled; 16 MHz; TA = 85 °C | max 2.4 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals disabled; 1 MHz; TA = 25 °C | typ 0.4 · max 0.5 mA | 68 |
| Supply current in Run mode IDD | HSI, PLL off, all peripherals disabled; 1 MHz; TA = 85 °C | max 0.9 mA | 68 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 25 °C for maximum | typ 20.7 · max 22.2 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 85 °C | max 22.5 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 25 °C for maximum | typ 16.8 · max 18 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 85 °C | max 18.3 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 25 °C for maximum | typ 11.8 · max 12.7 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 85 °C | max 12.9 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 25 °C for maximum | typ 9.3 · max 10.2 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 85 °C | max 10.4 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 25 °C for maximum | typ 4.8 · max 5.5 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 85 °C | max 5.8 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 16 MHz; TA = 25 °C for maximum | typ 3 · max 3.3 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 16 MHz; TA = 85 °C | max 3.8 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 1 MHz; TA = 25 °C for maximum | typ 0.7 · max 1 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 1 MHz; TA = 85 °C | max 1.4 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 100 MHz; TA = 25 °C for maximum | typ 11.6 · max 12.6 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 100 MHz; TA = 85 °C | max 12.9 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 84 MHz; TA = 25 °C for maximum | typ 9.7 · max 10.2 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 84 MHz; TA = 85 °C | max 11.1 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 64 MHz; TA = 25 °C for maximum | typ 6.7 · max 7.4 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 64 MHz; TA = 85 °C | max 7.7 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 50 MHz; TA = 25 °C for maximum | typ 5.4 · max 6 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 50 MHz; TA = 85 °C | max 6.3 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 20 MHz; TA = 25 °C for maximum | typ 2.9 · max 3.4 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 20 MHz; TA = 85 °C | max 3.7 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 16 MHz; TA = 25 °C for maximum | typ 1.9 · max 2.2 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 16 MHz; TA = 85 °C | max 2.6 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 1 MHz; TA = 25 °C for maximum | typ 0.7 · max 0.9 mA | 71 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 1 MHz; TA = 85 °C | max 1.3 mA | 71 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 25 °C for maximum | typ 31.7 · max 33.6 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 100 MHz; TA = 85 °C | max 34.5 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 25 °C for maximum | typ 26.9 · max 28.6 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 84 MHz; TA = 85 °C | max 29.4 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 25 °C for maximum | typ 19.6 · max 20.9 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 64 MHz; TA = 85 °C | max 21.5 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 25 °C for maximum | typ 15.6 · max 16.7 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 50 MHz; TA = 85 °C | max 17.2 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 25 °C for maximum | typ 7.6 · max 8.4 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals enabled; 20 MHz; TA = 85 °C | max 8.8 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 16 MHz; TA = 25 °C for maximum | typ 5.1 · max 5.6 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 16 MHz; TA = 85 °C | max 6.1 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 1 MHz; TA = 25 °C for maximum | typ 1 · max 1.3 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals enabled; 1 MHz; TA = 85 °C | max 1.7 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 100 MHz; TA = 25 °C for maximum | typ 22.5 · max 24.2 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 100 MHz; TA = 85 °C | max 24.9 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 84 MHz; TA = 25 °C for maximum | typ 19.5 · max 21.1 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 84 MHz; TA = 85 °C | max 21.8 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 64 MHz; TA = 25 °C for maximum | typ 14.5 · max 15.7 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 64 MHz; TA = 85 °C | max 16.3 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 50 MHz; TA = 25 °C for maximum | typ 11.7 · max 12.7 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 50 MHz; TA = 85 °C | max 13.2 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 20 MHz; TA = 25 °C for maximum | typ 5.6 · max 6.4 mA | 73 |
| Supply current in Run mode IDD | External clock, PLL ON, all peripherals disabled; 20 MHz; TA = 85 °C | max 6.8 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 16 MHz; TA = 25 °C for maximum | typ 4 · max 4.5 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 16 MHz; TA = 85 °C | max 4.9 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 1 MHz; TA = 25 °C for maximum | typ 0.9 · max 1.2 mA | 73 |
| Supply current in Run mode IDD | HSI, PLL OFF, all peripherals disabled; 1 MHz; TA = 85 °C | max 1.6 mA | 73 |
| Main regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 113.7 · max 145 uA | 75 |
| Main regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 410 uA | 75 |
| Low power regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 43.1 · max 68 uA | 75 |
| Low power regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 310 uA | 75 |
| Main regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 76.2 · max 105 uA | 75 |
| Main regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 320 uA | 75 |
| Low power regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 14 · max 38 uA | 75 |
| Low power regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 275 uA | 75 |
| Low power low voltage regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 10 · max 30 uA | 75 |
| Low power low voltage regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 235 uA | 75 |
| Supply current in Standby mode IDD_STBY | Low-speed oscillator (LSE) and RTC ON; TA = 25 °C | typ 2.4 · max 4 uA | 75 |
| Supply current in Standby mode IDD_STBY | Low-speed oscillator (LSE) and RTC ON; TA = 85 °C | max 12 uA | 75 |
| Supply current in Standby mode IDD_STBY | RTC and LSE OFF; TA = 25 °C | typ 1.8 · max 3 uA | 75 |
| Supply current in Standby mode IDD_STBY | RTC and LSE OFF; TA = 85 °C | max 11 uA | 75 |
| Supply current in Standby mode IDD_STBY | Low-speed oscillator (LSE) and RTC ON; TA = 25 °C | typ 2.8 · max 5 uA | 75 |
| Supply current in Standby mode IDD_STBY | Low-speed oscillator (LSE) and RTC ON; TA = 85 °C | max 14 uA | 75 |
| Supply current in Standby mode IDD_STBY | RTC and LSE OFF; TA = 25 °C | typ 2.1 · max 4 uA | 75 |
| Supply current in Standby mode IDD_STBY | RTC and LSE OFF; TA = 85 °C | max 13.5 uA | 75 |
| ESR of external capacitor with a single VCAP pin available ESR | Single VCAP pin available; ESR <1Ω | max 1 Ω | 65 |
| VDD rise time rate tVDD | Subject to general operating conditions for TA; maximum ∞ | min 20 us/V | 65 |
| VDD fall time rate tVDD | Subject to general operating conditions for TA; maximum ∞ | min 20 us/V | 65 |
| Thermal resistance junction-ambient ΘJA | UFQFPN48; stated value | typ 32 °C/W | 140 |
| Power dissipation at TA = 125 °C (range 3) PD | UFQFPN48; range 3 | max 156 mW | 63 |
| In-Rush current on voltage regulator power-on (POR or wakeup from Standby) IRUSH | Guaranteed by design | typ 160 · max 200 mA | 67 |
| In-Rush energy on voltage regulator power-on (POR or wakeup from Standby) ERUSH | VDD = 1.7 V, TA = 125 °C, IRUSH = 171 mA for 31 us; guaranteed by design | max 5.4 uC | 67 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 21.4 · max 23 mA | 68 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 23.6 mA | 68 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 17.2 · max 18.9 mA | 68 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 19.1 mA | 68 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 11.9 · max 12.9 mA | 68 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 13.2 mA | 68 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 9.4 · max 10.1 mA | 68 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 10.4 mA | 68 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 4.3 · max 4.8 mA | 68 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 5 mA | 68 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL off, all peripherals enabled; TA = 25 °C | typ 3 · max 3.3 mA | 68 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL off, all peripherals enabled; TA = 85 °C | max 3.6 mA | 68 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL off, all peripherals enabled; TA = 25 °C | typ 0.5 · max 0.7 mA | 68 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL off, all peripherals enabled; TA = 85 °C | max 1 mA | 68 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL on, all peripherals disabled; TA = 25 °C | typ 12.7 · max 14 mA | 68 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL on, all peripherals disabled; TA = 85 °C | max 14.4 mA | 68 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL on, all peripherals disabled; TA = 25 °C | typ 10.2 · max 11.6 mA | 68 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL on, all peripherals disabled; TA = 85 °C | max 11.8 mA | 68 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL on, all peripherals disabled; TA = 25 °C | typ 7.1 · max 7.9 mA | 68 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL on, all peripherals disabled; TA = 85 °C | max 8.2 mA | 68 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL on, all peripherals disabled; TA = 25 °C | typ 5.6 · max 6.3 mA | 68 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL on, all peripherals disabled; TA = 85 °C | max 6.5 mA | 68 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL on, all peripherals disabled; TA = 25 °C | typ 2.5 · max 3 mA | 68 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL on, all peripherals disabled; TA = 85 °C | max 3.3 mA | 68 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL off, all peripherals disabled; TA = 25 °C | typ 1.9 · max 2.1 mA | 68 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL off, all peripherals disabled; TA = 85 °C | max 2.4 mA | 68 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL off, all peripherals disabled; TA = 25 °C | typ 0.4 · max 0.5 mA | 68 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL off, all peripherals disabled; TA = 85 °C | max 0.9 mA | 68 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 21.7 · max 23.3 mA | 69 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 23.9 mA | 69 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 17.5 · max 19.2 mA | 69 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 19.4 mA | 69 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 12.2 · max 13.2 mA | 69 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 13.5 mA | 69 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 9.6 · max 10.4 mA | 69 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 10.7 mA | 69 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 4.5 · max 5 mA | 69 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 5.3 mA | 69 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 3 · max 3.3 mA | 69 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 3.6 mA | 69 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 0.5 · max 0.7 mA | 69 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 1 mA | 69 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 25 °C | typ 13 · max 14.6 mA | 69 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 85 °C | max 14.6 mA | 69 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 25 °C | typ 10.5 · max 11.9 mA | 69 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 85 °C | max 12.1 mA | 69 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 25 °C | typ 7.4 · max 8.4 mA | 69 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 85 °C | max 8.8 mA | 69 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 25 °C | typ 5.9 · max 6.6 mA | 69 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 85 °C | max 6.8 mA | 69 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 25 °C | typ 2.8 · max 3.3 mA | 69 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL OFF as printed, all peripherals disabled; TA = 85 °C | max 3.5 mA | 69 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 1.9 · max 2.1 mA | 69 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 2.4 mA | 69 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.4 · max 0.5 mA | 69 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 0.9 mA | 69 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 20.4 · max 21.8 mA | 70 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 22.1 mA | 70 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 16.5 · max 17.6 mA | 70 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 17.8 mA | 70 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 11.4 · max 12.3 mA | 70 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 12.5 mA | 70 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 9 · max 9.7 mA | 70 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 10 mA | 70 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 4.6 · max 5 mA | 70 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 5.3 mA | 70 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 2.9 · max 3.2 mA | 70 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 3.6 mA | 70 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 0.7 · max 0.8 mA | 70 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 1.3 mA | 70 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 11.2 · max 12.2 mA | 70 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 12.4 mA | 70 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 9.1 · max 9.9 mA | 70 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 10.1 mA | 70 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 6.4 · max 7 mA | 70 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 7.3 mA | 70 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 5.1 · max 5.6 mA | 70 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 5.9 mA | 70 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 2.6 · max 3 mA | 70 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 3.3 mA | 70 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 1.8 · max 2 mA | 70 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 2.4 mA | 70 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.6 · max 0.7 mA | 70 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 1.2 mA | 70 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 20.7 · max 22.2 mA | 71 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 22.5 mA | 71 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 16.8 · max 18 mA | 71 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 18.3 mA | 71 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 11.8 · max 12.7 mA | 71 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 12.9 mA | 71 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 9.3 · max 10.2 mA | 71 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 10.4 mA | 71 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 4.8 · max 5.5 mA | 71 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 5.8 mA | 71 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 3 · max 3.3 mA | 71 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 3.8 mA | 71 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 0.7 · max 1 mA | 71 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 1.4 mA | 71 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 11.6 · max 12.6 mA | 71 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 12.9 mA | 71 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 9.7 · max 10.2 mA | 71 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 11.1 mA | 71 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 6.7 · max 7.4 mA | 71 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 7.7 mA | 71 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 5.4 · max 6 mA | 71 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 6.3 mA | 71 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 2.9 · max 3.4 mA | 71 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 3.7 mA | 71 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 1.9 · max 2.2 mA | 71 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 2.6 mA | 71 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.7 · max 0.9 mA | 71 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 1.3 mA | 71 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 29.5 · max 31.5 mA | 72 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 32.3 mA | 72 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 25.5 · max 27.1 mA | 72 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 27.9 mA | 72 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 18.6 · max 19.8 mA | 72 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 20.4 mA | 72 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 15.2 · max 16.4 mA | 72 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 16.9 mA | 72 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 7.6 · max 8.4 mA | 72 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 8.8 mA | 72 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 4.8 · max 5.2 mA | 72 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 5.7 mA | 72 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 0.9 · max 1.3 mA | 72 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 1.6 mA | 72 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 20.4 · max 21.8 mA | 72 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 22.7 mA | 72 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 18.4 · max 19.2 mA | 72 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 20.9 mA | 72 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 13.5 · max 14.5 mA | 72 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 15.2 mA | 72 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 11.3 · max 12.2 mA | 72 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 12.8 mA | 72 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 5.6 · max 6.4 mA | 72 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 6.7 mA | 72 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 3.6 · max 4.1 mA | 72 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 4.5 mA | 72 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.9 · max 1.2 mA | 72 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 1.6 mA | 72 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 31.7 · max 33.6 mA | 73 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 34.5 mA | 73 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 26.9 · max 28.6 mA | 73 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 29.4 mA | 73 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 19.6 · max 20.9 mA | 73 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 21.5 mA | 73 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 15.6 · max 16.7 mA | 73 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 17.2 mA | 73 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 7.6 · max 8.4 mA | 73 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 8.8 mA | 73 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 5.1 · max 5.6 mA | 73 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 6.1 mA | 73 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 1 · max 1.3 mA | 73 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 1.7 mA | 73 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 22.5 · max 24.2 mA | 73 |
| Supply current in Run mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 24.9 mA | 73 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 19.5 · max 21.1 mA | 73 |
| Supply current in Run mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 21.8 mA | 73 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 14.5 · max 15.7 mA | 73 |
| Supply current in Run mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 16.3 mA | 73 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 11.7 · max 12.7 mA | 73 |
| Supply current in Run mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 13.2 mA | 73 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 5.6 · max 6.4 mA | 73 |
| Supply current in Run mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 6.8 mA | 73 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 4 · max 4.5 mA | 73 |
| Supply current in Run mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 4.9 mA | 73 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.9 · max 1.2 mA | 73 |
| Supply current in Run mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 1.6 mA | 73 |
| Supply current in Sleep mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 12.2 · max 13.2 mA | 74 |
| Supply current in Sleep mode IDD | 100 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 13.4 mA | 74 |
| Supply current in Sleep mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 9.8 · max 10.6 mA | 74 |
| Supply current in Sleep mode IDD | 84 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 10.9 mA | 74 |
| Supply current in Sleep mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 6.9 · max 7.4 mA | 74 |
| Supply current in Sleep mode IDD | 64 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 7.7 mA | 74 |
| Supply current in Sleep mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 5.4 · max 5.9 mA | 74 |
| Supply current in Sleep mode IDD | 50 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 6.2 mA | 74 |
| Supply current in Sleep mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 25 °C | typ 2.8 · max 3.2 mA | 74 |
| Supply current in Sleep mode IDD | 20 MHz; external clock, PLL ON, all peripherals enabled; TA = 85 °C | max 3.5 mA | 74 |
| Supply current in Sleep mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 1.3 · max 1.7 mA | 74 |
| Supply current in Sleep mode IDD | 16 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 2.2 mA | 74 |
| Supply current in Sleep mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 25 °C | typ 0.4 · max 0.5 mA | 74 |
| Supply current in Sleep mode IDD | 1 MHz; HSI, PLL OFF, all peripherals enabled; TA = 85 °C | max 0.9 mA | 74 |
| Supply current in Sleep mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 3 · max 3.6 mA | 74 |
| Supply current in Sleep mode IDD | 100 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 3.9 mA | 74 |
| Supply current in Sleep mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 2.5 · max 3 mA | 74 |
| Supply current in Sleep mode IDD | 84 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 3.2 mA | 74 |
| Supply current in Sleep mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 1.9 · max 2.2 mA | 74 |
| Supply current in Sleep mode IDD | 64 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 2.5 mA | 74 |
| Supply current in Sleep mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 1.6 · max 1.9 mA | 74 |
| Supply current in Sleep mode IDD | 50 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 2.1 mA | 74 |
| Supply current in Sleep mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 25 °C | typ 1.1 · max 1.4 mA | 74 |
| Supply current in Sleep mode IDD | 20 MHz; external clock, PLL ON, all peripherals disabled; TA = 85 °C | max 1.7 mA | 74 |
| Supply current in Sleep mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.4 · max 0.5 mA | 74 |
| Supply current in Sleep mode IDD | 16 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 0.9 mA | 74 |
| Supply current in Sleep mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 25 °C | typ 0.3 · max 0.4 mA | 74 |
| Supply current in Sleep mode IDD | 1 MHz; HSI, PLL OFF, all peripherals disabled; TA = 85 °C | max 0.8 mA | 74 |
| Main regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 112 · max 142 uA | 74 |
| Main regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 400 uA | 74 |
| Low power regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 42.6 · max 67 uA | 74 |
| Low power regulator usage IDD_STOP | Flash in Stop mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 300 uA | 74 |
| Main regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 75 · max 99 uA | 74 |
| Main regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 310 uA | 74 |
| Low power regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 13.6 · max 37 uA | 74 |
| Low power regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 265 uA | 74 |
| Low power low voltage regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 25 °C | typ 9 · max 28 uA | 74 |
| Low power low voltage regulator usage IDD_STOP | Flash in Deep power down mode, all oscillators OFF, no independent watchdog; TA = 85 °C | max 230 uA | 74 |
| Backup domain supply current IDD_VBAT | LSE in low-drive mode and RTC ON; TA = 25 °C; VBAT = 1.7 V | typ 0.7 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in low-drive mode and RTC ON; TA = 25 °C; VBAT = 2.4 V | typ 0.8 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in low-drive mode and RTC ON; TA = 25 °C; VBAT = 3.3 V | typ 1 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in low-drive mode and RTC ON; TA = 85 °C; VBAT = 3.6 V | max 3 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in high-drive mode and RTC ON; TA = 25 °C; VBAT = 1.7 V | typ 1.5 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in high-drive mode and RTC ON; TA = 25 °C; VBAT = 2.4 V | typ 1.6 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in high-drive mode and RTC ON; TA = 25 °C; VBAT = 3.3 V | typ 1.9 uA | 76 |
| Backup domain supply current IDD_VBAT | LSE in high-drive mode and RTC ON; TA = 85 °C; VBAT = 3.6 V | max 3.8 uA | 76 |
| Backup domain supply current IDD_VBAT | RTC and LSE OFF; TA = 25 °C; VBAT = 1.7 V | typ 0.1 uA | 76 |
| Backup domain supply current IDD_VBAT | RTC and LSE OFF; TA = 25 °C; VBAT = 2.4 V | typ 0.1 uA | 76 |
| Backup domain supply current IDD_VBAT | RTC and LSE OFF; TA = 25 °C; VBAT = 3.3 V | typ 0.1 uA | 76 |
| Backup domain supply current IDD_VBAT | RTC and LSE OFF; TA = 85 °C; VBAT = 3.6 V | max 2 uA | 76 |
| GPIOA IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| GPIOB IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| GPIOC IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| GPIOD IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| GPIOE IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| GPIOH IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.55 uA/MHz | 79 |
| CRC IDD | AHB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 0.36 uA/MHz | 79 |
| DMA1 IDD | AHB1; all DMA streams activated; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 14.96 uA/MHz | 79 |
| DMA2 IDD | AHB1; all DMA streams activated; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 14.96 uA/MHz | 79 |
| TIM2 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 11.19 uA/MHz | 79 |
| TIM3 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 8.57 uA/MHz | 79 |
| TIM4 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 8.33 uA/MHz | 79 |
| TIM5 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 11.19 uA/MHz | 79 |
| PWR IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 0.71 uA/MHz | 79 |
| USART2 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 3.33 uA/MHz | 79 |
| I2C1/2/3 IDD | APB1; per peripheral; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 3.1 uA/MHz | 79 |
| SPI2 IDD | APB1; I2SMOD and I2SE set; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 2.62 uA/MHz | 79 |
| SPI3 IDD | APB1; I2SMOD and I2SE set; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 2.86 uA/MHz | 79 |
| I2S2 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.9 uA/MHz | 79 |
| I2S3 IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.67 uA/MHz | 79 |
| WWDG IDD | APB1; ART ON; Voltage Scale 2; HCLK = 84 MHz; PCLK1 = HCLK/2; TA = 25 °C; VDD = 3.3 V; incremental current | typ 0.71 uA/MHz | 79 |
| TIM1 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 5.71 uA/MHz | 80 |
| TIM9 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 2.86 uA/MHz | 80 |
| TIM10 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.79 uA/MHz | 80 |
| TIM11 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 2.02 uA/MHz | 80 |
| OTG_FS IDD | APB2 as printed; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 23.93 uA/MHz | 80 |
| ADC1 IDD | APB2; digital part; add 1.6 mA for analog part when ADC ON; ART ON; Voltage Scale 2; HCLK = 84 MHz; TA = 25 °C; VDD = 3.3 V | typ 2.98 uA/MHz | 80 |
| SPI1 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.19 uA/MHz | 80 |
| USART1 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 3.1 uA/MHz | 80 |
| USART6 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 2.86 uA/MHz | 80 |
| SDIO IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 5.95 uA/MHz | 80 |
| SPI4 IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 1.31 uA/MHz | 80 |
| SYSCFG IDD | APB2; ART ON; Voltage Scale 2; HCLK = PCLK2 = 84 MHz; TA = 25 °C; VDD = 3.3 V; incremental current | typ 0.71 uA/MHz | 80 |
| Oscillator frequency fOSC_IN | min 4 · max 26 MHz | 84 | |
| Feedback resistor RF | typ 200 kΩ | 84 | |
| HSE current consumption IDD | VDD=3.3 V, ESR=30 Ω, CL=5 pF @25 MHz | typ 450 uA | 84 |
| HSE current consumption IDD | VDD=3.3 V, ESR=30 Ω, CL=10 pF @25 MHz | typ 530 uA | 84 |
| Maximum critical crystal gm Gm_crit_max | Startup | max 1 mA/V | 84 |
| Startup time tSU(HSE) | VDD is stabilized | typ 2 ms | 84 |
| Feedback resistor RF | typ 18.4 MΩ | 85 | |
| LSE current consumption IDD | Low-power mode (default) | max 1 uA | 85 |
| LSE current consumption IDD | High-drive mode | max 3 uA | 85 |
| Maximum critical crystal gm Gm_crit_max | Startup, low-power mode | max 0.56 uA/V | 85 |
| Maximum critical crystal gm Gm_crit_max | Startup, high-drive mode | max 1.5 uA/V | 85 |
| startup time tSU(LSE) | VDD is stabilized | typ 2 s | 85 |
| PLL power consumption on VDD IDD(PLL) | VCO freq = 100 MHz | min 0.15 · max 0.4 mA | 89 |
| PLL power consumption on VDD IDD(PLL) | VCO freq = 432 MHz | min 0.45 · max 0.75 mA | 89 |
| PLL power consumption on VDDA IDDA(PLL) | VCO freq = 100 MHz | min 0.3 · max 0.4 mA | 89 |
| PLL power consumption on VDDA IDDA(PLL) | VCO freq = 432 MHz | min 0.55 · max 0.85 mA | 89 |
| PLLI2S input clock fPLLI2S_IN | min 0.95 · typ 1 · max 2.1 MHz | 89 | |
| PLLI2S multiplier output clock fPLLI2S_OUT | max 216 MHz | 89 | |
| PLLI2S VCO output fVCO_OUT | min 100 · max 432 MHz | 89 | |
| PLLI2S lock time tLOCK | VCO freq = 100 MHz | min 75 · max 200 us | 89 |
| PLLI2S lock time tLOCK | VCO freq = 432 MHz | min 100 · max 300 us | 89 |
| Master I2S clock jitter Jitter | Cycle to cycle at 12.288 MHz on 48 kHz period, N=432, R=5; RMS; main PLL running | typ 90 ps | 89 |
| Master I2S clock jitter Jitter | Average frequency of 12.288 MHz, N = 432, R = 5, on 1000 samples; main PLL running | typ 90 ps | 89 |
| WS I2S clock jitter Jitter | Cycle to cycle at 48 KHz on 1000 samples; main PLL running | typ 400 ps | 89 |
| PLLI2S power consumption on VDD IDD(PLLI2S) | VCO freq = 100 MHz | min 0.15 · max 0.4 mA | 89 |
| PLLI2S power consumption on VDD IDD(PLLI2S) | VCO freq = 432 MHz | min 0.45 · max 0.75 mA | 89 |
| PLLI2S power consumption on VDDA IDDA(PLLI2S) | VCO freq = 100 MHz | min 0.3 · max 0.4 mA | 89 |
| PLLI2S power consumption on VDDA IDDA(PLLI2S) | VCO freq = 432 MHz | min 0.55 · max 0.85 mA | 89 |
| Electrostatic discharge voltage (human body model) VESD(HBM) | TA = +25 °C conforming to JESD22-A114; Class 2 | max 2000 V | 95 |
| Electrostatic discharge voltage (charge device model) VESD(CDM) | UFQFPN48; TA = +25 °C conforming to ANSI/ESD STM5.3.1; Class 4 | max 500 V | 95 |
| Output low level voltage for an I/O pin VOL | CMOS port; IIO = +8 mA; 2.7 V ≤VDD ≤3.6 V | max 0.4 V | 100 |
| Output low level voltage for an I/O pin VOL | TTL port; IIO = +8 mA; 2.7 V ≤VDD ≤3.6 V | max 0.4 V | 100 |
| Output high level voltage for an I/O pin VOH | TTL port; IIO = +8 mA; 2.7 V ≤VDD ≤3.6 V | min 2.4 V | 100 |
| Output low level voltage for an I/O pin VOL | IIO = +20 mA; 2.7 V ≤VDD ≤3.6 V | max 1.3 V | 100 |
| Output low level voltage for an I/O pin VOL | IIO = +6 mA; 1.8 V ≤VDD ≤3.6 V | max 0.4 V | 100 |
| Output low level voltage for an I/O pin VOL | IIO = +4 mA; 1.7 V ≤VDD ≤3.6 V | max 0.4 V | 100 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 00; CL = 50 pF, VDD ≥ 2.70 V | max 4 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 00; CL = 50 pF, VDD≥ 1.7 V | max 2 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 00; CL = 10 pF, VDD ≥ 2.70 V | max 8 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 00; CL = 10 pF, VDD ≥ 1.7 V | max 4 MHz | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 00; CL = 50 pF, VDD = 1.7 V to 3.6 V | max 100 ns | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 01; CL = 50 pF, VDD ≥ 2.70 V | max 25 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 01; CL = 50 pF, VDD ≥ 1.7 V | max 12.5 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 01; CL = 10 pF, VDD ≥ 2.70 V | max 50 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 01; CL = 10 pF, VDD ≥ 1.7 V | max 20 MHz | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 01; CL = 50 pF, VDD ≥2.7 V | max 10 ns | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 01; CL = 50 pF, VDD ≥ 1.7 V | max 20 ns | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 01; CL = 10 pF, VDD ≥ 2.70 V | max 6 ns | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 01; CL = 10 pF, VDD ≥ 1.7 V | max 10 ns | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 10; CL = 40 pF, VDD ≥ 2.70 V | max 50 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 10; CL = 40 pF, VDD ≥ 1.7 V | max 25 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 10; CL = 10 pF, VDD ≥ 2.70 V | max 100 MHz | 101 |
| Maximum frequency fmax(IO)out | OSPEEDRy[1:0] = 10; CL = 10 pF, VDD ≥ 1.7 V | max 50 MHz | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 10; CL = 40 pF, VDD≥ 2.70 V | max 6 ns | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 10; CL = 40 pF, VDD≥ 1.7 V | max 10 ns | 101 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 10; CL = 10 pF, VDD≥ 1.7 V | max 6 ns | 101 |
| Maximum frequency Fmax(IO)out | OSPEEDRy[1:0] = 11; CL = 30 pF, VDD ≥ 2.70 V | max 100 MHz | 102 |
| Maximum frequency Fmax(IO)out | OSPEEDRy[1:0] = 11; CL = 30 pF, VDD ≥ 1.7 V | max 50 MHz | 102 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 11; CL = 30 pF, VDD ≥ 2.70 V | max 4 ns | 102 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 11; CL = 30 pF, VDD ≥ 1.7 V | max 6 ns | 102 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 11; CL = 10 pF, VDD≥ 2.70 V | max 2.5 ns | 102 |
| Output high to low level fall time and output low to high level rise time tf(IO)out/tr(IO)out | OSPEEDRy[1:0] = 11; CL = 10 pF, VDD≥ 1.7 V | max 4 ns | 102 |
| Pulse width of external signals detected by the EXTI controller tEXTIpw | min 10 ns | 102 | |
| USB OTG FS transceiver startup time tSTARTUP | max 1 us | 112 | |
| USB OTG FS operating voltage VDD | min 3 · max 3.6 V | 112 | |
| Differential input sensitivity VDI | I(USB_FS_DP/DM) | min 0.2 V | 112 |
| Differential common mode range VCM | Includes VDI range | min 0.8 · max 2.5 V | 112 |
| Single ended receiver threshold VSE | min 1.3 · max 2 V | 112 | |
| Static output level low VOL | RL of 1.5 kΩ to 3.6 V | max 0.3 V | 112 |
| Static output level high VOH | RL of 15 kΩ to VSS | min 2.8 · max 3.6 V | 112 |
| PA11, PA12 (USB_FS_DM/DP) RPD | VIN = VDD | min 17 · typ 21 · max 24 kΩ | 112 |
| PA9 (OTG_FS_VBUS) RPD | VIN = VDD | min 0.65 · typ 1.1 · max 2 kΩ | 112 |
| PA11, PA12 (USB_FS_DM/DP) RPU | VIN = VSS | min 1.5 · typ 1.8 · max 2.1 kΩ | 112 |
| PA9 (OTG_FS_VBUS) RPU | VIN = VSS | min 0.25 · typ 0.37 · max 0.55 kΩ | 112 |
| Rise time tr | CL = 50 pF | min 4 · max 20 ns | 113 |
| Fall time tf | CL = 50 pF | min 4 · max 20 ns | 113 |
| Rise/ fall time matching trfm | tr/tf | min 90 · max 110 % | 113 |
| Output signal crossover voltage VCRS | min 1.3 · max 2 V | 113 | |
| Power supply VDDA | min 1.7 · max 3.6 V | 113 | |
| Positive reference voltage VREF+ | VDDA −VREF+ < 1.2 V | min 1.7 V | 113 |
| ADC clock frequency fADC | VDDA = 1.7 to 2.4 V | min 0.6 · typ 15 · max 18 MHz | 113 |
| ADC clock frequency fADC | VDDA = 2.4 to 3.6 V | min 0.6 · typ 30 · max 36 MHz | 113 |
| External trigger frequency fTRIG | fADC = 30 MHz, 12-bit resolution | max 1764 kHz | 113 |
| External trigger frequency fTRIG | fADC = 30 MHz, 12-bit resolution | max 17 1/fADC | 113 |
| Conversion voltage range VAIN | VSSA or VREF- tied to ground | min 0 V | 113 |
| External input impedance RAIN | See Equation 1 for details | max 50 kΩ | 113 |
| Sampling switch resistance RADC | max 6 kΩ | 113 | |
| Internal sample and hold capacitor CADC | typ 4 · max 7 pF | 113 | |
| Resistor bridge for VBAT R | typ 50 KΩ | 120 | |
| Ratio on VBAT measurement Q | typ 4 | 120 | |
| Error on Q Er | min -1 · max 1 % | 120 | |
| ADC sampling time when reading the VBAT 1 mV accuracy TS_vbat | min 5 us | 120 | |
| Internal reference voltage VREFINT | - 40 °C < TA < + 125 °C | min 1.18 · typ 1.21 · max 1.24 V | 120 |
| ADC sampling time when reading the internal reference voltage TS_vrefint | min 10 us | 120 | |
| Internal reference voltage spread over the temperature range VRERINT_s | VDD = 3V ± 10mV | typ 3 · max 5 mV | 120 |
| Temperature coefficient TCoeff | typ 30 · max 50 ppm/°C | 120 | |
| Startup time tSTART | typ 6 · max 10 us | 120 | |
| Thermal resistance junction-ambient ΘJA | UFQFPN48 | typ 32 °C/W | 140 |

heiso/macrolev
Macrolev is an open source analog keyboard powered by Hall Effect switches


jgillick/ThunderPack
A self-contained microcontroller, battery, and power management system that fits in your pocket.



Ramahabir/6-DOF-Robotics-Arm-Dynamixel
Open-source 6-DOF robot arm controller using STM32F411, Dynamixel servos, custom KiCad PCB, PWM gripper control, data logging, and planned ESP32-C3 wireless communication.

GroundStudio/GroundStudio_Magma_Splash
GroundStudio Magma Splash

Yes. The symbol is MCU_ST_STM32F4:STM32F411CEUx and the footprint Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.6x5.6mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
UFQFPN-48(7x7), with 49 pins. Its footprint is drawn on this page.
STMicroelectronics publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C2054095, with 463 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the STM32G431CBU6 by STMicroelectronics, the STM32F411CCU6 by STMicroelectronics, the STM32G473CEU6 by STMicroelectronics and the STM32H523CEU6 by STMicroelectronics. Check their datasheets: a part that fits the footprint may still differ in its ratings.
46 boards in 41 repositories on GitHub; the most starred are listed on this page, with their KiCad files.