2 layers50 × 50 mm Kicad projects dice, the printed circuit board in 3D

Kicad projects dice

resolution = [0.5, 0.5] pcbfolder = '../PCBs/' pcbnames = ["1Bitsy1bitsy"] iters = 30 env = PCBRoutingEnv(resolution=resolution, pcbfolder=pcbfolder, pcbnames=pcbnames) obs, info = env.reset() for in range(iters): act =…

Open in PCBKit

Size: 50 × 50 mm
Copper layers: 2
Thickness: 1.6 mm
Parts: 26
Nets: 23
Pads: 106
Tracks, vias: 319, 35
Routed: Yes
KiCad: KiCad 5 (file 20171130)
Created: 28 Mar 2023
Updated: 18 Jan 2024

Overview

Kicad projects dice is an open-source printed circuit board by PCBench, from the PCBench/PCBench repository on GitHub, published under the MIT licence. It is a 2-layer board of 50 × 50 mm with 26 parts on 23 nets, routed with 319 tracks and 35 vias.

It is built around the 74LS27P-E, 74LS32SC and 74LS393P-E. Its parts include 7 diodes, 6 resistors, 5 ICs, 4 capacitors and 2 connectors.

Main components

README

README.md

PCBench: A Dataset for Printed Circuit Board Routing

PCBench is a dataset for PCB routing task, it includes a dataset consisting of 164 printed circuit boards (PCB), a data augmentation script to expand the dataset for supervised learning (SL) tasks, and a reinforcement learning (RL) environment.

Dataset

Folder Structure

All the PCB designs in our dataset are stored in the folder PCBs, where each PCB design is stored in a subfolder named {author/org}_{PCB_name}_{design_version(optional)}. Below is the folder structure of the dataset.

text

├── PCBs
│   ├── master_metadata.json
│   ├── subfolder1
│   │   ├── raw.kicad_pcb
│   │   ├── processed.kicad_pcb
│   │   ├── final.json
│   │   ├── metadata.json
│   │   ├── visual.png
│   ├── subfolder2
│   │   ├── raw.kicad_pcb
│   │   ├── processed.kicad_pcb
│   │   ├── final.json
│   │   ├── metadata.json
│   │   ├── visual.png
│   ├── ...

The raw.kicad_pcb is the raw PCB design file, process.kicad_pcb is the file after cleaning up, final.json stores only routing-related information used for ML tasks. metadata.json stores the meta information for each single PCB design. visual.png is a visualization of each single PCB design. master_meta.json contains metadata of all PCBs and global-level information.

PCB Routing Description Language (PCB-RDL)

We propose a JSON specification (final.json for each PCB design) called the PCB Routing Description Language (PCB-RDL) that expresses a PCB routing problem and its solutions intuitively using basic concepts in order to facilitate research into automated PCB routing using ML. Following figure shows is an example of PCB with marked components in PCB-RDL (Left) and it corrsponding PCB-RDL (Right).

PCB example

Data Augmentation

Run

The augmentation data can be generated with the script Scripts/Data_augmentation/augmentation.py. To generate 3 samples by randomly extracting 50% nets from the PCB 1Bitsy_1bitsy, please run the following command

text

cd Scripts/Data_augmentation/
python augmentation.py --num_samples 3 --net_ratio 0.5 --pcb_name 1Bitsy_1bitsy

Output

All the generated PCBs will be stored in the folder named augmented_data under Scripts/Data_augmentation/. In augmented_data, all the generated samples will be stored in a subfolder with the name of selected PCB. Each generated sample has the name sample_index.json. For example, the above command will generate the following file under Scripts/Data_augmentation/

text

├── augmented_data
│   ├── 1Bitsy_1bitsy
│   │   ├── 1.json
│   │   ├── 2.json
│   │   ├── 3.json

RL environment

Installation

The RL environment requires Python >= 3.7. You can simply install the environment with the following commands:

text

git clone https://github.com/PCBench/PCBench.git
cd PCBench
python setup.py install

After installation, open a Python console and type

text

from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnv

If no error occurs, you have successfully installed the PCB routing environment.

API Usage

The following content shows an example of API usage of PCBRoutingEnv.

text

from RLEnv.EnvLayer.PCBRoutingEnv import PCBRoutingEnv
import random

resolution = [0.5, 0.5]
pcb_folder = '../PCBs/'
pcb_names = ["1Bitsy_1bitsy"]
iters = 30
env = PCBRoutingEnv(resolution=resolution, pcb_folder=pcb_folder, pcb_names=pcb_names)
obs, info = env.reset()
for _ in range(iters):
    act = random.randint(0,5)
    obs, rew, terminal, _, info = env.step(act)
    if terminal:
        env.reset()

You can find more examples of customizing functions of reward and state observation from RLEnv/examples.ipynb.

Parts

Qty	Value	Footprint	References
7	LED	LEDs:LED-5MM	D1, D2, D3, D4, D5, D6, D7
4	220	Capacitors_SMD:C_1206	R3, R4, R5, R6
2	0.01uF	Capacitors_SMD:C_1206	C2, C3
2	10K	Capacitors_SMD:C_1206	R1, R2
1	0.1uF	Capacitors_SMD:C_1206	C1
1	22uF	Capacitors_SMD:C_1206	C4
1	555	Housings_SOIC:SOIC-8_3.9x4.9mm_Pitch1.27mm	U5
1	74LS08	Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm	U2
1	74LS27	Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm	U3
1	74LS32	Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm	U4
1	74LS393	Housings_SOIC:SOIC-14_3.9x8.7mm_Pitch1.27mm	U1
1	CONN_01X01	Socket_Strips:Socket_Strip_Straight_1x01	P1
1	PWR	LEDs:LED-5MM	SW1
1	PWR	Socket_Strips:Socket_Strip_Straight_1x02	P2
1	SLOW PULSE	Socket_Strips:Socket_Strip_Straight_1x03	SLOW

Questions

How big is the Kicad projects dice PCB?

It measures 50 × 50 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Kicad projects dice use?

26 parts, built around the 74LS27P-E, 74LS32SC and 74LS393P-E. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Kicad projects dice KiCad files?

From the PCBench/PCBench repository on GitHub, at the commit this page was made from: the board is PCBs/kicad-projects_dice/processed.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Kicad projects dice design in my own project?

Its repository publishes it under the MIT licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

Project files

Show this board on your page

A live frame, for any web page

<iframe src="https://pcbkit.io/embed/boards/pcbench-pcbench-processed-9" title="Kicad projects dice in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe>

A picture

<img src="https://pcbkit.io/embed/boards/pcbench-pcbench-processed-9.jpg" alt="Kicad projects dice" width="1200" height="900">

A picture that opens the board, for a README

[![Kicad projects dice](https://pcbkit.io/embed/boards/pcbench-pcbench-processed-9.jpg?size=s)](https://pcbkit.io/boards/pcbench-pcbench-processed-9)

Source

Repository: PCBench/PCBench
Board file: PCBs/kicad-projects_dice/processed.kicad_pcb
Commit: dec3be7
Licence: MIT
Copies: 2 copies in 2 repositories

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