4 layers93 × 26.7 mm
Tram tangnano
dg1vs/Transputer-TRAM-TangNano
A TRAM-size FPGA Transputer module based on the Sipeed Tang Nano 20K.
41 parts2
Boards by dg1vs
6 boardsOpen-source boards designed in KiCad by dg1vs on GitHub, from 3 repositories. A board’s address here is its repository’s there.
- 4 layers160 × 100 mm
Tram baseboard
dg1vs/Transputer-Base-Board
This project is a 4-TRAM Transputer Base-Board. TRAMs are small subassemblies of transputers (or other components with INMOS links), a few discrete components, and sometimes some RAM and/or application specific…
32 partsGPL-3.0 - 4 layers160 × 100 mm
Link teensy
dg1vs/Transputer-Teensy-Link
A family of practical, Ethernet-connected link interfaces for classic INMOS transputer systems, based on the Teensy 4.1.
376 parts - 2 layers128.4 × 59.8 mm
Backplane
dg1vs/Transputer-Base-Board
This project is a 4-TRAM Transputer Base-Board. TRAMs are small subassemblies of transputers (or other components with INMOS links), a few discrete components, and sometimes some RAM and/or application specific…
15 partsGPL-3.0 - 4 layers80 × 45.5 mm
Link teensy fpga
dg1vs/Transputer-Teensy-Link
A family of practical, Ethernet-connected link interfaces for classic INMOS transputer systems, based on the Teensy 4.1.
23 parts - 4 layers80 × 50 mm
Link teensy small
dg1vs/Transputer-Teensy-Link
A family of practical, Ethernet-connected link interfaces for classic INMOS transputer systems, based on the Teensy 4.1.
41 parts