4 layers85 × 55 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
29 parts2
4 layers52 × 40 mm
Device
jayis1/hacker-devices2Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
- Size
- 52 × 40 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 18
- Nets
- 26
- Pads
- 90
- Tracks, vias
- 10, 0
- Routed
- Yes
- KiCad
- KiCad 8 (file 20240108)
- Created
- 12 Jun 2026
- Updated
- 6 Nov 2026
Overview
Device is an open-source printed circuit board by jayis1, from the jayis1/hacker-devices repository on GitHub. It is a 4-layer board of 52 × 40 mm with 18 parts on 26 nets, routed with 10 tracks and 0 vias.
It is built around the STM32G474RET6, ICE40UP5K-SG48I and USBLC6-2SC6. Its parts include 11 ICs, 3 connectors, 3 switches and 1 diode. It belongs with the STM32 and FPGA and CPLD boards of this library.
Main components
3
STM32G474RET6
LQFP-64(10x10)-40℃~+85℃ 1.71V~3.6V 128KB 12bit 12bit 170MHz 32 Bit 512KB 52 ARM Cortex-M4F Built-in FLASH LQFP-64(10x10) Microcontrollers (MCU/MPU/SOC) ROHSSTMicroelectronicsMicrocontrollers (MCU/MPU/SOC)
ICE40UP5K-SG48I
QFN-48-EP(7x7)-40℃~+100℃ 1.14V~1.26V 1171456bit 39 5280 660 iCE40 UltraPlus QFN-48-EP(7x7) Programmable Logic Device (CPLDs/FPGAs) ROHSLatticeProgrammable Logic Device (CPLDs/FPGAs)
USBLC6-2SC6
SOT-23-60.35pF、0.8pF 100nA 150W@8/20us 15V 2 5V 6A@8/20us 6V ESD SOT-23-6 ESD and Surge Protection (TVS/ESD) ROHSUMWESD And Surge Protection (TVS/ESD)
README
README.mdHacker Devices — Open Hardware for Security Research
A collection of fully open-source hardware designs for legitimate security research and pentesting. Every device is complete end-to-end: engineering docs, KiCad schematics & PCB layouts, production C/Python firmware, and React Native companion apps. Build it, flash it, run the app, start researching.
What's Inside Every Device
No half-finished reference designs. Each device folder contains the full stack:
| Category | Files | Description |
|---|---|---|
| Engineering Docs | phase1_conceptual_architecture.md → phase4_software_stack.md | 4-phase design process: requirements, BOM & netlists, PCB layout rules, software stack |
| KiCad Schematics | kicad/*.kicad_pro, *.kicad_sch, *.kicad_pcb | Full schematic with real component symbols, net labels, power flags, and board outline with placed footprints |
| C/Python Firmware | firmware/main.c, registers.h, board.h, drivers/, Makefile | Production-quality MCU firmware — init code, drivers with DMA, USB descriptors, wire protocol |
| React Native App | app/App.js, screens/, components/, utils/protocol.js, package.json | Companion mobile app for device control, configuration, real-time status, and data capture |
Design Methodology
Every device follows a rigorous 4-phase process:
| Phase | Document | Contents |
|---|---|---|
| Phase 1 | phase1_conceptual_architecture.md | Purpose, performance targets, constraints, block diagram, bus topology, power domains |
| Phase 2 | phase2_component_selection_schematics.md | BOM with real part numbers, pinouts/MUX tables, decoupling networks, netlists, impedance matching |
| Phase 3 | phase3_pcb_blueprints_layout.md | PCB stackup, routing rules, length matching, via strategy, thermal management, DFM notes |
| Phase 4 | phase4_software_stack.md | MMIO/register defs, clock & GPIO init (production C), critical device driver, device tree, bootloader |
Devices
| # | Device | Status | Description |
|---|---|---|---|
| 1 | wifi-pentest-dongle/ | ✅ Complete | 802.11ax monitor/inject, deauth, PMKID capture |
| 2 | rf-transceiver-tool/ | ✅ Complete | Sub-GHz + 2.4GHz multi-protocol (CC1101 + nRF24) |
| 3 | badusb-injector | ⏳ Queued | HID emulation payload injector, multi-profile |
| 4 | nfc-rfid-cloner | ⏳ Queued | 13.56MHz + 125kHz, Mifare/EM4100 |
| 5 | network-tap-mitm | ⏳ Queued | 2× GbE transparent bridge, packet capture |
| 6 | can-bus-analyzer | ⏳ Queued | OBD-II + CAN-FD, automotive pentest |
| 7 | sdr-keyfob-replay | ⏳ Queued | 433/315MHz keyfob capture & replay |
| 8 | ble-sniffer-spoofer | ⏳ Queued | nRF52, advertisement inject, GATT fuzz |
| 9 | imsi-catcher-detector | ⏳ Queued | LTE/4G SDR analysis |
| 10 | biometric-bypass-toolkit | ⏳ Queued | Fingerprint emulation, RFID clone for access control |
Constraints
- BOM target: Under $100 per device
- Form factor: Portable, USB-powered or battery-operated
- All designs use real, purchasable components with exact part numbers
- KiCad schematics are valid KiCad 7+ format — open them directly
- Firmware is production-quality C — not stubs or pseudocode
- React Native apps have working UI with proper state management and wire protocol matching the firmware
License
| Component | License |
|---|---|
| Hardware design (KiCad) | CERN-OHL-S v2 |
| C firmware & drivers | GPL-2.0 |
| Python tools & scripts | MIT |
| React Native companion apps | MIT |
Parts
18| Qty | Value | Footprint | References |
|---|---|---|---|
| 1 | ADS7042 | Package_TO_SOT_SMD:SOT-23-6 | U11 |
| 1 | ARM | Button_Switch_SMD:SW_SPST_TL3301AN | SW1 |
| 1 | ATECC608B | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U8 |
| 1 | G6K-2F-Y NC FAILSAFE BYPASS | Relay_SMD:Relay_DPDT_Omron_G6K-2F-Y | K1 |
| 1 | INA226 | Package_SO:VSSOP-10_3x3mm_P0.5mm | U7 |
| 1 | MODE | Button_Switch_SMD:SW_SPST_TL3301AN | SW2 |
| 1 | MX25L12835F | Package_SO:SOIC-8_5.3x5.3mm_P1.27mm | U6 |
| 1 | NVT2002DP DOWNSTREAM | Package_SO:TSSOP-8_3x3mm_P0.65mm | U4 |
| 1 | NVT2002DP UPSTREAM | Package_SO:TSSOP-8_3x3mm_P0.65mm | U3 |
| 1 | RFFE DOWNSTREAM | Connector_FFC-FPC:Hirose_FH12-6S-0.5SH_1x06-1MP_P0.50mm_Horizontal | J2 |
| 1 | RFFE UPSTREAM | Connector_FFC-FPC:Hirose_FH12-6S-0.5SH_1x06-1MP_P0.50mm_Horizontal | J1 |
| 1 | RGB STATUS | LED_SMD:LED_RGB_0606 | D1 |
| 1 | STM32G474RET6 | Package_QFP:LQFP-64_10x10mm_P0.5mm | U1 |
| 1 | TPS62172 5V TO 3V3 | Package_DFN_QFN:WSON-10_2x2mm_P0.5mm | U9 |
| 1 | TPS62840 TRANSLATOR RAIL | Package_DFN_QFN:WSON-8_2x1.5mm_P0.5mm | U10 |
| 1 | USB-C | Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal | J3 |
| 1 | USBLC6-2SC6 | Package_TO_SOT_SMD:SOT-23-6 | U12 |
| 1 | iCE40UP5K-SG48 | Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.2x5.2mm | U2 |
Questions
How big is the Device PCB?
It measures 52 × 40 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Device use?
18 parts, built around the STM32G474RET6, ICE40UP5K-SG48I and USBLC6-2SC6. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Device KiCad files?
From the jayis1/hacker-devices repository on GitHub, at the commit this page was made from: the board is rffe-sentinel/kicad/device.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Can I use the Device design in my own project?
Its repository states no licence, so its author keeps all rights: ask jayis1 before reusing the design.
More from jayis1/hacker-devices
12- 70 × 40 mm
Silent symphony
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
27 parts2 - 4 layers65 × 30 mm
Chronos phantom
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
26 parts2 - 4 layers70 × 45 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
25 parts2 - 4 layers85 × 24 mm
Trace reaper
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
24 parts2 - 4 layers86 × 55 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
22 parts2 - 4 layers120 × 22 mm
Acoustic phantom
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
20 parts2 - 4 layers80 × 40 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
20 parts2 - 4 layers85 × 54 mm
Rf transceiver tool
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
20 parts2 - 2 layers118 × 68 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
19 parts2 - 4 layers50 × 24 mm
Ghostbus
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
18 parts2 - 4 layers22 × 18 mm
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
18 parts2
Similar boards
- 4 layers52 × 48 mm
Hand hub
6thSense-dev/mocap-glove
Magnetic MoCap glove firmware, tracking diagnostics and local hand visualizer
106 parts - 4 layers102.8 × 23.1 mm
- 4 layers55 × 50 mm
- 2 layers23.6 × 57.7 mm
- 6 layers80 × 60 mm
Ice core
enkhbold470/ice-core
iCE40UP5K FPGA board with 8 MB PSRAM and three Pmods, programmed over USB-C by an RP2040. 6-layer KiCad 10 board.
78 partsCERN-OHL-S-2.0 - 4 layers
- 2 layers57.6 × 39.8 mm
Tk1-0805
kr-Eliza/tkey-open-hardware-reproduction
Reproducing the Tillitis TKey open hardware security key: 2-layer hand-solderable PCB, lab assembly and bring-up, Voltera prototype, SBOM
66 partsCERN-OHL-S-2.0 - 4 layers100 × 52.3 mm
