
Ss main board
loopj/short-stack
World's Smallest Nintendo Wii, using a trimmed motherboard and custom stacked PCBs
Microchip TechnologyExtended
-40℃~+105℃ 1.8V~5.5V 10bit 16KB 18 20MHz 256Byte 2KB 8 Bit 8bit AVR Built-in FLASH QFN-20-EP(3x3) Microcontrollers (MCU/MPU/SOC) ROHS
The ATTINY1616-MN is a microcontroller made by Microchip Technology in a QFN-20-EP(3x3) package with 21 pins. -40℃~+105℃ 1.8V~5.5V 10bit 16KB 18 20MHz 256Byte 2KB 8 Bit 8bit AVR Built-in FLASH QFN-20-EP(3x3) Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (MCU_Microchip_ATtiny:ATtiny1616-M, from KiCad's library) and its footprint (Package_DFN_QFN:VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm, from KiCad's library), ready for a KiCad board. 3 are in stock at JLCPCB (part C507118). 103 open-source boards in 71 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Power Supply Voltage VDD | min -0.5 · max 6 V | 552 | |
| Current into a VDD pin IVDD | T=[-40, 85]°C | max 200 mA | 552 |
| Current into a VDD pin IVDD | T=[85, 125]°C | max 100 mA | 552 |
| Current out of a GND pin IGND | T=[-40, 85]°C | max 200 mA | 552 |
| Current out of a GND pin IGND | T=[85, 125]°C | max 100 mA | 552 |
| RESET pin voltage with respect to GND VRST | min -0.5 · max 13 V | 552 | |
| Pin voltage with respect to GND VPIN | min -0.5 V | 552 | |
| I/O pin sink/source current IPIN | min -40 · max 40 mA | 552 | |
| I/O pin injection current except RESET pin Ic1(1) | Vpin<GND-0.6V or 5.5V<Vpin≤6.1V; 4.9V<VDD≤5.5V | min -1 · max 1 mA | 552 |
| I/O pin injection current except RESET pin Ic2(1) | Vpin<GND-0.6V or Vpin≤5.5V; VDD≤4.9V | min -15 · max 15 mA | 552 |
| Sum of I/O pin injection current except RESET pin Ictot | min -45 · max 45 mA | 552 | |
| Storage temperature Tstorage | min -65 · max 150 °C | 552 | |
| Operating Supply Voltage VDD | min 1.8 · max 5.5 V | 553 | |
| Operating temperature range(1) T | Standard temperature range | min -40 · max 105 °C | 553 |
| Operating system clock frequency CLK_CPU | VDD=[1.8, 5.5]V; T=[-40, 105]°C(1) | min 0 · max 5 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[2.7, 5.5]V; T=[-40, 105]°C(2) | min 0 · max 10 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[4.5, 5.5]V; T=[-40, 105]°C(3) | min 0 · max 20 MHz | 553 |
| Active power consumption | ATtiny1616; CLK_CPU=20 MHz (OSC20M); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 10.2 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=10 MHz (OSC20M div2); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 5.5 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=10 MHz (OSC20M div2); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 3.1 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 3.2 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 1.8 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=2V; T=25°C; peripherals disabled, without I/O drive | typ 1.2 mA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 13.5 uA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 7.5 uA | 554 |
| Active power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=2V; T=25°C; peripherals disabled, without I/O drive | typ 5 uA | 554 |
| Idle power consumption | ATtiny1616; CLK_CPU=20 MHz (OSC20M); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 4.3 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=10 MHz (OSC20M div2); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 2.5 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=10 MHz (OSC20M div2); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 1.4 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 1.6 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 0.9 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=5 MHz (OSC20M div4); VDD=2V; T=25°C; peripherals disabled, without I/O drive | typ 0.6 mA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=5V; T=25°C; peripherals disabled, without I/O drive | typ 8.2 uA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=3V; T=25°C; peripherals disabled, without I/O drive | typ 4.2 uA | 555 |
| Idle power consumption | ATtiny1616; CLK_CPU=32 KHz (OSCULP32K); VDD=2V; T=25°C; peripherals disabled, without I/O drive | typ 2.6 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from external XOSC32K (CL=7.5 pF); VDD=3V; typical at 25°C | typ 0.69 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from internal OSCULP32K; VDD=3V; typical at 25°C, maximum at 85°C | typ 0.71 · max 6 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from internal OSCULP32K; VDD=3V; maximum at 125°C | max 8 uA | 555 |
| Power-down/Standby power consumption are the same when all peripherals are stopped | ATtiny1616; all peripherals stopped; VDD=3V; typical at 25°C, maximum at 85°C | typ 0.1 · max 5 uA | 555 |
| Power-down/Standby power consumption are the same when all peripherals are stopped | ATtiny1616; all peripherals stopped; VDD=3V; maximum at 125°C | max 7 uA | 555 |
| Reset power consumption | ATtiny1616; Reset line pulled down; VDD=3V; typical at 25°C | typ 100 uA | 555 |
| Start-up time from any Reset release twakeup | VDD=3V; T=25°C; OSC20M | typ 200 us | 557 |
| Wake-up from Idle mode twakeup | OSC20M @ 20 MHz; VDD=5V; T=25°C | typ 1 us | 557 |
| Wake-up from Idle mode twakeup | OSC20M @ 10 MHz; VDD=3V; T=25°C | typ 2 us | 557 |
| Wake-up from Idle mode twakeup | OSC20M @ 5 MHz; VDD=2V; T=25°C | typ 4 us | 557 |
| Wake-up from Standby and Power-down mode twakeup | VDD=3V; T=25°C; OSC20M | typ 10 us | 557 |
| BOD | Continuous; VDD=3V; T=25°C; Idle Sleep mode; OSC20M at 1 MHz; module current only | typ 19 uA | 558 |
| BOD | Sampling @ 1 kHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 1.2 uA | 558 |
| TCA | 16-bit count @ 1 MHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 12.6 uA | 558 |
| TCB | 16-bit count @ 1 MHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 7.4 uA | 558 |
| RTC | 16-bit count; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 1.2 uA | 558 |
| WDT | VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 0.7 uA | 558 |
| OSC20M | VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 125 uA | 558 |
| AC | Fast mode(2); CPU in Standby mode; VDD=3V; T=25°C; module current only | typ 92 uA | 558 |
| AC | Low-power mode(2); CPU in Standby mode; VDD=3V; T=25°C; module current only | typ 45 uA | 558 |
| ADC | 50 ksps; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 325 uA | 558 |
| ADC | 100 ksps; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 340 uA | 558 |
| XOSC32K | CL=7.5 pF; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 0.5 uA | 558 |
| USART | Enable @ 9600 Baud; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 13 uA | 558 |
| SPI (Master) | Enable @ 100 kHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 2.1 uA | 558 |
| TWI (Master) | Enable @ 100 kHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 23.9 uA | 558 |
| TWI (Slave) | Enable @ 100 kHz; VDD=3V; T=25°C; Idle Sleep mode; module current only | typ 17.1 uA | 558 |
| Flash programming | Erase Operation; VDD=3V; T=25°C; module current only | typ 1.5 mA | 558 |
| Flash programming | Write Operation; VDD=3V; T=25°C; module current only | typ 3 mA | 558 |
| Power-on Slope SRON | max 100 V/ms | 558 | |
| POR threshold voltage on VDD falling VPOR | VDD falls/rises at 0.5 V/ms or slower | min 0.8 · max 1.6 V | 559 |
| POR threshold voltage on VDD rising VPOR | VDD falls/rises at 0.5 V/ms or slower | min 1.4 · max 1.8 V | 559 |
| BOD triggering level (falling/rising) VBOD | BODLEVEL7 | min 3.9 · typ 4.2 · max 4.5 V | 559 |
| BOD triggering level (falling/rising) VBOD | BODLEVEL2 | min 2.4 · typ 2.6 · max 2.9 V | 559 |
| BOD triggering level (falling/rising) VBOD | BODLEVEL0 | min 1.7 · typ 1.8 · max 2 V | 559 |
| Interrupt level 0 VINT | Percentage above the selected BOD level | typ 4 % | 559 |
| Interrupt level 1 VINT | Percentage above the selected BOD level | typ 13 % | 559 |
| Interrupt level 2 VINT | Percentage above the selected BOD level | typ 25 % | 559 |
| Hysteresis VHYS | BODLEVEL7 | typ 80 mV | 559 |
| Hysteresis VHYS | BODLEVEL2 | typ 40 mV | 559 |
| Hysteresis VHYS | BODLEVEL0 | typ 25 mV | 559 |
| Detection time TBOD | Continuous | typ 7 us | 559 |
| Detection time TBOD | Sampled, 1 kHz | typ 1 ms | 559 |
| Detection time TBOD | Sampled, 125 Hz | typ 8 ms | 559 |
| Start-up time Tstart | Time from enable to ready | typ 40 us | 559 |
| RESET pin threshold for high-voltage Reset VHVRST | min 11.5 · max 12.5 V | 559 | |
| Input low-voltage for RESET VRST_VIL | min -0.2 V | 559 | |
| Minimum pulse-width on RESET pin tRST | max 2.5 us | 559 | |
| RESET pull-up resistor RRST | VReset=0V | min 20 · max 60 kΩ | 559 |
| Accuracy with 16 MHz and 20 MHz frequency selection relative to the factory-stored frequency value fOSC20M | Factory calibrated VDD=3V(1); T=[0, 70]°C; VDD=[1.8, 4.5]V(3) | min -2 · max 2 % | 560 |
| Accuracy with 16 MHz and 20 MHz frequency selection relative to the factory-stored frequency value fOSC20M | Factory calibrated VDD=5V(1); T=[0, 70]°C; VDD=[4.5, 5.5]V(3) | min -2 · max 2 % | 560 |
| Accuracy with 16 MHz and 20 MHz frequency selection fOSC20M | Factory calibrated; T=25°C, 3.0V | min -3 · max 3 % | 560 |
| Accuracy with 16 MHz and 20 MHz frequency selection fOSC20M | Factory calibrated; T=[0, 70]°C; VDD=[1.8, 3.6]V(3) | min -4 · max 4 % | 560 |
| Accuracy with 16 MHz and 20 MHz frequency selection fOSC20M | Factory calibrated; Full operation range(3) | min -5 · max 5 % | 560 |
| User calibration range fCAL | OSC20M(2) = 16 MHz | min 14.5 · max 17.5 MHz | 560 |
| User calibration range fCAL | OSC20M(2) = 20 MHz | min 18.5 · max 21.5 MHz | 560 |
| Calibration step size %CAL | typ 1.5 % | 560 | |
| Duty cycle DC | typ 50 % | 560 | |
| Start-up time Tstart | Within 2% accuracy | typ 8 us | 560 |
| Accuracy fOSCULP32K | Factory calibrated; T=25°C, 3.0V | min -3 · max 3 % | 560 |
| Accuracy fOSCULP32K | Factory calibrated; T=[0, 70]°C; VDD=[1.8, 3.6]V(1) | min -10 · max 10 % | 560 |
| Accuracy fOSCULP32K | Factory calibrated; Full operation range(1) | min -30 · max 30 % | 560 |
| Start-up time Tstart | typ 250 us | 560 | |
| Frequency Fout | typ 32.768 kHz | 560 | |
| Start-up time Tstart | CL=7.5 pF | typ 300 ms | 560 |
| Crystal load capacitance CL | min 7.5 · max 12.5 pF | 560 | |
| Parasitic capacitor load CTOSC1 | typ 5.5 pF | 561 | |
| Parasitic capacitor load CTOSC2 | typ 5.5 pF | 561 | |
| Equivalent Series Resistance - Safety Factor=3 ESR | CL=7.5 pF | max 80 kΩ | 561 |
| Equivalent Series Resistance - Safety Factor=3 ESR | CL=12.5 pF | max 40 kΩ | 561 |
| Frequency fCLCL | VDD=[1.8, 5.5]V | min 0 · max 5 MHz | 561 |
| Frequency fCLCL | VDD=[2.7, 5.5]V | min 0 · max 10 MHz | 561 |
| Frequency fCLCL | VDD=[4.5, 5.5]V | min 0 · max 20 MHz | 561 |
| Clock Period tCLCL | VDD=[1.8, 5.5]V | min 200 ns | 561 |
| Clock Period tCLCL | VDD=[2.7, 5.5]V | min 100 ns | 561 |
| Clock Period tCLCL | VDD=[4.5, 5.5]V | min 50 ns | 561 |
| High Time tCHCX | VDD=[1.8, 5.5]V | min 80 ns | 561 |
| High Time tCHCX | VDD=[2.7, 5.5]V | min 40 ns | 561 |
| High Time tCHCX | VDD=[4.5, 5.5]V | min 20 ns | 561 |
| Low Time tCLCX | VDD=[1.8, 5.5]V | min 80 ns | 561 |
| Low Time tCLCX | VDD=[2.7, 5.5]V | min 40 ns | 561 |
| Low Time tCLCX | VDD=[4.5, 5.5]V | min 20 ns | 561 |
| Input low-voltage, except RESET pin as I/O VIL | min -0.2 V | 561 | |
| I/O pin drive strength VOL | VDD=1.8V, IOL=1.5 mA | max 0.36 V | 561 |
| I/O pin drive strength VOL | VDD=3.0V, IOL=7.5 mA | max 0.6 V | 561 |
| I/O pin drive strength VOL | VDD=5.0V, IOL=15 mA | max 1 V | 561 |
| I/O pin drive strength VOH | VDD=1.8V, IOH=1.5 mA | min 1.44 V | 561 |
| I/O pin drive strength VOH | VDD=3.0V, IOH=7.5 mA | min 2.4 V | 561 |
| I/O pin drive strength VOH | VDD=5.0V, IOH=15 mA | min 4 V | 561 |
| Maximum combined I/O sink current per pin group(1) Itotal | max 100 mA | 561 | |
| Maximum combined I/O source current per pin group(1) Itotal | max 100 mA | 561 | |
| θJA [°C/W] θJA | 20-pin VQFN (ZCL) | typ 79.7 °C/W | 624 |
| θJC [°C/W] θJC | 20-pin VQFN (ZCL) | typ 36 °C/W | 624 |
| I/O pin injection current except RESET pin Ic1 | Vpin<GND-0.6V or 5.5V<Vpin≤6.1V; 4.9V<VDD≤5.5V; note 1 | min -1 · max 1 mA | 552 |
| I/O pin injection current except RESET pin Ic2 | Vpin<GND-0.6V or Vpin≤5.5V; VDD≤4.9V; note 1 | min -15 · max 15 mA | 552 |
| Operating Supply Voltage VDD | Operation ensured down to 1.8V or BOD triggering level, VBOD; extended temperature range only ensured down to 2.7V | min 1.8 · max 5.5 V | 553 |
| Operating temperature range T | Standard temperature range; refer to device ordering codes | min -40 · max 105 °C | 553 |
| Operating temperature range T | Extended temperature range; only ensured down to 2.7V; refer to device ordering codes | min -40 · max 125 °C | 553 |
| Operating system clock frequency CLK_CPU | VDD=[1.8, 5.5]V; T=[-40, 105]°C; operation ensured down to BOD triggering level with BODLEVEL0 | min 0 · max 5 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[2.7, 5.5]V; T=[-40, 105]°C; operation ensured down to BOD triggering level with BODLEVEL2 | min 0 · max 10 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[4.5, 5.5]V; T=[-40, 105]°C; operation ensured down to BOD triggering level with BODLEVEL7 | min 0 · max 20 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[2.7, 5.5]V; T=[-40, 125]°C; operation ensured down to BOD triggering level with BODLEVEL2 | min 0 · max 8 MHz | 553 |
| Operating system clock frequency CLK_CPU | VDD=[4.5, 5.5]V; T=[-40, 125]°C; operation ensured down to BOD triggering level with BODLEVEL7 | min 0 · max 16 MHz | 553 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from external XOSC32K (CL=7.5 pF); VDD=3V; T=25°C | typ 0.69 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from internal OSCULP32K; VDD=3V; T=25°C | typ 0.71 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from internal OSCULP32K; VDD=3V; T=85°C | max 6 uA | 555 |
| Standby power consumption | ATtiny1616; RTC running at 1.024 kHz from internal OSCULP32K; VDD=3V; T=125°C | max 8 uA | 555 |
| Power-down/Standby power consumption are the same when all peripherals are stopped | ATtiny1616; all peripherals stopped; VDD=3V; T=25°C | typ 0.1 uA | 555 |
| Power-down/Standby power consumption are the same when all peripherals are stopped | ATtiny1616; all peripherals stopped; VDD=3V; T=85°C | max 5 uA | 555 |
| Power-down/Standby power consumption are the same when all peripherals are stopped | ATtiny1616; all peripherals stopped; VDD=3V; T=125°C | max 7 uA | 555 |
| Reset power consumption | ATtiny1616; reset line pulled down; VDD=3V; T=25°C | typ 100 uA | 555 |
| Start-up time from any Reset release twakeup | VDD=3V; T=25°C; OSC20M system clock | typ 200 us | 557 |
| Wake-up from Standby and Power-down mode twakeup | VDD=3V; T=25°C; OSC20M system clock | typ 10 us | 557 |
| BOD | Continuous; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 19 uA | 558 |
| BOD | Sampling @ 1 kHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 1.2 uA | 558 |
| TCA | 16-bit count @ 1 MHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 12.6 uA | 558 |
| TCB | 16-bit count @ 1 MHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 7.4 uA | 558 |
| RTC | 16-bit count; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 1.2 uA | 558 |
| WDT | VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 0.7 uA | 558 |
| OSC20M | VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 125 uA | 558 |
| AC | Fast mode; CPU in Standby mode; VDD=3V; T=25°C; module current only | typ 92 uA | 558 |
| AC | Low-power mode; CPU in Standby mode; VDD=3V; T=25°C; module current only | typ 45 uA | 558 |
| ADC | 50 ksps; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 325 uA | 558 |
| ADC | 100 ksps; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 340 uA | 558 |
| XOSC32K | CL=7.5 pF; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 0.5 uA | 558 |
| USART | Enable @ 9600 Baud; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 13 uA | 558 |
| SPI (Master) | Enable @ 100 kHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 2.1 uA | 558 |
| TWI (Master) | Enable @ 100 kHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 23.9 uA | 558 |
| TWI (Slave) | Enable @ 100 kHz; VDD=3V; T=25°C; OSC20M at 1 MHz; Idle Sleep; module current only | typ 17.1 uA | 558 |
| SCK clock frequency fSCK | Master | max 10 MHz | 563 |
| SCK period tSCK | Master | min 100 ns | 563 |
| SCK rise time tSCKR | Master | typ 2.7 ns | 563 |
| SCK fall time tSCKF | Master | typ 2.7 ns | 563 |
| MISO setup to SCK tMIS | Master | typ 10 ns | 563 |
| MISO hold after SCK tMIH | Master | typ 10 ns | 563 |
| MOSI hold after SCK tMOH | Master | typ 1 ns | 563 |
| Slave SCK clock frequency fSSCK | Slave | max 5 MHz | 564 |
| SCK rise time tSSCKR | Slave | max 1600 ns | 564 |
| SCK fall time tSSCKF | Slave | max 1600 ns | 564 |
| MOSI setup to SCK tSIS | Slave | min 3 ns | 564 |
| SS setup to SCK tSSS | Slave | min 21 ns | 564 |
| SS hold after SCK tSSH | Slave | min 20 ns | 564 |
| MISO setup to SCK tSOS | Slave | typ 8 ns | 564 |
| MISO hold after SCK tSOH | Slave | typ 13 ns | 564 |
| MISO setup after SS low tSOSS | Slave | typ 11 ns | 565 |
| MISO hold after SS low tSOSH | Slave | typ 8 ns | 565 |
| SCL clock frequency fSCL | Max. frequency requires system clock at 10 MHz, which, in turn, requires VDD=[2.7, 5.5]V and T=[-40, 105]°C | min 0 · max 1000 kHz | 565 |
| Output low voltage VOL | Iload=3 mA, Normal mode, VDD>2V | max 0.4 V | 565 |
| Low-level output current IOL | fSCL≤400 kHz, VOL=0.4V | min 3 mA | 565 |
| Low-level output current IOL | fSCL≤1 MHz, VOL=0.4V | min 20 mA | 565 |
| Capacitive load for each bus line CB | fSCL≤100 kHz | max 400 pF | 565 |
| Capacitive load for each bus line CB | fSCL≤400 kHz | max 400 pF | 565 |
| Capacitive load for each bus line CB | fSCL≤1 MHz | max 550 pF | 565 |
| Internal reference voltage INT11V | VDD=[1.8V, 3.6V]; T=[0 - 105]°C; based on characterization, not covered by production test limits | min -2 · max 2 % | 568 |
| Internal reference voltage INT055V, INT15V, INT25V | VDD=[1.8V, 3.6V]; T=[0 - 105]°C; based on characterization, not covered by production test limits | min -3 · max 3 % | 568 |
| Internal reference voltage INT055V, INT11V, INT15V, INT25V, INT43V | VDD=[1.8V, 5.5V]; T=[-40 - 125]°C; based on characterization, not covered by production test limits | min -5 · max 5 % | 568 |
| Internal reference voltage INT055V, INT11V, INT15V, INT25V | VDD=[1.8V, 3.6V]; T=[0 - 105]°C; based on characterization, not covered by production test limits | min -3 · max 3 % | 568 |
| Supply Voltage(1) VDD | DAC; supply voltage must meet the VDD specification for the VREF level used as DAC reference | min 1.8 · typ 3 · max 5.5 V | 571 |
| Resistive External Load RLoad | DAC | min 5 kΩ | 571 |
| Capacitive External Load CLoad | DAC | max 30 pF | 571 |
| Output Voltage Range VOUT | DAC; maximum VDD-0.2 V | min 0.2 V | 571 |
| Output sink/source IOUT | DAC | typ 1 mA | 571 |
| Maximum Conversion Rate fDAC | 0.55V≤ VREF≤2.5V | typ 350 ksps | 571 |
| Maximum Conversion Rate fDAC | VREF=4.3V | typ 270 ksps | 571 |
| Resolution Res | max 8 bits | 571 | |
| Integral Non-Linearity INL | 0.55V≤VREF≤4.3 | typ 0.3 LSB | 571 |
| Differential Non-Linearity DNL | 0.55V≤VREF≤4.3 | typ 0.25 LSB | 571 |
| Offset Error EOFF | VREF =1.1V, VCC = 3.0 T=25°C; typical ±0.25 LSB | typ 0.25 LSB | 571 |
| Gain Error EGAIN | VREF=1.1V, VCC = 3.0 T=25°C; typical ±1 LSB | typ 1 LSB | 571 |
| Input voltage VIN | maximum VDD | min -0.2 V | 571 |
| Input pin capacitance CIN | PA6 | typ 9 pF | 571 |
| Input pin capacitance CIN | PA7, PB5, PB4 | typ 5 pF | 571 |
| Input offset voltage VOFF | VIN=VDD/2; typical <5 mV | min -20 · max 20 mV | 571 |
| Input leakage current IL | typ 5 nA | 571 | |
| Start-up time TSTART | typ 1.3 us | 571 | |
| θJA θJA | 20-pin VQFN (ZCL) | typ 79.7 °C/W | 624 |
| θJC θJC | 20-pin VQFN (ZCL) | typ 36 °C/W | 624 |

loopj/short-stack
World's Smallest Nintendo Wii, using a trimmed motherboard and custom stacked PCBs



kieraneglin/hexagon-art
A passive breakout board: two lever-terminal inputs, three JST XH outputs, all six conductors (RX bus, two spares, +12V, GND, +5V) paralleled straight across. No active components, no regulation, nothing to configure.

engineerbo/flashlight-dev-hw
This repository contains design files for the development board for a flashlight boost driver. The test firmware can be found in the firmware repository.

hojadurdy/Flux_Capacitor_Micro
A tiny (36mm x 29mm) pin badge and keychain PCB version of Flux Capacitor featuring 25 animated LEDs that animate to create the “fluxxing” effect.


Yes. The symbol is MCU_Microchip_ATtiny:ATtiny1616-M and the footprint Package_DFN_QFN:VQFN-20-1EP_3x3mm_P0.4mm_EP1.7x1.7mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
QFN-20-EP(3x3), with 21 pins. Its footprint is drawn on this page.
Microchip Technology publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C507118, with 3 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the ATTINY816-MN by Microchip Technology, the ATTINY416-MN by Microchip Technology, the ATTINY1616-MF by Microchip Technology and the ATTINY1606-MN by Microchip Technology. Check their datasheets: a part that fits the footprint may still differ in its ratings.
103 boards in 71 repositories on GitHub; the most starred are listed on this page, with their KiCad files.