Mgm210l sensor

Hardware — schematic + PCB

KiCad 8/9 design for Dormouse, the MGM210L CR2032 temperature + humidity sensor. The schematic (electrical connectivity) and the routed PCB are both here. (File basenames stay mgm210l_sensor.* — renaming a finalized, already-ordered KiCad project risks breaking internal references for no functional gain.)

Not committed (regenerable, .gitignored): the netlist (.net), text reports (-drc.rpt/-erc.rpt/_drc_violations.json), Freerouting exchange files (.dsn/.ses), and a local BOM copy — recreate them with the commands below. The canonical BOM + pick-and-place live in fab/.

Regenerate + re-export

cd hardware
python3 gen_sch.py            # -> .kicad_sch, .kicad_pro, mgm.kicad_sym
python3 gen_mgm_footprint.py  # -> mgm.pretty/MGM210LA22JNF.kicad_mod
python3 gen_enclosure_drawing.py  # -> mgm210l_sensor_enclosure_drawing.pdf (from the PCB)
kicad-cli sch export pdf     -o mgm210l_sensor.pdf mgm210l_sensor.kicad_sch
kicad-cli sch export netlist -o mgm210l_sensor.net mgm210l_sensor.kicad_sch
kicad-cli sch erc  mgm210l_sensor.kicad_sch     # 0 violations
kicad-cli pcb drc  mgm210l_sensor.kicad_pcb     # 0 errors (see PCB status below)

The PCB is not regenerated by a script — it is built from the schematic with KiCad's "Update PCB from Schematic" (F8) and then edited. Do not expect gen_*.py to touch it.

Nets (verified from the exported netlist)

• VDD — CR2032(+), MGM210L pin 13, SHT40 VDD, both 4.7 kΩ pull-ups, all three decoupling caps, SWD header VDD.
• GND — CR2032(−), MGM210L pins 6 & 14, SHT40 VSS, all caps, SWD header GND.
• SDA — MGM210L PC01 (pin 8), SHT40 SDA (pin 1), pull-up R1.
• SCL — MGM210L PC00 (pin 7), SHT40 SCL (pin 2), pull-up R2.
• SWCLK (PA01) / SWDIO (PA02) / RESETn (pin 11) — MGM210L ↔ SWD header.
• Unused module pins (PA03/PA04, PD00/PD01, PC02–PC05, DEC pin 5, DNC pin 12) are flagged no-connect. No RF net — the antenna is integrated in the module.

Pin numbering is datasheet-accurate: MGM210L per Data Sheet Rev 1.5 Table 6.1, SHT40 per Sensirion SHT4x §5.4 (1=SDA, 2=SCL, 3=VDD, 4=VSS). The footprint pad numbers match the symbol pin numbers, so they connect correctly.

Footprints

The passive/battery/header sizes are sensible defaults for a coin-cell sensor — change them in the FOOTPRINTS dict in gen_sch.py if you prefer 0603, a different coin holder, or a Tag-Connect debug pad.

MGM210LA22JNF land pattern (gen_mgm_footprint.py)

The pads are datasheet-exact (positions/sizes from the MGM210L Data Sheet Rev 1.5, §8.2 Table 8.1): three castellated edges of 6 pads each — left/bottom 1.1 × 1.6 mm at 1.71 mm pitch, right (power) 1.3 × 3.3 mm at 1.90 mm pitch. Pad numbers match the module pinout. The silk/courtyard are an approximation of the 13.0 × 15.5 mm body (documentation only), with the top edge marked as the integrated-antenna keepout and the bottom-layer VDD test-point keepout at (2.65, 6.45). Verify against the datasheet before ordering.

PCB status (routed)

• Board: 36.0 × 25.05 mm, 2 mm corner radius, 1.6 mm FR4, 2-layer.
• Placement: MGM210L (U1) at the top edge with its antenna toward the board edge — the antenna end of the module overhangs the top board edge by ~2.6 mm (deliberate, for antenna clearance); CR2032 holder (BT1) on the back (B.Cu); SHT40 (U2) near the bottom edge for airflow; decoupling by U1's power pads; I²C pull-ups on the bus.
• Ventilation: a through slot (~7.2 × 0.7 mm) is milled in the board directly at the SHT40 (U2) for faster RH response.
• Antenna keepout: the GND pours on both layers stop 8 mm short of the top edge, keeping copper/ground clear of the integrated antenna (datasheet §7).
• Ground pours: F.Cu + B.Cu, net GND.
• Routing: complete. All six signal/power nets (SWCLK, SWDIO, RESETn, SDA, SCL, VDD) are routed on two layers; GND returns through the pours. Autorouted with Freerouting, then the three final hops into the SHT40 were hand-finished with vias so they approach the pads from outside the sensor keepout.
• DRC: 0 copper errors — no shorts, clearance, or keepout violations, and 0 schematic-parity errors. Remaining reports are only: 7 GND "unconnected" (they close the instant zones are filled — headless tools don't fill zones) and 3 cosmetic warnings on the placed U1 (pin-1 silk dot, back-layer note, and a lib-mismatch) — all already fixed in mgm.pretty.

To finalise in KiCad

1. Open the board and Fill All Zones (B) — this completes the GND net and clears the 7 GND ratsnest items.
2. Update Footprints from Library (U1) — clears the 3 cosmetic warnings by pulling the corrected mgm:MGM210LA22JNF.
3. Optional: review trace widths vs. peak TX current; re-run DRC. (The RH vent slot at U2 is already cut into the board — see "Ventilation" above.)

Library note

fp-lib-table / sym-lib-table register the project-local mgm libraries via ${KIPRJMOD} (portable). For the headless KiCad-MCP backend to also resolve the custom footprint, mgm was additionally added to the global KiCad 9 fp-lib-table (~/.config/kicad/9.0/fp-lib-table) with an absolute path — remove that line if you relocate the project.