Windowmaster controller v2

Hardware v1.0

Current board: 88 × 130 mm, 2 layers, 68 components, 41 nets, with soldered ESP32-S3-WROOM-1-N8. The first public hardware release is v1.0, targeting firmware 1.0.0. v2 is its original internal design identifier, retained in the board markings, directory names and fabrication records. The board has been manufactured and assembled. Bring-up and actual window traces are recorded in the firmware documents. No copper/part changes accompany 1.0.0.

Files and manufacturing

• windowmaster-controller-v2.kicad_pro, .kicad_sch, .kicad_pcb: editable project.
• ground_truth.json: components, connections, GPIO map and design decisions.
• pin_audit.json: pin assignments and their sources.
• fab/windowmaster-controller-v2-gerber.zip: Gerbers and drill data.
• fab/jlcpcb-bom.csv, fab/jlcpcb-cpl.csv: assembly BOM and placement.
• fab/handbestueckung.csv: manually fitted parts.
• fab/MANIFEST.json, fab/DRC.json, fab/routing.log: original export evidence.
• render/: high-resolution populated-board views, including both relays, three terminal blocks and all three pinheaders; native KiCad recipe and a model/image provenance manifest. CAD illustrations, not acceptance photos.
• Manufactured-board photos: original WCC mainboard, v1.0 front/back before manual assembly, and the powered relay bring-up state.

The original export uses KiCad 10.0.1, reports zero DRC errors/open connections and six documented footprint-library warnings. The board SHA-256 must match fab/MANIFEST.json. A host check of that report is not a new KiCad DRC run.

Inspect placement/polarity in the manufacturer's viewer. The original German fab/README.txt is retained as export evidence; the essential checks are:

• The stored rotation-correction map is empty. Do not add a catalog-derived rotation without checking the actual placement preview.
• Check Q_REV (AOD409): the DPAK tab is drain and must face west in the board view. Check AO3400A orientation and the horizontal Qwiic connector opening as well.
• Check the bulk capacitor, LEDs and diodes for correct polarity.

Recheck part stock before any new order (python3 check_jlc_stock.py 5). Select ENIG in the order form; it is not encoded in the Gerbers. No purchase is automated. The data describes top-side assembly plus manual through-hole parts.

SPEC.md contains the English design rationale. Current operating limits, including the TVS/overvoltage limitation, are in ../../docs/operating-limits.md. The final enclosure is not supplied; the Mini560 enclosure is historical.

Manual assembly and optional wall switch

The five-board order included 54 SMT components per board. JLCPCB did not fit the relays, terminal blocks or pinheaders. Complete population adds these eight through-hole parts separately:

Leave D_MOT_TVS unpopulated; the five test points are bare pads. Match the exact footprints and connector orientation before buying parts. Original part records remain in fab/handbestueckung.csv; the table above is the English assembly guide. In the owner's installation the wall-switch terminal and expansion/programming headers are optional. Actual order costs and assembly scope are recorded separately from the BOM used to manufacture a new batch.

J_SWITCH accepts two normally open, volt-free momentary contacts: pin 1 is GND, pin 2 OPEN and pin 3 CLOSE. Each contact connects its input to GND when pressed. The inputs share the controller's ground and are not galvanically isolated. Do not apply an external voltage or mains to them. Route switch wiring separately from motor wiring.

The owner does not use this input, and a physical wall switch has not been tested. Firmware support and host tests do not validate a switch, cable or installation. If you fit one, complete the optional wall-switch checks in commissioning.

Printed button instructions

The manufactured back silkscreen says “long press = run to end stop / short press = stop”. That describes an earlier plan. Firmware 1.0.0 uses hold-to-run wall buttons; release requests a stop, subject to the 500 ms minimum run time. Follow the firmware guide for operation. The original manufacturing files and photographs retain the actual printed text.

Editing and generating

Open the existing project directly in KiCad 10.0.1 with its matching standard libraries. Normal inspection/manufacture does not require a generator or any private MCP service. The schematic and PCB include their symbols/footprints.

Generators use Python 3.11+, kicad-sch-api for schematic authoring and KiCad's pcbnew Python bindings for routing/import. The original kicad-sch-api version was not recorded, so generator replay is not claimed to be dependency-reproducible. Use a separate working copy for generator changes; retain the reviewed routed board. KICAD10_SYMBOL_DIR and KICAD10_FOOTPRINT_DIR override standard library discovery; WMC_FOOTPRINT_DIR can add a custom footprint directory.

The historical routing workflow is: schematic → unrouted PCB → DSN export → Freerouting 2.2.4 → SES import → one postroute.py pass → tests → ERC/DRC → fabrication. create_pcb.py refuses to overwrite an already routed board. Do not bypass it. postroute.py is not idempotent; never run it twice on a finished board. For a schematic change, pin/net parity, antenna keepout, board envelope and copper checks all need fresh evidence. Review rendering as well as numeric checks.

After review, commit design sources before running python3 export_fab.py, then commit the exported package separately. The exporter requires a clean source tree and rejects unapproved DRC findings or mismatched BOM/CPL. It replaces fab/; use a disposable checkout when inspecting failures. Do not use ALLOW_DIRTY for a release.

The 1.0.0 source snapshot preserves the original fabrication source-commit identifier in SOURCE_MANIFEST.json; the original private Git history is deliberately absent. File hashes make snapshot contents reviewable, but are not a cryptographic signature.