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4 layers85 × 75 mmStarter, the printed circuit board in 3D

Work-in-progress STM32G0B1 input/output module with USB HID or CDC-only profiles, Cyphal/CAN, persistent settings, ordered panel events, leased LED/display actions, KiCad hardware and native simulation.

Size
85 × 75 mm
Copper layers
4
Thickness
1.6 mm
Parts
111
Nets
70
Pads
350
Tracks, vias
3,757, 247
Pours
9
Routed
Yes
KiCad
KiCad 10.0 (file 20260206)
Created
11 Oct 2026
Updated
4 Nov 2026

Overview

Starter is an open-source printed circuit board by opensimgear, from the opensimgear/device-template repository on GitHub. It is a 4-layer board of 85 × 75 mm with 111 parts on 70 nets, routed with 3,757 tracks and 247 vias.

It is built around the STM32G0B1CBT6, R-78E5.0-0.5 and TCAN3413D, with the TLV75533PDBVR-MS, USBLC6-2SC6 and RC0805FR-0710KL among its other parts. Its parts include 57 resistors, 20 capacitors, 18 connectors, 7 ICs and 3 diodes. It belongs with the STM32 boards of this library.

Main components

12

README

electronics/boards/starter/0.1.0/README.md

Generic STM32G0B1 starter — v0.1.0

Development status and disclaimer

This project is heavily under development and is not ready for use. Use it entirely at your own risk. To the fullest extent permitted by applicable law, the authors and contributors disclaim all liability for any damage, loss, or other issues arising from its use.

Open starter.kicad_pro in KiCad 10. The current design provides eight analogue inputs, 24 digital lines and I²C for optional 16-input expansion boards. Firmware profiles assign those resources to the controls each device needs; unused controls are omitted from its USB HID descriptor. The matching board target is starter_g0b1cb_v0_1_0. Current firmware supports direct USB and Cyphal/CAN discovery/input delivery through device-gateway; CAN integration records software validation.

The four-layer production and separate two-layer Makera Z1 layouts retain USB and both CAN sockets on the same edge. Both use the four-contact powered-CAN connector standard. See fabrication, electrical review, footprints, validation, schematic PDF, front copper, back copper, routing PDF and BOM. No physical board has been fabricated or tested.

This is the single current design. Earlier example circuits remain in Git history and have incompatible pin maps and six-contact CAN wiring. Follow PCB versioning: 0.1.0 stays fixed until launch. Mechanical Lite/Pro variants must explicitly document PCB and firmware compatibility.

Selected components

  • ST STM32G0B1CBT6, LQFP48: 128 KiB flash, 144 KiB RAM. VDD/VDDA, VREF+ and VBAT use 3.3 V; this exact non-N package internally ties VDDIO2/VDDUSB to VDD. Do not substitute STM32G0B1CBT6N: that variant uses PC6/PC7 pads as supplies and is incompatible with D13/D14 wiring. ST datasheet.
  • GCT USB4105-GF-A USB-C receptacle, external 5.1 kΩ Rd on each CC pin, ST USBLC6-2SC6 protection. USB data pins connect directly; external pull-up is not required.
  • TI TCAN3413D 3.3 V CAN FD transceiver, with VIO and VCC at 3.3 V, separate local C13/C1 100 nF bypass capacitors and an external standby pull-up. TI datasheet.
  • RECOM R-78E5.0-0.5 12 V-to-5 V switching module followed by TI TLV75533PDBVR 3.3 V LDO. RECOM datasheet, TI LDO datasheet.
  • Two Evercom 5301-4P4C sockets (LCSC C3097715), with manufacturer-derived local footprints and finished contact/locating-hole dimensions. Product and drawing under Documents.
  • Two TI LM66100DCKR ideal-diode devices wired as TI's dual-source OR, plus Vishay SS14-E3/61T local polarity protection, SMF15A-E3-08 local transient protection and Littelfuse 1206L025/24YR local-branch fuse.

The BOM records exact manufacturer parts, datasheets and local footprint references for all 107 populated component instances. Four mounting holes are mechanical features, giving 111 PCB footprints in total. Resistors and most capacitors remain 0805 for hand assembly; C2 is the specified 1210 Murata part. Availability and any substitutions must be checked before purchase. Authored footprints without a verified 3D model deliberately omit one; retained upstream models use a normal KiCad installation. See footprint and model conventions.

Input resources and wiring

All input headers are 3.3 V only. Use passive ground-switching contacts or appropriate 0–3.3 V sensors. Never apply 5 V or bus 12 V to them. Connect the internal control harness with power off; these headers have no qualified external-cable ESD/hot-plug protection. External controls and expansion boards are not included in the base-board BOM.

Eight analogue inputs

Every axis header has pin 1 +3.3 V, pin 2 signal, pin 3 GND. A 10 kΩ linear potentiometer uses pin 1/3 as its ends and pin 2 as its wiper.

InputHeaderMCU portLQFP48 pinADC channel
A0J5PA0110
A1J7PA1121
A2J8PA2132
A3J9PA3143
A4J10PA4154
A5J11PA6176
A6J12PA7187
A7J13PB1209

Each signal has a 1 kΩ series resistor, 100 nF filter and 1 MΩ pull-up/down bias for a defined unplugged midpoint. Firmware continuously scans all eight channels and reports only enabled axes, scaling the 12-bit ADC readings to the profile's 16-bit HID range; this does not make the ADC a 16-bit measurement device. Settling, noise, sensor loading and calibration need assembled-board measurement. The profile's disconnected value and the physical midpoint bias serve different purposes.

Twenty-four digital lines

Each line has a 10 kΩ pull-up to 3.3 V. Close a contact between its signal and the header's ground. These are input resources, not general-purpose high-current outputs.

HeaderPins 1–6, in orderPin 7
J14D0, D1, D2, D3, D4, D5GND
J15D6, D7, D8, D9, D10, D11GND
J16D12, D13, D14, D15, D16, D17GND
J17D18, D19, D20, D21, D22, D23GND
LinePort / package pinLinePort / package pin
D0PA8 / 28D12PB15 / 27
D1PA9 / 29D13PC6 / 30
D2PA10 / 32D14PC7 / 31
D3PA15 / 37D15PC13 / 1
D4PB2 / 21D16PC14 / 2
D5PB3 / 42D17PC15 / 3
D6PB4 / 43D18PD0 / 38
D7PB10 / 22D19PD1 / 39
D8PB11 / 23D20PD2 / 40
D9PB12 / 24D21PD3 / 41
D10PB13 / 25D22PF0 / 8
D11PB14 / 26D23PF1 / 9

A button or maintained contact consumes one line; an encoder consumes two, plus one for its pushbutton; a hat uses four; a center-open three-position selector uses two. These counts share the same 24-line budget. Keep encoder A/B on direct MCU inputs; polled I²C contacts can miss rapid quadrature transitions.

Optional 16-input boards

J18: pin 1 +3.3 V, pin 2 SDA, pin 3 SCL, pin 4 GND. I²C1 uses PB7/SDA (package pin 46) and PB6/SCL (45). R67/R68 provide one 4.7 kΩ pull-up on each line. Keep links short within the enclosure and disable duplicate breakout pull-ups unless the combined pull-up/capacitance has been checked. The initial 400 kHz setting requires rise-time and load qualification on the actual harness.

Use 3.3 V TI TCA9555 boards with unique addresses 0x20–0x27. Each provides 16 additional contact inputs. Firmware profiles explicitly enable banks; the implementation supports up to eight addressed banks, subject to bus/power qualification and its logical HID limits. A missing or failed board releases its controls and reports a diagnostic; recovered momentary contacts require release before a new press. See the expansion-board wiring contract and profile definitions. This is support for compatible expansion boards, not a routed expansion PCB or automatic device detection.

Reserved functions

SignalMCU portLQFP48 pin
Status LED, active high through 1 kΩPA516
VBUS sense, 10 kΩ / 15 kΩ dividerPB019
USB D− / D+PA11 / PA12 pads33 / 34
SWDIO / SWCLKPA13 / PA1435 / 36
CAN standby, active highPB544
CAN1 RX / TX, AF3PB8 / PB947 / 48
Reset switch SW2PF2-NRST10

Internal oscillators leave PF0/PF1 and PC14/PC15 available for digital contacts. Firmware disables UCPD dead-battery pull-downs on PA9/PA10 and leaves USB pad remapping disabled. SW1 is removed: its previous PA0 pin is now A0. J4 SWD remains 1 target 3.3 V reference, 2 GND, 3 SWDIO, 4 SWCLK, 5 NRST. J6 test remains 1 CAN_H, 2 CAN_L, 3 GND, without a power output.

CAN connectors and termination

J2 and J3 are electrically parallel pass-through ports on one CAN segment. Socket contacts are numbered by the KiCad footprint/manufacturer drawing, not an assumed cable color sequence.

ContactSignal
1BUS_12V
2CAN_H
3CAN_L
4GND

These are 4P4C sockets, not six-position RJ11/RJ12 sockets. This powered pinout is incompatible with the historical six-contact circuit. Use continuity-checked straight-through wiring with CAN_H/L on a qualified twisted pair. Reversed handset cords swap the supply and ground as well as CAN polarity; generic flat or coiled cords are not qualified. Never connect these powered ports to telephone or Ethernet equipment. Connector current, cable resistance, signal quality and hot plugging still require tests.

Use one linear bus with exactly two endpoint terminations, each 120 Ω across CAN_H/L. An end plug in the last module's unused socket connects contacts 2 and 3 only. Intermediate modules have no terminator. If the gateway is an endpoint, enable its termination; if it sits between two chains on the same bus, terminate both outer module ends and disable the gateway termination. J6 can accept a temporary 120 Ω test resistor for an endpoint position; remove it at an intermediate position. Do not form a ring or bridge independent CAN buses.

Power paths

12 V is carried on dedicated conductors alongside CAN, never on CAN_H/L. J2/J3 pass BUS_12V straight through; their chain power is protected at the gateway. F1 protects only this module's local branch. D1 guards that branch against reversed supply polarity, D5 clamps local transients after D1, and U4 makes 5 V. U6/U7 LM66100 devices combine regulated bus power and USB VBUS into SYS_5V using cross-connected active-low CE inputs, following TI's dual-OR circuit; U5 then makes 3.3 V. C5 is 2.2 µF / 25 V X7R for regulator margin. Effective capacitance and actual USB inrush require measurement.

The LM66100 devices provide reverse blocking, with reverse leakage, simultaneous-source transitions, USB backfeed and fault behavior still to be measured. This circuit does not feed external 12 V from USB and does not validate chain hot plugging. J2/J3 expose bus voltage whenever the chain is powered; local fuse removal does not isolate the through-power contacts. The local TVS does not establish protection against sustained overvoltage or chain-wide faults.

USB descriptors request 100 mA. Use the actual host budget; the prototype only drives a small LED. Do not add high-current outputs to the 3.3 V rail without revisiting USB budgets, regulators and thermal design. U4's nominal 0.5 A rating is not an approved module/chain current budget. Power off before connecting unqualified cables. CAN cable qualification, live connector sequencing, surge/ESD and hot-plug behavior remain assembled-system test gates. Firmware suspend-current handling is also unverified; the PCB changes do not establish USB power compliance.

Layout and validation

The production layout uses the named JLCPCB four-layer construction in FABRICATION.md. Its main USB pair retains 0.2474 mm width / 0.1501 mm edge gap over a continuous L2 ground reference, with a preserved front-copper corridor. Request 90 Ω differential ±10% fabrication control, final geometry approval and a coupon/TDR report. The extra analogue front ends and headers increase the board area while preserving 0805 passives and manufacturer lands for hand assembly.

The separate home-milling layout uses two layers, 1.6 mm laminate and accessible soldered-wire layer joins. It shares the circuit and purchasing BOM, with footprint-only schematic variants for unplated-hole construction. Its USB route does not inherit the production impedance result. Qualify the Makera Z1 process with the v0.1.0 fine-pitch coupon before machining this board.

See ROUTING.md and VALIDATION.md for the final dimensions, native checks, routing metrics and physical test gates. Static connectivity checks do not establish physical USB, CAN, power, input or expansion-board performance.

Libraries and licensing

KiCad.kicad_sym and KiCad.pretty/ contain selected KiCad 10.0.6 library entries under KiCad's library license; MCU and inherited symbols are flattened for local editing. OpenSimGear.kicad_sym contains authored/application-specific symbols, including the reviewed LM66100 dual-OR model. OpenSimGear.pretty/ contains manufacturer-derived 4P4C, fuse, LED, TI DCK and Samtec header footprints. Separately authored project material is copyright © Ivan Gregurić Ortolan, all rights reserved while licensing is under review; see the repository temporary licensing policy and contribution policy. Both library tables use project-relative paths; authored geometry and model conventions are recorded in FOOTPRINTS.md.

Parts

111
QtyValueFootprintReferences
2610kKiCad:R_0805_2012MetricR5, R43, R44, R45, R46, R47, R48, R49, R50, R51, R52, R53, R54, R55, R56, R57 +10
161MKiCad:R_0805_2012MetricR20, R21, R23, R24, R26, R27, R29, R30, R32, R33, R35, R36, R38, R39, R41, R42
15100nF 25V X7RKiCad:C_0805_2012MetricC1, C6, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20
91kKiCad:R_0805_2012MetricR8, R19, R22, R25, R28, R31, R34, R37, R40
4M3 3.2mmKiCad:MountingHole_3.2mm_M3H1, H2, H3, H4
31uF 25V X7RKiCad:C_0805_2012MetricC3, C4, C7
24.7kKiCad:R_0805_2012MetricR67, R68
24P4C POWERED CANOpenSimGear:RJ4P4C_Evercom_5301-4P4C_HorizontalJ2, J3
25.1k 1%KiCad:R_0805_2012MetricR1, R2
2LM66100DCKROpenSimGear:TI_DCK0006A_SC70-6_LM66100U6, U7
10.25A hold / 24VOpenSimGear:Fuse_Littelfuse_1206L025-24YRF1
110k 1%KiCad:R_0805_2012MetricR3
110uF 50V X7RKiCad:C_1210_3225MetricC2
115k 1%KiCad:R_0805_2012MetricR4
12.2uF 25V X7RKiCad:C_0805_2012MetricC5
1AXIS A0 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ5
1AXIS A1 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ7
1AXIS A2 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ8
1AXIS A3 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ9
1AXIS A4 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ10
1AXIS A5 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ11
1AXIS A6 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ12
1AXIS A7 / 3.3VOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ13
1CAN TEST / END TERMINATIONOpenSimGear:PinHeader_Samtec_TSW-103-07-L-S_P2.54mm_VerticalJ6
1DIGITAL D0–D5OpenSimGear:PinHeader_Samtec_TSW-107-07-L-S_P2.54mm_VerticalJ14
1DIGITAL D12–D17OpenSimGear:PinHeader_Samtec_TSW-107-07-L-S_P2.54mm_VerticalJ16
1DIGITAL D18–D23OpenSimGear:PinHeader_Samtec_TSW-107-07-L-S_P2.54mm_VerticalJ17
1DIGITAL D6–D11OpenSimGear:PinHeader_Samtec_TSW-107-07-L-S_P2.54mm_VerticalJ15
1GREENOpenSimGear:LED_Kingbright_AP2012SGC_0805D4
1LOCAL 3.3V I2C EXPANSIONOpenSimGear:PinHeader_Samtec_TSW-104-07-L-S_P2.54mm_VerticalJ18
1R-78E5.0-0.5KiCad:Converter_DCDC_RECOM_R-78E-0.5_THTU4
1RESETKiCad:SW_PUSH_6mm_H4.3mmSW2
1SMF15A-E3-08KiCad:D_SMFD5
1SS14KiCad:D_SMAD1
1STM32G0B1CBT6KiCad:LQFP-48_7x7mm_P0.5mmU1
1SWD / 3V3 REFERENCE ONLYOpenSimGear:PinHeader_Samtec_TSW-105-07-L-S_P2.54mm_VerticalJ4
1TCAN3413DKiCad:SOIC-8_3.9x4.9mm_P1.27mmU3
1TLV75533PDBVRKiCad:SOT-23-5U5
1USB-C DEVICEKiCad:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_HorizontalJ1
1USBLC6-2SC6KiCad:SOT-23-6U2

Questions

How big is the Starter PCB?

It measures 85 × 75 mm and has 4 copper layers, 1.6 mm thick.

What parts does the Starter use?

111 parts, built around the STM32G0B1CBT6, R-78E5.0-0.5, TCAN3413D and TLV75533PDBVR-MS. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Starter KiCad files?

From the opensimgear/device-template repository on GitHub, at the commit this page was made from: the board is electronics/boards/starter/0.1.0/starter.kicad_pcb and its schematic electronics/boards/starter/0.1.0/home-milling/inputs.kicad_sch. PCBKit opens the board in the browser, with nothing to install.

Can I use the Starter design in my own project?

Its repository states no licence, so its author keeps all rights: ask opensimgear before reusing the design.

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