
Device
jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack
Device is an open-source printed circuit board by jayis1, from the jayis1/hacker-devices repository on GitHub. It is a 2-layer board of 70 × 50 mm with 14 parts on 58 nets.
It is built around the ESP32-S3-WROOM-1-N16R8, ISO1500DBQ and TP4056, with the W5500 among its other parts. Its parts include 5 ICs, 3 resistors, 3 diodes and 3 connectors. It belongs with the ESP32 boards of this library.
A collection of fully open-source hardware designs for legitimate security research and pentesting. Every device is complete end-to-end: engineering docs, KiCad schematics & PCB layouts, production C/Python firmware, and React Native companion apps. Build it, flash it, run the app, start researching.
No half-finished reference designs. Each device folder contains the full stack:
| Category | Files | Description |
|---|---|---|
| Engineering Docs | phase1_conceptual_architecture.md → phase4_software_stack.md | 4-phase design process: requirements, BOM & netlists, PCB layout rules, software stack |
| KiCad Schematics | kicad/*.kicad_pro, *.kicad_sch, *.kicad_pcb | Full schematic with real component symbols, net labels, power flags, and board outline with placed footprints |
| C/Python Firmware | firmware/main.c, registers.h, board.h, drivers/, Makefile | Production-quality MCU firmware — init code, drivers with DMA, USB descriptors, wire protocol |
| React Native App | app/App.js, screens/, components/, utils/protocol.js, package.json | Companion mobile app for device control, configuration, real-time status, and data capture |
Every device follows a rigorous 4-phase process:
| Phase | Document | Contents |
|---|---|---|
| Phase 1 | phase1_conceptual_architecture.md | Purpose, performance targets, constraints, block diagram, bus topology, power domains |
| Phase 2 | phase2_component_selection_schematics.md | BOM with real part numbers, pinouts/MUX tables, decoupling networks, netlists, impedance matching |
| Phase 3 | phase3_pcb_blueprints_layout.md | PCB stackup, routing rules, length matching, via strategy, thermal management, DFM notes |
| Phase 4 | phase4_software_stack.md | MMIO/register defs, clock & GPIO init (production C), critical device driver, device tree, bootloader |
| # | Device | Status | Description |
|---|---|---|---|
| 1 | wifi-pentest-dongle/ | ✅ Complete | 802.11ax monitor/inject, deauth, PMKID capture |
| 2 | rf-transceiver-tool/ | ✅ Complete | Sub-GHz + 2.4GHz multi-protocol (CC1101 + nRF24) |
| 3 | badusb-injector | ⏳ Queued | HID emulation payload injector, multi-profile |
| 4 | nfc-rfid-cloner | ⏳ Queued | 13.56MHz + 125kHz, Mifare/EM4100 |
| 5 | network-tap-mitm | ⏳ Queued | 2× GbE transparent bridge, packet capture |
| 6 | can-bus-analyzer | ⏳ Queued | OBD-II + CAN-FD, automotive pentest |
| 7 | sdr-keyfob-replay | ⏳ Queued | 433/315MHz keyfob capture & replay |
| 8 | ble-sniffer-spoofer | ⏳ Queued | nRF52, advertisement inject, GATT fuzz |
| 9 | imsi-catcher-detector | ⏳ Queued | LTE/4G SDR analysis |
| 10 | biometric-bypass-toolkit | ⏳ Queued | Fingerprint emulation, RFID clone for access control |
| Component | License |
|---|---|
| Hardware design (KiCad) | CERN-OHL-S v2 |
| C firmware & drivers | GPL-2.0 |
| Python tools & scripts | MIT |
| React Native companion apps | MIT |
| Qty | Value | Footprint | References |
|---|---|---|---|
| 2 | 10k | Resistor_SMD:R_0603 | R1, R2 |
| 1 | 100k | Resistor_SMD:R_0603 | R3 |
| 1 | BLU | LED_SMD:LED_0603 | D3 |
| 1 | ESP32-S3-WROOM-1-N16R8 | Package_DFN_QFN:QFN-56-1EP_7x7mm_P0.4mm_EP5.6x5.6mm | U1 |
| 1 | GRN | LED_SMD:LED_0603 | D2 |
| 1 | ISO1500 | Package_SO:SOIC-16_3.9x9.9mm_P1.27mm | U3 |
| 1 | MAX3491ESA | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U4 |
| 1 | RED | LED_SMD:LED_0603 | D1 |
| 1 | RS485_HDR | Connector_PinHeader_2.54mm:PinHeader_1x03 | J2 |
| 1 | TP4056 | Package_TO_SOT_SMD:SOT-23-5 | U5 |
| 1 | USB_C_2.0 | Connector:USB_C_Receptacle_USB2.0 | J1 |
| 1 | W5500 | Package_QFP:LQFP-48_7x7mm_P0.5mm | U2 |
| 1 | WP_BYPASS | Connector_PinHeader_2.54mm:PinHeader_1x02 | J3 |
It measures 70 × 50 mm and has 2 copper layers, 1.6 mm thick.
14 parts, built around the ESP32-S3-WROOM-1-N16R8, ISO1500DBQ, TP4056 and W5500. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the jayis1/hacker-devices repository on GitHub, at the commit this page was made from: the board is bacnet-phantom/kicad/device.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository states no licence, so its author keeps all rights: ask jayis1 before reusing the design.

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

jayis1/hacker-devices
Full-cycle hardware designs for security research devices — each device is a subfolder with its own README, schematics, PCB layout, and software stack

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jayis1/hardware-design-lab
Full-cycle hardware device designs — each device in its own subfolder with architecture, schematics, PCB layout, and software stack