Boards by apistol78

14 boards

Open-source boards designed in KiCad by apistol78 on GitHub, from 2 repositories. A board’s address here is its repository’s there.

4 layers98.5 × 193.5 mm
Schematics
apistol78/retrodack
RetroDäck, handheld game console
120 parts1MPL-2.0
4 layers183.4 × 143.1 mm
Motherboard
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
126 parts1
2 layers52.7 × 32.4 mm
Audio eval01
apistol78/retrodack
RetroDäck, handheld game console
23 parts1MPL-2.0
2 layers84 × 79.6 mm
Buttboard
apistol78/retrodack
RetroDäck, handheld game console
19 parts1MPL-2.0
6 layers67.6 × 37.6 mm
Fpgaboard
apistol78/retrodack
RetroDäck, handheld game console
21 parts1MPL-2.0
2 layers42.7 × 83.8 mm
Hdmi brd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
42 parts1
2 layers
Hdmi tx
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
20 parts1
2 layers38.1 × 83.8 mm
Iobrd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
22 parts1
2 layers68.6 × 99.1 mm
Lcd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
3 parts1
2 layers30.5 × 83.8 mm
Lcdbrd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
13 parts1
2 layers47 × 83.8 mm
Qm k7 aux brd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
27 parts1
4 layers45.7 × 83.8 mm
Srambrd
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
24 parts1
2 layers27.4 × 63.2 mm
Stm32f breakout
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
3 parts1
2 layers129 × 41.9 mm
Usb host hub
apistol78/rv32
Risc-V pipelined CPU and SoC written in SystemVerilog
61 parts1