TLV75512PDBV

Q: Is there a KiCad symbol and footprint for the TLV75512PDBV?

Yes. The symbol is Regulator_Linear:TLV75512PDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.

Q: What package is the TLV75512PDBV?

SOT-23-5, with 5 pins. Its footprint is drawn on this page.

Q: Where is the TLV75512PDBV datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Q: Where can I order the TLV75512PDBV?

JLCPCB lists it as part C2877864, with 1,967 in stock; the sellers' links on this page open their listings.

Q: What can replace the TLV75512PDBV?

Parts like it in the library: the TLV75712PDBV by Texas Instruments, the CJ6205B12M by Jiangsu Changjing Electronics Technology (CJ), the SPX3819M5-L-1-2/TR by MaxLinear and the TPRT9013-12GB by TECH PUBLIC. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Q: Which open-source boards use the TLV75512PDBV?

7 boards in 6 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Texas InstrumentsExtended

-40℃~+125℃@(Tj) 1 1.2V 33uA 46dB@(100kHz) 5.5V 500mA 71.5uVrms 780mV@(500mA) Fixed Positive Under Voltage Lockout、Over Current Protection、Soft Start、Enable、Thermal Shutdown SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS

Datasheet JLCPCB LCSC

Part id: ti/TLV75512PDBV
Category: Voltage Regulators, Linear, Low Drop Out (LDO) Regulators
Package: SOT-23-5
Pins: 5
In stock: 1,967 at JLCPCB (C2877864)
Used on: 7 open-source boards

Overview

The TLV75512PDBV is a voltage Regulators, Linear, Low Drop Out (LDO) Regulator made by Texas Instruments in a SOT-23-5 package with 5 pins. -40℃~+125℃@(Tj) 1 1.2V 33uA 46dB@(100kHz) 5.5V 500mA 71.5uVrms 780mV@(500mA) Fixed Positive Under Voltage Lockout、Over Current Protection、Soft Start、Enable、Thermal Shutdown SOT-23-5 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHS.

PCBKit's library has its KiCad symbol (Regulator_Linear:TLV75512PDBV, from KiCad's library) and its footprint (Package_TO_SOT_SMD:SOT-23-5, from KiCad's library), ready for a KiCad board. 1,967 are in stock at JLCPCB (part C2877864). 7 open-source boards in 6 repositories on GitHub use it.

Symbol

Regulator_Linear:TLV75512PDBVFrom KiCad's library

Footprint

Package_TO_SOT_SMD:SOT-23-5From KiCad's library

From the datasheet

Supply, least: 1.45 V · VIN, recommended operating min · p. 4
Supply, most: 5.5 V · VIN, recommended operating max · p. 4
Supply, absolute maximum: 6 V · VIN, absolute max · p. 4
Junction, hottest: 150 °C · Junction temperature absolute max · p. 4
Takes working: 25 µA · Ground current typical, TJ = 25°C, IOUT = 0mA · p. 5
Takes asleep: 100 nA · Shutdown current typical, VEN ≤ 0.4V · p. 5
Gives: 500 mA · Continuous output current max · p. 4
Current limit: 720 mA · Output current limit typical, VOUT ≤ 1.5V · p. 5
Dropout: 500 mV · Dropout typical, IOUT = 500mA, −40°C to +85°C · p. 6
Junction to air (DBV): 100.8 K/W · Junction-to-ambient, EVM PCB · p. 5
Junction to air (DBV): 231.1 K/W · Junction-to-ambient, JEDEC PCB · p. 5
Junction to board (DBV): 64.4 K/W · Junction-to-board, JEDEC PCB · p. 5
Junction to case (DBV): 118.4 K/W · Junction-to-case top, JEDEC PCB · p. 5

What it is and has

Input voltage range: 1.45V to 5.5V · p. 1
Soft-start: Built-in, monotonic VOUT rise · p. 1
Current limit: Foldback · p. 1
Output discharge: Active · p. 1
Output capacitor: Stable with 1µF ceramic · p. 1
Package: 2.9mm × 2.8mm SOT-23-5 (DBV) · p. 1

Around it

cap 1 μF: between IN and GND; Minimum input capacitor; effective capacitance at the pin must exceed 0.47uF. · p. 4
cap 1 μF: between OUT and GND; Minimum output capacitor; recommended maximum 200 uF. Effective capacitance at the pin must exceed 0.47uF. · p. 4

Specifications

Parameter	Conditions	As printed	Page
Supply voltage VIN	Over operating free-air temperature range	min -0.3 · max 6 V	4
Enable voltage VEN	Over operating free-air temperature range	min -0.3 · max 6 V	4
Output voltage VOUT	Maximum is VIN + 0.3 V or 6.0 V, whichever is smaller	min -0.3 V	4
Operating junction temperature TJ		min -40 · max 150 °C	4
Storage temperature Tstg		min -65 · max 150 °C	4
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±1000 V	max 1000 V	4
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; ±500 V	max 500 V	4
Input voltage VIN		min 1.45 · max 5.5 V	4
Output voltage VOUT		min 0.6 · max 5 V	4
Enable voltage VEN		min 0 · max 5.5 V	4
Output current IOUT		min 0 · max 500 mA	4
Input capacitor CIN		min 1 uF	4
Output capacitor COUT		min 1 · max 200 uF	4
Enable toggle frequency fEN		max 10 kHz	4
Junction temperature TJ		min -40 · max 125 °C	4
Junction-to-ambient thermal resistance RθJA	DBV (SOT-23-5), 5 pins; EVM PCB	typ 100.8 °C/W	5
Junction-to-top characterization parameter ψJT	DBV (SOT-23-5), 5 pins; EVM PCB	typ 23.3 °C/W	5
Junction-to-board characterization parameter ψJB	DBV (SOT-23-5), 5 pins; EVM PCB	typ 67.8 °C/W	5
Junction-to-ambient thermal resistance RθJA	DBV (SOT-23-5), 5 pins; JEDEC PCB	typ 231.1 °C/W	5
Junction-to-case (top) thermal resistance RθJC(top)	DBV (SOT-23-5), 5 pins; JEDEC PCB	typ 118.4 °C/W	5
Junction-to-board thermal resistance RθJB	DBV (SOT-23-5), 5 pins; JEDEC PCB	typ 64.4 °C/W	5
Junction-to-top characterization parameter ψJT	DBV (SOT-23-5), 5 pins; JEDEC PCB	typ 28.4 °C/W	5
Junction-to-board characterization parameter ψJB	DBV (SOT-23-5), 5 pins; JEDEC PCB	typ 63.8 °C/W	5
Output accuracy	−40°C ≤ TJ ≤ +85°C, DBV package	min -1 · max 1 %	5
Output accuracy	VOUT ≥ 1V; −40°C ≤ TJ ≤ +125°C	min -1.5 · max 1.5 %	5
Load regulation ΔVOUT/ΔIOUT	0.1mA ≤ IOUT ≤ 500mA; DBV package	typ 0.06 V/A	5
Ground current IGND	TJ = 25°C, IOUT = 0mA	min 14 · typ 25 · max 31 uA	5
Ground current IGND	−40°C ≤ TJ ≤ +85°C, IOUT = 0mA	max 33 uA	5
Ground current IGND	−40°C ≤ TJ ≤ +125°C, IOUT = 0mA	max 40 uA	5
Shutdown current ISHDN	VEN ≤ 0.4V, 1.4V ≤ VIN ≤ 5.5V, −40°C ≤ TJ ≤ +125°C	typ 0.1 · max 1 uA	5
Output current limit ICL	VIN = VOUT + VDO(MAX) + 0.25V; VOUT = VOUT - 0.2V, VOUT ≤ 1.5V	min 560 · typ 720 · max 865 mA	5
Short-circuit current limit ISC	VOUT = 0V	typ 355 mA	5
Dropout voltage VDO	DBV; 1.2V ≤ VOUT < 1.5V; IOUT = 500mA, −40°C ≤ TJ ≤ +85°C	typ 500 · max 630 mV	6
Dropout voltage VDO	DBV; 1.2V ≤ VOUT < 1.5V; IOUT = 500mA, −40°C ≤ TJ ≤ +125°C	max 665 mV	6
Power-supply rejection ratio PSRR	f = 1kHz, VIN = VOUT + 1V, IOUT = 50mA	typ 52 dB	6
Power-supply rejection ratio PSRR	f = 100kHz, VIN = VOUT + 1V, IOUT = 50mA	typ 46 dB	6
Power-supply rejection ratio PSRR	f = 1MHz, VIN = VOUT + 1 V, IOUT = 50mA	typ 52 dB	6
Output noise voltage VN	BW = 10Hz to 100kHz; VOUT = 1.2V, IOUT = 50 mA	typ 71.5 uVRMS	6
Undervoltage lockout VUVLO	VIN rising	min 1.21 · typ 1.3 · max 1.44 V	6
Undervoltage lockout hysteresis VUVLO,HYST	VIN falling	typ 40 mV	6
Startup time tSTR		typ 550 us	6
EN pin high voltage (enabled) VHI		min 1 V	6
EN pin low voltage (enabled) VLO		max 0.3 V	6
Enable pin current IEN	EN = 5.5V	typ 10 nA	6
Thermal shutdown TSD	Shutdown, temperature increasing	typ 165 °C	6
Thermal shutdown TSD	Reset, temperature decreasing	typ 155 °C	6
Pulldown resistance RPULLDOWN	VIN = 5.5V	typ 120 Ω	6

Pins, by the datasheet

1 IN: Input supply; connect a capacitor of 1uF or larger to ground. · p. 3
2 GND: Ground pin. · p. 3
3 EN: Drive above VHI to enable the regulator or below VLO for shutdown. · p. 3
4 NC: No internal connection. · p. 3
5 OUT: Regulated output voltage; connect a capacitor of 1uF or larger to ground. · p. 3

Parameters

Current Limit: 720mA
Features: Over Current Protection
Junction Temperature(Max): 150℃
Noise: 71.5uVrms
Number of Outputs: 1
Operating Temperature: -40℃~+125℃@(Tj)
Output Configuration: Positive
Output Current: 500mA
Output Type: Fixed
Output Voltage: 1.2V
Power Supply Rejection Ratio (PSRR): 46dB@(100kHz)
Thermal Resistance(Junction to Ambient): 231.1℃/W
Thermal Resistance(Junction to Board): 64.4℃/W
Thermal Resistance(Junction to Case): 118.4℃/W
Voltage - Supply: 1.45V~5.5V
Voltage - Supply(Absolute Max): 6V
Voltage Dropout: 500mV
standby current: 25uA

Order codes

TLV75512PDBVRLCSC C2877864

Pinout

The pins of the TLV75512PDBV
Pin	Name	Type
1	IN	Power in
2	GND	Power in
3	EN	Input
4	NC	Not connected
5	OUT	Power out

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Parts like it

Questions

Is there a KiCad symbol and footprint for the TLV75512PDBV?

Yes. The symbol is Regulator_Linear:TLV75512PDBV and the footprint Package_TO_SOT_SMD:SOT-23-5, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TLV75512PDBV?

SOT-23-5, with 5 pins. Its footprint is drawn on this page.

Where is the TLV75512PDBV datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TLV75512PDBV?

JLCPCB lists it as part C2877864, with 1,967 in stock; the sellers' links on this page open their listings.

What can replace the TLV75512PDBV?

Parts like it in the library: the TLV75712PDBV by Texas Instruments, the CJ6205B12M by Jiangsu Changjing Electronics Technology (CJ), the SPX3819M5-L-1-2/TR by MaxLinear and the TPRT9013-12GB by TECH PUBLIC. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TLV75512PDBV?

7 boards in 6 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

TLV75512PDBV

Overview

Symbol

Footprint

From the datasheet

What it is and has

Around it

Specifications

Pins, by the datasheet

Open-source boards using it

ICE40UP5K SG48I

Ice40tag

FPGA BOARD

OptiLogic-16-Pro

Dual adc usb

Dual adc usb v1

Eos epu up5k

Parts like it

TLV75712PDBV

CJ6205B12M

SPX3819M5-L-1-2/TR

TPRT9013-12GB

TPTLV75512PDBVR

AP2112K-1.2TRG1

BL9165-120BARN

HE9073A12M5R