SN74HC74N

Texas Instruments

-40℃~+85℃ 0ns 1 2 21ns 2V~6V 30ns@6V,50pF 3pF 4uA 5.2mA 5.2mA 60MHz 74HC Series Complementary D-Type Rising Edge Set and Reset DIP-14 Flip Flops ROHS

Extended

Datasheetti/SN74HC74N

Category: Flip Flops
Package: DIP-14
Pins: 14

Overview

The SN74HC74N is a flip Flop made by Texas Instruments in a DIP-14 package with 14 pins. -40℃~+85℃ 0ns 1 2 21ns 2V~6V 30ns@6V,50pF 3pF 4uA 5.2mA 5.2mA 60MHz 74HC Series Complementary D-Type Rising Edge Set and Reset DIP-14 Flip Flops ROHS.

PCBKit's library has its KiCad symbol (74xx:74HC74, from KiCad's library) and its footprint (Package_DIP:DIP-14_W8.89mm_SMDSocket_LongPads, from KiCad's library), ready for a KiCad board. 6 are in stock at JLCPCB (part C2895). 9 open-source boards in 9 repositories on GitHub use it.

Symbol

74xx:74HC74From KiCad's library

Footprint

Package_DIP:DIP-14_W8.89mm_SMDSocket_LongPadsFrom KiCad's library

From the datasheet

Supply, least: 2 V · VCC, recommended operating minimum · p. 4
Supply, most: 6 V · VCC, recommended operating maximum · p. 4
Supply, absolute maximum: 7 V · VCC, absolute maximum · p. 4
Works from: -40 °C · Operating temperature minimum · p. 1
Works up to: 85 °C · Operating temperature maximum · p. 1
Junction, hottest: 150 °C · Junction temperature absolute maximum · p. 4
Takes working: 40 µA · VCC supply current max, 6 V, IO = 0, -40°C to 85°C · p. 5
A pin gives at most: 25 mA · Continuous output source or sink current absolute maximum · p. 4
Junction to air (N (PDIP)): 61.9 K/W · Junction-to-ambient thermal resistance · p. 5
Junction to case (N (PDIP)): 49.7 K/W · Junction-to-case top thermal resistance · p. 5
Junction to board (N (PDIP)): 41.7 K/W · Junction-to-board thermal resistance · p. 5
Edge: 6 ns · Output transition time typical, VCC = 6 V, TA = 25°C · p. 7

What it is and has

Function: Two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear · p. 10
Inputs: Buffered · p. 1
Operating voltage range: 2 V to 6 V · p. 1
Operating temperature range: -40°C to +85°C · p. 1
Fanout: Up to 10 LSTTL loads · p. 1

Specifications

113

Parameter	Conditions	As printed	Page
Supply voltage VCC	Over operating free-air temperature range	min -0.5 · max 7 V	4
Input clamp current(2) IIK	VI < –0.5 V or VI > VCC; ±20 mA	min -20 · max 20 mA	4
Output clamp current(2) IOK	VI < –0.5 V or VI > VCC; ±20 mA	min -20 · max 20 mA	4
Continuous output current IO	VO = 0 to VCC; ±25 mA	min -25 · max 25 mA	4
Continuous current through VCC or GND	±50 mA	min -50 · max 50 mA	4
Junction temperature(3) TJ		max 150 °C	4
Storage temperature Tstg		min -65 · max 150 °C	4
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1); ±2000 V	min -2000 · max 2000 V	4
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101(2); ±1500 V	min -1500 · max 1500 V	4
Supply voltage VCC	Nominal 5 V	min 2 · max 6 V	4
High-level input voltage VIH	VCC = 2 V	min 1.5 V	4
High-level input voltage VIH	VCC = 4.5 V	min 3.15 V	4
High-level input voltage VIH	VCC = 6 V	min 4.2 V	4
Low-level input voltage VIL	VCC = 2 V	max 0.5 V	4
Low-level input voltage VIL	VCC = 4.5 V	max 1.35 V	4
Low-level input voltage VIL	VCC = 6 V	max 1.8 V	4
Input voltage VI	Maximum is VCC	min 0 V	4
Output voltage VO	Maximum is VCC	min 0 V	4
Input transition rise and fall rate Δt/Δv	VCC = 2 V	max 1000 ns	4
Input transition rise and fall rate Δt/Δv	VCC = 4.5 V	max 500 ns	4
Input transition rise and fall rate Δt/Δv	VCC = 6 V	max 400 ns	4
Junction-to-ambient thermal resistance RθJA	SN74HC74, N (PDIP), 14 PINS	typ 61.9 °C/W	5
Junction-to-case (top) thermal resistance RθJC(top)	SN74HC74, N (PDIP), 14 PINS	typ 49.7 °C/W	5
Junction-to-board thermal resistance RθJB	SN74HC74, N (PDIP), 14 PINS	typ 41.7 °C/W	5
Junction-to-top characterization parameter ΨJT	SN74HC74, N (PDIP), 14 PINS	typ 29.3 °C/W	5
Junction-to-board characterization parameter ΨJB	SN74HC74, N (PDIP), 14 PINS	typ 41.4 °C/W	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 2 V; TA = 25°C	min 1.9 · typ 1.998 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 2 V; TA = -40°C to 85°C	min 1.9 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 4.5 V; TA = 25°C	min 4.4 · typ 4.499 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 4.5 V; TA = -40°C to 85°C	min 4.4 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 6 V; TA = 25°C	min 5.9 · typ 5.999 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –20 uA; VCC = 6 V; TA = -40°C to 85°C	min 5.9 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –4 mA; VCC = 4.5 V; TA = 25°C	min 3.98 · typ 4.3 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –4 mA; VCC = 4.5 V; TA = -40°C to 85°C	min 3.84 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –5.2 mA; VCC = 6 V; TA = 25°C	min 5.48 · typ 5.8 V	5
High-level output voltage VOH	VI = VIH or VIL; IOH = –5.2 mA; VCC = 6 V; TA = -40°C to 85°C	min 5.34 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 2 V; TA = 25°C	typ 0.002 · max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 2 V; TA = -40°C to 85°C	max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 4.5 V; TA = 25°C	typ 0.001 · max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 4.5 V; TA = -40°C to 85°C	max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 6 V; TA = 25°C	typ 0.001 · max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 20 uA; VCC = 6 V; TA = -40°C to 85°C	max 0.1 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = 25°C	typ 0.17 · max 0.26 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V; TA = -40°C to 85°C	max 0.33 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V; TA = 25°C	typ 0.15 · max 0.26 V	5
Low-level output voltage VOL	VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V; TA = -40°C to 85°C	max 0.33 V	5
Input leakage current II	VI = VCC or 0; VCC = 6 V; TA = 25°C; ±0.1 uA	min -0.1 · max 0.1 uA	5
Input leakage current II	VI = VCC or 0; VCC = 6 V; TA = -40°C to 85°C; ±1 uA	min -1 · max 1 uA	5
Supply current ICC	VI = VCC or 0; IO = 0; VCC = 6 V; TA = 25°C	max 4 uA	5
Supply current ICC	VI = VCC or 0; IO = 0; VCC = 6 V; TA = -40°C to 85°C	max 40 uA	5
Input capacitance Ci	VCC = 2 V to 6 V; TA = 25°C	typ 3 · max 10 pF	5
Input capacitance Ci	VCC = 2 V to 6 V; TA = -40°C to 85°C	max 10 pF	5
Clock frequency fclock	VCC = 2 V; TA = 25°C	max 6 MHz	6
Clock frequency fclock	VCC = 2 V; TA = –40°C to 85°C	max 5 MHz	6
Clock frequency fclock	VCC = 4.5 V; TA = 25°C	max 31 MHz	6
Clock frequency fclock	VCC = 4.5 V; TA = –40°C to 85°C	max 25 MHz	6
Clock frequency fclock	VCC = 6 V; TA = 25°C	min 0 · max 36 MHz	6
Clock frequency fclock	VCC = 6 V; TA = –40°C to 85°C	min 0 · max 29 MHz	6
Pulse duration tw	PRE or CLR low; VCC = 2 V; TA = 25°C	max 100 ns	6
Pulse duration tw	PRE or CLR low; VCC = 2 V; TA = –40°C to 85°C	max 125 ns	6
Pulse duration tw	PRE or CLR low; VCC = 4.5 V; TA = 25°C	max 20 ns	6
Pulse duration tw	PRE or CLR low; VCC = 4.5 V; TA = –40°C to 85°C	max 25 ns	6
Pulse duration tw	PRE or CLR low; VCC = 6 V; TA = 25°C	max 14 ns	6
Pulse duration tw	PRE or CLR low; VCC = 6 V; TA = –40°C to 85°C	max 21 ns	6
Pulse duration tw	CLK high or low; VCC = 2 V; TA = 25°C	max 80 ns	6
Pulse duration tw	CLK high or low; VCC = 2 V; TA = –40°C to 85°C	max 100 ns	6
Pulse duration tw	CLK high or low; VCC = 4.5 V; TA = 25°C	max 16 ns	6
Pulse duration tw	CLK high or low; VCC = 4.5 V; TA = –40°C to 85°C	max 20 ns	6
Pulse duration tw	CLK high or low; VCC = 6 V; TA = 25°C	max 14 ns	6
Pulse duration tw	CLK high or low; VCC = 6 V; TA = –40°C to 85°C	max 17 ns	6
Setup time before CLK↑ tsu	Data; VCC = 2 V; TA = 25°C	max 100 ns	6
Setup time before CLK↑ tsu	Data; VCC = 2 V; TA = –40°C to 85°C	max 125 ns	6
Setup time before CLK↑ tsu	Data; VCC = 4.5 V; TA = 25°C	max 20 ns	6
Setup time before CLK↑ tsu	Data; VCC = 4.5 V; TA = –40°C to 85°C	max 25 ns	6
Setup time before CLK↑ tsu	Data; VCC = 6 V; TA = 25°C	max 17 ns	6
Setup time before CLK↑ tsu	Data; VCC = 6 V; TA = –40°C to 85°C	max 21 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 2 V; TA = 25°C	max 25 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 2 V; TA = –40°C to 85°C	max 30 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 4.5 V; TA = 25°C	max 5 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 4.5 V; TA = –40°C to 85°C	max 6 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 6 V; TA = 25°C	max 4 ns	6
Setup time before CLK↑ tsu	PRE or CLR inactive; VCC = 6 V; TA = –40°C to 85°C	max 5 ns	6
Hold time, data after CLK↑ th	VCC = 2 V; TA = 25°C	min 0 ns	6
Hold time, data after CLK↑ th	VCC = 2 V; TA = –40°C to 85°C	min 0 ns	6
Hold time, data after CLK↑ th	VCC = 4.5 V; TA = 25°C	min 0 ns	6
Hold time, data after CLK↑ th	VCC = 4.5 V; TA = –40°C to 85°C	min 0 ns	6
Hold time, data after CLK↑ th	VCC = 6 V; TA = 25°C	min 0 ns	6
Hold time, data after CLK↑ th	VCC = 6 V; TA = –40°C to 85°C	min 0 ns	6
fmax fmax	VCC = 2 V; TA = 25°C	min 6 · typ 10 MHz	7
fmax fmax	VCC = 2 V; TA = –40°C to 85°C	min 6 MHz	7
fmax fmax	VCC = 4.5 V; TA = 25°C	min 31 · typ 50 MHz	7
fmax fmax	VCC = 4.5 V; TA = –40°C to 85°C	min 25 MHz	7
fmax fmax	VCC = 6 V; TA = 25°C	min 36 · typ 60 MHz	7
fmax fmax	VCC = 6 V; TA = –40°C to 85°C	min 29 MHz	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 2 V; TA = 25°C	typ 70 · max 230 ns	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 2 V; TA = –40°C to 85°C	max 290 ns	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 4.5 V; TA = 25°C	typ 20 · max 46 ns	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 4.5 V; TA = –40°C to 85°C	max 58 ns	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 6 V; TA = 25°C	typ 15 · max 39 ns	7
Propagation delay tpd	PRE or CLR to Q or inverted Q; VCC = 6 V; TA = –40°C to 85°C	max 49 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 2 V; TA = 25°C	typ 70 · max 175 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 2 V; TA = –40°C to 85°C	max 220 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 4.5 V; TA = 25°C	typ 20 · max 35 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 4.5 V; TA = –40°C to 85°C	max 44 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 6 V; TA = 25°C	typ 15 · max 30 ns	7
Propagation delay tpd	CLK to Q or inverted Q; VCC = 6 V; TA = –40°C to 85°C	max 39 ns	7
Transition-time tt	Q or inverted Q; VCC = 2 V; TA = 25°C	typ 28 · max 75 ns	7
Transition-time tt	Q or inverted Q; VCC = 2 V; TA = –40°C to 85°C	max 95 ns	7
Transition-time tt	Q or inverted Q; VCC = 4.5 V; TA = 25°C	typ 8 · max 15 ns	7
Transition-time tt	Q or inverted Q; VCC = 4.5 V; TA = –40°C to 85°C	max 19 ns	7
Transition-time tt	Q or inverted Q; VCC = 6 V; TA = 25°C	typ 6 · max 13 ns	7
Transition-time tt	Q or inverted Q; VCC = 6 V; TA = –40°C to 85°C	max 16 ns	7
Power dissipation capacitance per gate Cpd	No load; VCC = 2 V to 6 V; typical measured at TA = 25°C	typ 35 pF	8

Pins, by the datasheet

1 1 CLR: Channel 1, clear input, active low. · p. 3
2 1D: Channel 1, data input. · p. 3
3 1CLK: Channel 1, positive edge triggered clock input. · p. 3
4 1 PRE: Channel 1, preset input, active low. · p. 3
5 1Q: Channel 1, output. · p. 3
6 1Q: Channel 1, inverted output. · p. 3
7 GND: Ground. · p. 3
8 2Q: Channel 2, inverted output. · p. 3
9 2Q: Channel 2, output. · p. 3
10 2 PRE: Channel 2, preset input, active low. · p. 3
11 2CLK: Channel 2, positive edge triggered clock input. · p. 3
12 2D: Channel 2, data input. · p. 3
13 2 CLR: Channel 2, clear input, active low. · p. 3
14 VCC: Positive supply. · p. 3

Parameters

Clock Frequency: 60MHz
Current - Output High(IOH): 5.2mA
Current - Output Low(IOL): 5.2mA
Current - Supply: 40uA
Function: Set and Reset
Hold Time: 0ns
Input Capacitance: 3pF
Junction Temperature(Max): 150℃
Number of Bits per Element: 1
Number of Elements: 2
Operating Temperature: -40℃~+85℃
Output Current per Pin(Max): 25mA
Output Type: Complementary
Propagation Delay: 30ns@6V,50pF
Quiescent Current: 4uA
Rise Time: 6ns
Series: 74HC Series
Setup Time: 21ns
Synchronous/Asynchronous: Asynchronous
Thermal Resistance(Junction to Ambient): 61.9℃/W
Thermal Resistance(Junction to Board): 41.7℃/W
Thermal Resistance(Junction to Case): 49.7℃/W
Trigger Type: Rising Edge
Type: D-Type
Voltage - Supply: 2V~6V
Voltage - Supply(Absolute Max): 7V

Order codes

SN74HC74NLCSC C2895

Pinout

The pins of the SN74HC74N
Pin	Name	Type
1	R	Input
2	D	Input
3	C	Input
4	S	Input
5	Q	Output
6	Q	Output
7	GND	Power in
8	Q	Output
9	Q	Output
10	S	Input
11	C	Input
12	D	Input
13	R	Input
14	VCC	Power in

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Questions

Is there a KiCad symbol and footprint for the SN74HC74N?

Yes. The symbol is 74xx:74HC74 and the footprint Package_DIP:DIP-14_W8.89mm_SMDSocket_LongPads, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the SN74HC74N?

DIP-14, with 14 pins. Its footprint is drawn on this page.

Where is the SN74HC74N datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the SN74HC74N?

JLCPCB lists it as part C2895, with 6 in stock; the sellers' links on this page open their listings.

What can replace the SN74HC74N?

Parts like it in the library: the CD74HC73E by Texas Instruments, the CD74HCT73E by Texas Instruments, the MC74HC107N by onsemi and the CD74HC107E by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the SN74HC74N?

9 boards in 9 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

SN74HC74N

Overview

Symbol

Footprint

From the datasheet

What it is and has

Specifications

Pins, by the datasheet

Parameters

Order codes

Pinout

Open-source boards using it

Clock

Cpc6128 rom board

Pico datalogger

Pico datalogger v2

Pico app base

TTL Logic Clock revA

Picowater

Ssio check

Show this part on your page

Questions

Is there a KiCad symbol and footprint for the SN74HC74N?

What package is the SN74HC74N?

Where is the SN74HC74N datasheet?

Where can I order the SN74HC74N?

What can replace the SN74HC74N?

Which open-source boards use the SN74HC74N?

Parts like it

CD74HC73E

CD74HCT73E

MC74HC107N

CD74HC107E

CD74HC107EE4

CD74HC73EE4

SN74HC74D

SN74HC273NSR