SN74HC74D
Texas InstrumentsExtended
-40℃~+85℃ 0ns 1 15ns@6V,50pF 2 25ns 2V~6V 3pF 4uA 5.2mA 5.2mA 60MHz 74HC Series Asynchronous Complementary D-Type Rising Edge Set and Reset SOIC-14 Flip Flops ROHS
- Part id
- ti/SN74HC74D
- Category
- Flip Flops
- Package
- SOIC-14
- Pins
- 14
- In stock
- 12,261 at JLCPCB (C6762)
Overview
The SN74HC74D is a flip Flop made by Texas Instruments in a SOIC-14 package with 14 pins. -40℃~+85℃ 0ns 1 15ns@6V,50pF 2 25ns 2V~6V 3pF 4uA 5.2mA 5.2mA 60MHz 74HC Series Asynchronous Complementary D-Type Rising Edge Set and Reset SOIC-14 Flip Flops ROHS.
PCBKit's library has its KiCad symbol (74xx:74HC74, from KiCad's library) and its footprint (Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, from KiCad's library), ready for a KiCad board. 12,261 are in stock at JLCPCB (part C6762).
Symbol
Footprint
From the datasheet
12- Supply, least
- 2 V · VCC, recommended operating min · p. 4
- Supply, most
- 6 V · VCC, recommended operating max · p. 4
- Supply, absolute maximum
- 7 V · VCC, absolute max · p. 4
- Works from
- -40 °C · operating temperature min · p. 1
- Works up to
- 85 °C · operating temperature max · p. 1
- Junction, hottest
- 150 °C · junction temperature max · p. 4
- Takes working
- 40 µA · VCC supply current max, 6 V, IO = 0, inputs at supply rails, -40°C to 85°C · p. 5
- A pin gives at most
- 25 mA · continuous output source or sink current absolute max · p. 4
- Junction to air (D (SOIC))
- 133.6 K/W · junction-to-ambient thermal resistance · p. 5
- Junction to case (D (SOIC))
- 89 K/W · junction-to-case top thermal resistance · p. 5
- Junction to board (D (SOIC))
- 89.5 K/W · junction-to-board thermal resistance · p. 5
- Edge
- 6 ns · output transition time typical, VCC = 6 V, TA = 25°C · p. 7
What it is and has
4- Flip-flops
- Two independent D-type positive-edge-triggered flip-flops with asynchronous preset and clear pins for each · p. 10
- Inputs
- Buffered · p. 1
- Fan-out
- Up to 10 LSTTL loads · p. 1
- Package
- SOIC (14), 8.70mm × 3.90mm nominal · p. 1
Specifications
113| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Supply voltage VCC | Over operating free-air temperature range | min -0.5 · max 7 V | 4 |
| Input clamp current(2) IIK | VI < –0.5 V or VI > VCC; ±20 mA | max 20 mA | 4 |
| Output clamp current(2) IOK | VI < –0.5 V or VI > VCC; ±20 mA | max 20 mA | 4 |
| Continuous output current IO | VO = 0 to VCC; ±25 mA | max 25 mA | 4 |
| Continuous current through VCC or GND | ±50 mA | max 50 mA | 4 |
| Junction temperature(3) TJ | Guaranteed by design | max 150 °C | 4 |
| Storage temperature Tstg | min -65 · max 150 °C | 4 | |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1); ±2000 V | max 2000 V | 4 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per JEDEC specification JESD22-C101(2); ±1500 V | max 1500 V | 4 |
| Supply voltage VCC | Nominal supply voltage = 5 V | min 2 · max 6 V | 4 |
| High-level input voltage VIH | VCC = 2 V | min 1.5 V | 4 |
| High-level input voltage VIH | VCC = 4.5 V | min 3.15 V | 4 |
| High-level input voltage VIH | VCC = 6 V | min 4.2 V | 4 |
| Low-level input voltage VIL | VCC = 2 V | max 0.5 V | 4 |
| Low-level input voltage VIL | VCC = 4.5 V | max 1.35 V | 4 |
| Low-level input voltage VIL | VCC = 6 V | max 1.8 V | 4 |
| Input voltage VI | Maximum = VCC | min 0 V | 4 |
| Output voltage VO | Maximum = VCC | min 0 V | 4 |
| Input transition rise and fall rate Δt/Δv | VCC = 2 V | max 1000 ns | 4 |
| Input transition rise and fall rate Δt/Δv | VCC = 4.5 V | max 500 ns | 4 |
| Input transition rise and fall rate Δt/Δv | VCC = 6 V | max 400 ns | 4 |
| Junction-to-ambient thermal resistance RθJA | SN74HC74, D (SOIC), 14 PINS | typ 133.6 °C/W | 5 |
| Junction-to-case (top) thermal resistance RθJC(top) | SN74HC74, D (SOIC), 14 PINS | typ 89 °C/W | 5 |
| Junction-to-board thermal resistance RθJB | SN74HC74, D (SOIC), 14 PINS | typ 89.5 °C/W | 5 |
| Junction-to-top characterization parameter ΨJT | SN74HC74, D (SOIC), 14 PINS | typ 45.5 °C/W | 5 |
| Junction-to-board characterization parameter ΨJB | SN74HC74, D (SOIC), 14 PINS | typ 89.1 °C/W | 5 |
| High-level output voltage VOH | TA = 25°C; VI = VIH or VIL; IOH = –20 uA; VCC = 2 V | min 1.9 · typ 1.998 V | 5 |
| High-level output voltage VOH | TA = -40°C to 85°C; VI = VIH or VIL; IOH = –20 uA; VCC = 2 V | min 1.9 V | 5 |
| High-level output voltage VOH | TA = 25°C; VI = VIH or VIL; IOH = –20 uA; VCC = 4.5 V | min 4.4 · typ 4.499 V | 5 |
| High-level output voltage VOH | TA = -40°C to 85°C; VI = VIH or VIL; IOH = –20 uA; VCC = 4.5 V | min 4.4 V | 5 |
| High-level output voltage VOH | TA = 25°C; VI = VIH or VIL; IOH = –20 uA; VCC = 6 V | min 5.9 · typ 5.999 V | 5 |
| High-level output voltage VOH | TA = -40°C to 85°C; VI = VIH or VIL; IOH = –20 uA; VCC = 6 V | min 5.9 V | 5 |
| High-level output voltage VOH | TA = 25°C; VI = VIH or VIL; IOH = –4 mA; VCC = 4.5 V | min 3.98 · typ 4.3 V | 5 |
| High-level output voltage VOH | TA = -40°C to 85°C; VI = VIH or VIL; IOH = –4 mA; VCC = 4.5 V | min 3.84 V | 5 |
| High-level output voltage VOH | TA = 25°C; VI = VIH or VIL; IOH = –5.2 mA; VCC = 6 V | min 5.48 · typ 5.8 V | 5 |
| High-level output voltage VOH | TA = -40°C to 85°C; VI = VIH or VIL; IOH = –5.2 mA; VCC = 6 V | min 5.34 V | 5 |
| Low-level output voltage VOL | TA = 25°C; VI = VIH or VIL; IOL = 20 uA; VCC = 2 V | typ 0.002 · max 0.1 V | 5 |
| Low-level output voltage VOL | TA = -40°C to 85°C; VI = VIH or VIL; IOL = 20 uA; VCC = 2 V | max 0.1 V | 5 |
| Low-level output voltage VOL | TA = 25°C; VI = VIH or VIL; IOL = 20 uA; VCC = 4.5 V | typ 0.001 · max 0.1 V | 5 |
| Low-level output voltage VOL | TA = -40°C to 85°C; VI = VIH or VIL; IOL = 20 uA; VCC = 4.5 V | max 0.1 V | 5 |
| Low-level output voltage VOL | TA = 25°C; VI = VIH or VIL; IOL = 20 uA; VCC = 6 V | typ 0.001 · max 0.1 V | 5 |
| Low-level output voltage VOL | TA = -40°C to 85°C; VI = VIH or VIL; IOL = 20 uA; VCC = 6 V | max 0.1 V | 5 |
| Low-level output voltage VOL | TA = 25°C; VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V | typ 0.17 · max 0.26 V | 5 |
| Low-level output voltage VOL | TA = -40°C to 85°C; VI = VIH or VIL; IOL = 4 mA; VCC = 4.5 V | max 0.33 V | 5 |
| Low-level output voltage VOL | TA = 25°C; VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V | typ 0.15 · max 0.26 V | 5 |
| Low-level output voltage VOL | TA = -40°C to 85°C; VI = VIH or VIL; IOL = 5.2 mA; VCC = 6 V | max 0.33 V | 5 |
| Input leakage current II | TA = 25°C; VI = VCC or 0; VCC = 6 V; ±0.1 uA | max 0.1 uA | 5 |
| Input leakage current II | TA = -40°C to 85°C; VI = VCC or 0; VCC = 6 V; ±1 uA | max 1 uA | 5 |
| Supply current ICC | TA = 25°C; VI = VCC or 0; IO = 0; VCC = 6 V | max 4 uA | 5 |
| Supply current ICC | TA = -40°C to 85°C; VI = VCC or 0; IO = 0; VCC = 6 V | max 40 uA | 5 |
| Input capacitance Ci | TA = 25°C; VCC = 2 V to 6 V | typ 3 · max 10 pF | 5 |
| Input capacitance Ci | TA = -40°C to 85°C; VCC = 2 V to 6 V | max 10 pF | 5 |
| Clock frequency fclock | TA = 25°C; VCC = 2 V | max 6 MHz | 6 |
| Clock frequency fclock | TA = –40°C to 85°C; VCC = 2 V | max 5 MHz | 6 |
| Clock frequency fclock | TA = 25°C; VCC = 4.5 V | max 31 MHz | 6 |
| Clock frequency fclock | TA = –40°C to 85°C; VCC = 4.5 V | max 25 MHz | 6 |
| Clock frequency fclock | TA = 25°C; VCC = 6 V | min 0 · max 36 MHz | 6 |
| Clock frequency fclock | TA = –40°C to 85°C; VCC = 6 V | min 0 · max 29 MHz | 6 |
| Pulse duration tw | TA = 25°C; PRE or CLR low; VCC = 2 V | max 100 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; PRE or CLR low; VCC = 2 V | max 125 ns | 6 |
| Pulse duration tw | TA = 25°C; PRE or CLR low; VCC = 4.5 V | max 20 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; PRE or CLR low; VCC = 4.5 V | max 25 ns | 6 |
| Pulse duration tw | TA = 25°C; PRE or CLR low; VCC = 6 V | max 14 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; PRE or CLR low; VCC = 6 V | max 21 ns | 6 |
| Pulse duration tw | TA = 25°C; CLK high or low; VCC = 2 V | max 80 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; CLK high or low; VCC = 2 V | max 100 ns | 6 |
| Pulse duration tw | TA = 25°C; CLK high or low; VCC = 4.5 V | max 16 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; CLK high or low; VCC = 4.5 V | max 20 ns | 6 |
| Pulse duration tw | TA = 25°C; CLK high or low; VCC = 6 V | max 14 ns | 6 |
| Pulse duration tw | TA = –40°C to 85°C; CLK high or low; VCC = 6 V | max 17 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; Data; VCC = 2 V | max 100 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; Data; VCC = 2 V | max 125 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; Data; VCC = 4.5 V | max 20 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; Data; VCC = 4.5 V | max 25 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; Data; VCC = 6 V | max 17 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; Data; VCC = 6 V | max 21 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; PRE or CLR inactive; VCC = 2 V | max 25 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; PRE or CLR inactive; VCC = 2 V | max 30 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; PRE or CLR inactive; VCC = 4.5 V | max 5 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; PRE or CLR inactive; VCC = 4.5 V | max 6 ns | 6 |
| Setup time before CLK↑ tsu | TA = 25°C; PRE or CLR inactive; VCC = 6 V | max 4 ns | 6 |
| Setup time before CLK↑ tsu | TA = –40°C to 85°C; PRE or CLR inactive; VCC = 6 V | max 5 ns | 6 |
| Hold time, data after CLK↑ th | TA = 25°C; VCC = 2 V | min 0 ns | 6 |
| Hold time, data after CLK↑ th | TA = –40°C to 85°C; VCC = 2 V | min 0 ns | 6 |
| Hold time, data after CLK↑ th | TA = 25°C; VCC = 4.5 V | min 0 ns | 6 |
| Hold time, data after CLK↑ th | TA = –40°C to 85°C; VCC = 4.5 V | min 0 ns | 6 |
| Hold time, data after CLK↑ th | TA = 25°C; VCC = 6 V | min 0 ns | 6 |
| Hold time, data after CLK↑ th | TA = –40°C to 85°C; VCC = 6 V | min 0 ns | 6 |
| fmax fmax | TA = 25°C; VCC = 2 V | min 6 · typ 10 MHz | 7 |
| fmax fmax | TA = –40°C to 85°C; VCC = 2 V | min 6 MHz | 7 |
| fmax fmax | TA = 25°C; VCC = 4.5 V | min 31 · typ 50 MHz | 7 |
| fmax fmax | TA = –40°C to 85°C; VCC = 4.5 V | min 25 MHz | 7 |
| fmax fmax | TA = 25°C; VCC = 6 V | min 36 · typ 60 MHz | 7 |
| fmax fmax | TA = –40°C to 85°C; VCC = 6 V | min 29 MHz | 7 |
| Propagation delay tpd | TA = 25°C; PRE or CLR to Q or inverted Q; VCC = 2 V | typ 70 · max 230 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; PRE or CLR to Q or inverted Q; VCC = 2 V | max 290 ns | 7 |
| Propagation delay tpd | TA = 25°C; PRE or CLR to Q or inverted Q; VCC = 4.5 V | typ 20 · max 46 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; PRE or CLR to Q or inverted Q; VCC = 4.5 V | max 58 ns | 7 |
| Propagation delay tpd | TA = 25°C; PRE or CLR to Q or inverted Q; VCC = 6 V | typ 15 · max 39 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; PRE or CLR to Q or inverted Q; VCC = 6 V | max 49 ns | 7 |
| Propagation delay tpd | TA = 25°C; CLK to Q or inverted Q; VCC = 2 V | typ 70 · max 175 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; CLK to Q or inverted Q; VCC = 2 V | max 220 ns | 7 |
| Propagation delay tpd | TA = 25°C; CLK to Q or inverted Q; VCC = 4.5 V | typ 20 · max 35 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; CLK to Q or inverted Q; VCC = 4.5 V | max 44 ns | 7 |
| Propagation delay tpd | TA = 25°C; CLK to Q or inverted Q; VCC = 6 V | typ 15 · max 30 ns | 7 |
| Propagation delay tpd | TA = –40°C to 85°C; CLK to Q or inverted Q; VCC = 6 V | max 39 ns | 7 |
| Transition-time tt | TA = 25°C; Q or inverted Q; VCC = 2 V | typ 28 · max 75 ns | 7 |
| Transition-time tt | TA = –40°C to 85°C; Q or inverted Q; VCC = 2 V | max 95 ns | 7 |
| Transition-time tt | TA = 25°C; Q or inverted Q; VCC = 4.5 V | typ 8 · max 15 ns | 7 |
| Transition-time tt | TA = –40°C to 85°C; Q or inverted Q; VCC = 4.5 V | max 19 ns | 7 |
| Transition-time tt | TA = 25°C; Q or inverted Q; VCC = 6 V | typ 6 · max 13 ns | 7 |
| Transition-time tt | TA = –40°C to 85°C; Q or inverted Q; VCC = 6 V | max 16 ns | 7 |
| Power dissipation capacitance per gate Cpd | No load; VCC = 2 V to 6 V; typical measured at TA = 25°C | typ 35 pF | 8 |
Pins, by the datasheet
14- 1 1 CLR
- Channel 1, Clear Input, Active Low · p. 3
- 2 1D
- Channel 1, Data Input · p. 3
- 3 1CLK
- Channel 1, Positive edge triggered clock input · p. 3
- 4 1 PRE
- Channel 1, Preset Input, Active Low · p. 3
- 5 1Q
- Channel 1, Output · p. 3
- 6 1Q
- Channel 1, Inverted Output · p. 3
- 7 GND
- Ground · p. 3
- 8 2Q
- Channel 2, Inverted Output · p. 3
- 9 2Q
- Channel 2, Output · p. 3
- 10 2 PRE
- Channel 2, Preset Input, Active Low · p. 3
- 11 2CLK
- Channel 2, Positive edge triggered clock input · p. 3
- 12 2D
- Channel 2, Data Input · p. 3
- 13 2 CLR
- Channel 2, Clear Input, Active Low · p. 3
- 14 VCC
- Positive Supply · p. 3
Ordering codes, by the datasheet
1- SN74HC74D
- SOIC (14) · 8.70mm × 3.90mm nominal package dimensions · p. 1
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Questions
Is there a KiCad symbol and footprint for the SN74HC74D?
Yes. The symbol is 74xx:74HC74 and the footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the SN74HC74D?
SOIC-14, with 14 pins. Its footprint is drawn on this page.
Where is the SN74HC74D datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the SN74HC74D?
JLCPCB lists it as part C6762, with 12,261 in stock; the sellers' links on this page open their listings.
What can replace the SN74HC74D?
Parts like it in the library: the RS74HCT74XP by Jiangsu RUNIC Tech, the SN74HC74QDRQ1 by Texas Instruments, the CD74HC107M96 by Texas Instruments and the CD74HC73M96 by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.