DRV2605LDGS

Texas InstrumentsExtended

-40℃~+85℃ 1 2V~5.2V 500uA I2C Yes VSSOP-10-0.5mm Brushed DC Motor Drivers ROHS

Part id: ti/DRV2605LDGS
Category: Brushed DC Motor Drivers
Package: VSSOP-10-0.5mm
Pins: 10
In stock: 8,499 at JLCPCB (C527464)
Used on: 98 open-source boards

Overview

The DRV2605LDGS is a brushed DC Motor Driver made by Texas Instruments in a VSSOP-10-0.5mm package with 10 pins. -40℃~+85℃ 1 2V~5.2V 500uA I2C Yes VSSOP-10-0.5mm Brushed DC Motor Drivers ROHS.

PCBKit's library has its KiCad symbol (Driver:DRV2605LDGS, from KiCad's library) and its footprint (Package_SO:TSSOP-10_3x3mm_P0.5mm, from KiCad's library), ready for a KiCad board. 8,499 are in stock at JLCPCB (part C527464). 98 open-source boards in 71 repositories on GitHub use it.

Symbol

Driver:DRV2605LDGSFrom KiCad's library

Footprint

Package_SO:TSSOP-10_3x3mm_P0.5mmFrom KiCad's library

From the datasheet

Supply, least: 2 V · VDD, recommended operating min · p. 6
Supply, most: 5.2 V · VDD, recommended operating max · p. 6
Supply, absolute maximum: 5.5 V · VDD, absolute max · p. 6
Works from: -40 °C · Operating free-air temperature min · p. 6
Works up to: 85 °C · Operating free-air temperature max · p. 6
Junction, hottest: 150 °C · Operating junction temperature max · p. 6
Takes working: 2.4 mA · Typical battery current, 90% duty cycle, LRA mode, no load · p. 7
Takes working: 2.3 mA · Typical battery current, 90% duty cycle, ERM mode, no load · p. 7
Takes asleep: 4 µA · Typical shutdown current, V(EN) = 0 V · p. 7
Takes asleep: 4.1 µA · Typical standby current, V(EN) = 1.8 V, STANDBY = 1 · p. 7
Switches at: 20.5 kHz · PWM output frequency typical · p. 7

What it is and has

Actuator support: LRA (Linear Resonance Actuator) · p. 1
Actuator support: ERM (Eccentric Rotating Mass) · p. 1
Playback interface: I2C-controlled digital playback engine · p. 1
Waveform playback: Waveform sequencer and trigger · p. 1
Drive control: Automatic overdrive and braking · p. 1
Diagnostics: Automatic actuator diagnostic · p. 1
Calibration: Automatic level calibration · p. 1
Audio-to-Vibe: Supported · p. 1
Drive compensation: Over battery discharge · p. 1
Hardware trigger: Input · p. 1
Digital interface: 1.8-V compatible, VDD-tolerant · p. 1
Package: VSSOP (10), 3.00 mm × 3.00 mm maximum body size · p. 1

Around it

cap 1-µF: between REG and GND; Required capacitor on the 1.8-V regulator output. · p. 5
cap 1-µF: between VDD and GND; Required supply capacitor. · p. 5

Specifications

Parameter	Conditions	As printed	Page
Input voltage VDD	TA = 25°C, unless otherwise noted	min -0.3 · max 5.5 V	6
Input voltage EN	TA = 25°C; maximum VDD + 0.3 V	min -0.3 V	6
Input voltage SDA	TA = 25°C; maximum VDD + 0.3 V	min -0.3 V	6
Input voltage SCL	TA = 25°C; maximum VDD + 0.3 V	min -0.3 V	6
Input voltage IN/TRIG	TA = 25°C; maximum VDD + 0.3 V	min -0.3 V	6
Operating free-air temperature TA		min -40 · max 85 °C	6
Operating junction temperature TJ		min -40 · max 150 °C	6
Storage temperature Tstg		min -65 · max 150 °C	6
Electrostatic discharge V(ESD)	10-PIN VSSOP PACKAGE; Human body model (HBM), per ANSI/ESDA/JEDEC JS-001; OUT+, OUT– pins; rated ±500 V	max 500 V	6
Electrostatic discharge V(ESD)	10-PIN VSSOP PACKAGE; Human body model (HBM), per ANSI/ESDA/JEDEC JS-001; Other pins; rated ±1000 V	max 1000 V	6
Electrostatic discharge V(ESD)	10-PIN VSSOP PACKAGE; Charged device model (CDM), per JEDEC specification JESD22-C101, all pins; rated ±250 V	max 250 V	6
Supply voltage VDD	VDD; over operating free-air temperature range	min 2 · max 5.2 V	6
PWM input frequency ƒ(PWM)	IN/TRIG Pin; ensured by design, not production tested	min 10 · max 250 kHz	6
Load impedance ZL	VDD = 5.2 V; ensured by design, not production tested	min 8 Ω	6
Digital low-level input voltage VIL	EN, IN/TRIG, SDA, SCL	max 0.5 V	6
Digital high-level input voltage VIH	EN, IN/TRIG, SDA, SCL	min 1.3 V	6
Input voltage (analog mode) VI(ANA)	IN/TRIG	min 0 · max 1.8 V	6
LRA Frequency Range ƒ(LRA)	Ensured by design, not production tested	min 125 · max 300 Hz	6
Voltage at the REG pin V(REG)	TA = 25°C, VDD = 3.6 V	typ 1.83 V	7
Digital low-level input current IIL	TA = 25°C; EN, IN/TRIG, SDA, SCL; VDD = 5.2 V, VI = 0 V	max 1 uA	7
Digital high-level input current IIH	TA = 25°C; EN; VDD = 5.2 V, VI = VDD	max 3.5 uA	7
Digital low-level output voltage VOL	TA = 25°C, VDD = 3.6 V; SDA, IOL = 4 mA	max 0.4 V	7
Digital pull-down resistance R(EN-GND)	TA = 25°C; EN; VDD = 5.2 V, VI = VDD	typ 2 MΩ	7
Shutdown current I(SD)	TA = 25°C, VDD = 3.6 V; V(EN) = 0 V	typ 4 · max 7 uA	7
Standby current II(standby)	TA = 25°C, VDD = 3.6 V; V(EN) = 1.8 V, STANDBY = 1	typ 4.1 · max 7 uA	7
Quiescent current IQ	TA = 25°C, VDD = 3.6 V; V(EN) = 1.8 V, STANDBY = 0, no signal	typ 0.5 · max 0.65 mA	7
Input impedance ZI	TA = 25°C, VDD = 3.6 V; IN/TRIG to V(CM_ANA)	typ 100 kΩ	7
IN/TRIG common-mode voltage (AC-coupled) V(CM_ANA)	TA = 25°C, VDD = 3.6 V; AC_COUPLE = 1	typ 0.9 V	7
Output impedance in shutdown ZO(SD)	TA = 25°C, VDD = 3.6 V; OUT+ to GND, OUT– to GND	typ 15 kΩ	7
Load impedance threshold for over-current detection ZL(th)	TA = 25°C, VDD = 3.6 V; OUT+ to GND, OUT– to GND	typ 4 Ω	7
Average battery current during operation I(BAT_AV)	TA = 25°C, VDD = 3.6 V; Duty cycle = 90%, LRA mode, no load	typ 2.4 · max 3.5 mA	7
Average battery current during operation I(BAT_AV)	TA = 25°C, VDD = 3.6 V; Duty cycle = 90%, ERM mode, no load	typ 2.3 · max 3.5 mA	7
Frequency at the SCL pin with no wait states ƒ(SCL)	TA = 25°C, VDD = 3.6 V	max 400 kHz	7
Pulse duration, SCL high tw(H)	TA = 25°C, VDD = 3.6 V; See Figure 1.	min 0.6 us	7
Pulse duration, SCL low tw(L)	TA = 25°C, VDD = 3.6 V; See Figure 1.	min 1.3 us	7
Setup time, SDA to SCL tsu(1)	TA = 25°C, VDD = 3.6 V; See Figure 1.	min 100 ns	7
Hold time, SCL to SDA th(1)	TA = 25°C, VDD = 3.6 V; See Figure 1.	min 10 ns	7
Bus free time between stop and start condition t(BUF)	TA = 25°C, VDD = 3.6 V; See Figure 2.	min 1.3 us	7
Setup time, SCL to start condition tsu(2)	TA = 25°C, VDD = 3.6 V; See Figure 2.	min 0.6 us	7
Hold time, start condition to SCL th(2)	TA = 25°C, VDD = 3.6 V; See Figure 2.	min 0.6 us	7
Setup time, SCL to stop condition tsu(3)	TA = 25°C, VDD = 3.6 V; See Figure 2.	min 0.6 us	7
Start-up time t(start)	TA = 25°C, VDD = 3.6 V; Time from the GO bit or external trigger command to output signal	typ 0.7 ms	7
Start-up time t(start)	TA = 25°C, VDD = 3.6 V; Time from EN high to output signal (PWM/Analog Modes)	typ 1.5 ms	7
PWM Output Frequency ƒO(PWM)	TA = 25°C, VDD = 3.6 V	min 19.5 · typ 20.5 · max 21.5 kHz	7

Pins, by the datasheet

1 REG: 1.8-V regulator output; requires a 1-uF capacitor. · p. 5
2 SCL: I2C clock. · p. 5
3 SDA: I2C data. · p. 5
4 IN/TRIG: Multi-mode input, I2C selectable as PWM, analog, or trigger; connect to GND if unused. · p. 5
5 EN: Device enable. · p. 5
6 VDD/NC: Optional supply input; tie to VDD or leave floating. · p. 5
7 OUT+: Positive haptic driver differential output. · p. 5
8 GND: Supply ground. · p. 5
9 OUT–: Negative haptic driver differential output. · p. 5
10 VDD: Supply input, 2 V to 5.2 V; requires a 1-uF capacitor. · p. 5

Parameters

Current - Supply: 2.4mA
Features: Current sensing/regulation function
Frequency - Switching: 20.5kHz
Interface: I2C
Junction Temperature(Max): 150℃
Number of H-bridges: 1
Operating Temperature: -40℃~+85℃
Quiescent Current(Iq): 500uA
Standby Current: 4uA
Technology: Yes
Voltage - Supply: 2V~5.2V
Voltage - Supply(Absolute Max): 5.5V

Order codes

DRV2605LDGSTLCSC C425927
DRV2605LDGSRLCSC C527464

Pinout

The pins of the DRV2605LDGS
Pin	Name	Type
1	REG	Passive
2	SCL	Input
3	SDA	Input/output
4	IN/TRIG	Input
5	EN	Input
6	VDD/NC	Power in
7	OUT+	Output
8	GND	Power in
9	OUT-	Output
10	VDD	Power in

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Questions

Is there a KiCad symbol and footprint for the DRV2605LDGS?

Yes. The symbol is Driver:DRV2605LDGS and the footprint Package_SO:TSSOP-10_3x3mm_P0.5mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the DRV2605LDGS?

VSSOP-10-0.5mm, with 10 pins. Its footprint is drawn on this page.

Where is the DRV2605LDGS datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the DRV2605LDGS?

JLCPCB lists it as part C527464, with 8,499 in stock; the sellers' links on this page open their listings.

Which open-source boards use the DRV2605LDGS?

98 boards in 71 repositories on GitHub; the most starred are listed on this page, with their KiCad files.