
CANFDZeroHAT
generationmake/CANFDZeroHAT
Raspberry Pi HAT with Microchip MCP2518FD CAN FD controller

The MCP2518FD-E/SL is a CAN Controller made by Microchip Technology in a SOIC-14 package with 14 pins. -40℃~+125℃ 2.7V~5.5V 20mA 8Mbps CAN FD Controller Monitor mode、Low-power mode、Programmable auto retransmission control SPI SOIC-14 CAN Controllers ROHS.
PCBKit's library has its KiCad symbol (EasyEDA_Cloud:MCP2518FDT-H_SLVAO, from EasyEDA) and its footprint (Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, from KiCad's library), ready for a KiCad board. 18,029 are in stock at JLCPCB (part C626758). 24 open-source boards in 14 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| VDD VDD | min -0.3 · max 6 V | 77 | |
| DC Voltage at all I/O w.r.t GND | min -0.3 V | 77 | |
| Virtual Junction Temperature, TVJ (IEC60747-1) TVJ | min -40 · max 165 °C | 77 | |
| Soldering temperature of leads (10 seconds) | 10 seconds | max 300 °C | 77 |
| ESD protection on all pins (IEC 801; Human Body Model) | Human Body Model | min -4 · max 4 kV | 77 |
| ESD protection on all pins (IEC 801; Machine Model) | Machine Model | min -400 · max 400 V | 77 |
| ESD protection on all pins (IEC 801; Charge Device Model) | Charge Device Model | min -750 · max 750 V | 77 |
| Voltage Range VDD | RAM data retention guaranteed; Extended (E) | min 2.7 · max 5.5 V | 78 |
| Power-on Reset Voltage VPORH | Highest voltage on VDD before device releases POR | max 2.65 V | 78 |
| Power-on Reset Voltage VPORL | Lowest voltage on VDD before device asserts POR | min 2.2 V | 78 |
| VDD Rise Rate to ensure POR SVDD | Note 1: Characterized; not 100% tested. | min 0.05 V/ms | 78 |
| Supply Current IDD | 40 MHz SYSCLK, 20 MHz SPI activity | typ 15 · max 20 mA | 78 |
| Sleep Current IDDS | Clock is stopped; TAMB ≤ +85°C; Note 1 | typ 15 · max 60 A | 78 |
| Sleep Current IDDS | Clock is stopped; TAMB ≤ +150°C | max 600 A | 78 |
| LPM Current IDDLPM | Digital logic powered down | typ 4 · max 10 A | 78 |
| Low-Level Input Voltage VIL | Digital Input Pins | min -0.3 V | 78 |
| OSC1 detection Voltage VOSCPP | Minimum peak-to-peak voltage on OSC1 pin; Note 1 | min 0.5 V | 78 |
| Input Leakage Current ILI | OSC1 | min -5 · max 5 A | 78 |
| Input Leakage Current ILI | All other | min -1 · max 1 A | 78 |
| Low-Level Output Voltage VOL | TXCAN; IOL = 8 mA, VDD = 2.7V | max 0.6 V | 78 |
| Low-Level Output Voltage VOL | All other; IOL = 2 mA, VDD = 2.7V | max 0.6 V | 78 |
| CLKO Output High TCLKOH | at 40 MHz; Note 1 | min 8 ns | 79 |
| CLKO Output Low TCLKOL | Note 1 | min 8 ns | 79 |
| CLKO Output Rise TCLKOR | Note 1 | max 5 ns | 79 |
| CLKO Output Fall TCLKOF | Note 1 | max 5 ns | 79 |
| OSC1 Input Frequency FOSC1,CLKI | External digital clock | min 2 · typ 40 · max 40 MHz | 79 |
| OSC1 Input Frequency FOSC1,4M | 4 MHz crystal/resonator; Note 1 | typ 4 MHz | 79 |
| SYSCLK frequency drift FDRIFT | Additional frequency drift of SYSCLK due to internal PLL at 4 MHz; Note 1 | max 10 ppm | 79 |
| OSC1 Input Frequency FOSC1,20M | 20 MHz crystal/resonator; Note 1 | typ 20 MHz | 79 |
| OSC1 Input Frequency FOSC1,40M | 40 MHz crystal/resonator; Note 1 | typ 40 MHz | 79 |
| TOSC1=1/FOSC1,x TOSC1 | min 25 ns | 79 | |
| OSC1 Input Rise TOSC1R | Note 2: Design guidance only. | max 20 ns | 79 |
| OSC1 Input Fall TOSC1F | Note 2: Design guidance only. | max 20 ns | 79 |
| Duty Cycle on OSC1 DCOSC1 | External clock duty cycle requirement; Note 1 | min 45 · typ 50 · max 55 % | 79 |
| Oscillator stabilization period TOSCSTAB | From POR to final frequency; Note 1 | max 3 ms | 79 |
| Oscillator stabilization from Sleep TOSCSLEEP | From Sleep to final frequency; Note 1 | max 3 ms | 79 |
| Transconductance GM,4M | 4 MHz crystal; Note 2 | min 1470 · max 2210 A/V | 79 |
| Transconductance GM,40M | 40 MHz crystal; Note 2 | min 2040 · max 3060 A/V | 79 |
| Nominal Bit Rate BRNOM | Tested bit rates; slower configurations also allowed | min 0.125 · typ 0.5 · max 1 Mbps | 80 |
| Data Bit Rate BRDATA | BRDATA ≥ BRNOM; tested bit rates | min 0.5 · typ 2 · max 8 Mbps | 80 |
| Filter propagation delay TPROP | Note 2: Design guidance only. | typ 1 ns | 80 |
| Filter time TFILTER | T00FILTER; Note 3 | min 50 · max 100 ns | 80 |
| Filter time TFILTER | T01FILTER; Note 3 | min 80 · max 140 ns | 80 |
| Filter time TFILTER | T10FILTER; Note 3 | min 130 · max 220 ns | 80 |
| Filter time TFILTER | T11FILTER; Note 3 | min 225 · max 390 ns | 80 |
| Minimum high time on input for output to go high again TRECOVERY | Note 2: Design guidance only. | min 5 ns | 80 |
| SCK Input Frequency FSCK | FSCK must be less than or equal to 0.85*(FSYSCLK/2) | max 17 MHz | 81 |
| SCK Period, TSCK=1/FSCK TSCK | Note 3 | min 59 ns | 81 |
| SCK High Time TSCKH | min 20 ns | 81 | |
| SCK Low Time TSCKL | min 20 ns | 81 | |
| SCK Rise Time TSCKR | Note 2: Design guidance only. | max 100 ns | 81 |
| SCK Fall Time TSCKF | Note 2: Design guidance only. | max 100 ns | 81 |
| SDI Setup: SDI ↕ to SCK ↑ TSDI2SCK | min 5 ns | 81 | |
| SDI Hold: SCK ↑ to SDI ↕ TSCK2SDI | min 5 ns | 81 | |
| SDO Valid: SCK ↓ to SDO ↕ TSCK2SDO | CLOAD = 50 pF | max 20 ns | 81 |
| Operating Temperature Range TA | General table range; Extended (E) range is -40°C to +125°C as stated on page 1 | min -40 · max 150 °C | 81 |
| Storage Temperature Range TA | min -55 · max 150 °C | 81 | |
| Thermal Resistance for SOIC-14 JA | SOIC-14 | typ 110 °C/W | 81 |
| Pin | Name | Type |
|---|---|---|
| 1 | TXCAN | Unspecified |
| 2 | RXCAN | Unspecified |
| 3 | CLKO/SOF | Unspecified |
| 4 | INT# | Unspecified |
| 5 | OSC2 | Unspecified |
| 6 | OSC1 | Unspecified |
| 7 | VSS | Unspecified |
| 8 | INT1#/GPIO1 | Unspecified |
| 9 | INT0#/GPIO0/XSTBY | Unspecified |
| 10 | SCK | Unspecified |
| 11 | SDI | Unspecified |
| 12 | SDO | Unspecified |
| 13 | nCS | Unspecified |
| 14 | VDD | Unspecified |

generationmake/CANFDZeroHAT
Raspberry Pi HAT with Microchip MCP2518FD CAN FD controller

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<iframe src="https://pcbkit.io/embed/parts/microchip/MCP2518FD-E/SL" title="MCP2518FD-E/SL in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/microchip/MCP2518FD-E/SL.jpg" alt="MCP2518FD-E/SL" width="1200" height="900">[](https://pcbkit.io/parts/microchip/MCP2518FD-E/SL)Yes. The symbol is EasyEDA_Cloud:MCP2518FDT-H_SLVAO and the footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
SOIC-14, with 14 pins. Its footprint is drawn on this page.
Microchip Technology publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C626758, with 18,029 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the MCP2518FD-H/SL by Microchip Technology, the MCP2517FD-H/SL by Microchip Technology, the MCP2518FD-H/SLVAO by Microchip Technology and the XLMCP2517FDT-H/SL by XINLUDA. Check their datasheets: a part that fits the footprint may still differ in its ratings.
24 boards in 14 repositories on GitHub; the most starred are listed on this page, with their KiCad files.