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ATTINY412-SSN on a board, in 3D

ATTINY412-SSN

Microchip Technology

-40℃~+105℃ 1.8V~5.5V 10bit 128Byte 20MHz 256Byte 4KB 6 8 Bit 8bit AVR Built-in FLASH SOIC-8 Microcontrollers (MCU/MPU/SOC) ROHS

Extended
DatasheetJLCPCBLCSCmicrochip/ATTINY412-SSN
Category
Microcontrollers (MCU, MPU, SOC)
Package
SOIC-8
Pins
8

Overview

The ATTINY412-SSN is a microcontroller made by Microchip Technology in a SOIC-8 package with 8 pins. -40℃~+105℃ 1.8V~5.5V 10bit 128Byte 20MHz 256Byte 4KB 6 8 Bit 8bit AVR Built-in FLASH SOIC-8 Microcontrollers (MCU/MPU/SOC) ROHS.

PCBKit's library has its KiCad symbol (MCU_Microchip_ATtiny:ATtiny412-SS, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 2,388 are in stock at JLCPCB (part C1337190). 56 open-source boards in 38 repositories on GitHub use it.

Symbol

VCC1PA62PA73PA14PA25RESET/PA06PA37GND8
MCU_Microchip_ATtiny:ATtiny412-SSFrom KiCad's library

Footprint

12345678
Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

11
Supply, least
2.7 V · VDD, recommended operating min · p. 490
Supply, most
5.5 V · VDD, recommended operating max · p. 490
Supply, absolute maximum
6 V · VDD, absolute maximum · p. 489
Works from
-40 °C · Operating temperature min · p. 490
Works up to
125 °C · Operating temperature max · p. 490
Takes working
7.2 mA · VDD, active typical at 16 MHz, 5 V, peripherals disabled · p. 491
Takes asleep
100 nA · VDD, Power-Down/Standby typical at 3 V, all peripherals stopped · p. 491
A pin gives at most
40 mA · I/O pin sink/source absolute maximum magnitude · p. 489
Junction to air (SOIC)
91.8 K/W · Junction-to-ambient thermal resistance · p. 547
Junction to case (SOIC)
21.5 K/W · Junction-to-case thermal resistance · p. 547
Edge
1.3 ns · Fall time typical, VDD = 5.0V, load = 20 pF · p. 496

What it is and has

23
CPU
AVR® CPU · p. 1
Maximum clock
16 MHz · p. 1
Hardware multiplier
Two-cycle · p. 1
Interrupt controller
Two-level · p. 1
Flash endurance
10,000 cycles · p. 1
EEPROM endurance
100,000 cycles · p. 1
Data retention
40 years at 55°C · p. 1
Programming and debugging
Single-Pin Unified Program and Debug Interface (UPDI) · p. 1
TCA
One 16-bit timer/counter with dedicated period register and three compare channels · p. 1
TCB
One 16-bit timer/counter with input capture · p. 1
Internal RC oscillator
16 MHz · p. 1
Ultra Low-Power internal RC oscillator
32.768 kHz · p. 1
External crystal oscillator
32.768 kHz · p. 1
CPU clock
Up to 16 MHz · p. 1
Power-on Reset
POR · p. 1
Brown-out Detector
BOD · p. 1
Internal oscillator
16 MHz low-power RC · p. 1
Internal ultra low-power oscillator
32.768 kHz · p. 1
External clock input
Supported · p. 1
I/O access
Single-cycle · p. 1
Internal RC oscillator
16 MHz low-power · p. 1
Internal ULP RC oscillator
32.768 kHz · p. 1
External clock
External clock input · p. 1

Specifications

224
ParameterConditionsAs printedPage
Power supply voltage VDDmin -0.5 · max 6 V489
Current into a VDD pin IVDDT = [-40, 85]°Cmax 200 mA489
Current into a VDD pin IVDDT = [85, 125]°Cmax 100 mA489
Current out of a GND pin IGNDT = [-40, 85]°Cmax 200 mA489
Current out of a GND pin IGNDT = [85, 125]°Cmax 100 mA489
RESET pin voltage with respect to GND VRSTmin -0.5 · max 13 V489
Pin voltage with respect to GND VPINmin -0.5 V489
I/O pin sink/source current IPINmin -40 · max 40 mA489
I/O pin injection current except RESET pin Ic1(1)VPIN < GND – 0.6V or 5.5V < VPIN ≤ 6.1V; 4.9V < VDD ≤ 5.5Vmin -1 · max 1 mA489
I/O pin injection current except RESET pin Ic2(1)VPIN < GND – 0.6V or VPIN ≤ 5.5V; VDD ≤ 4.9Vmin -15 · max 15 mA489
Sum of I/O pin injection current except RESET pin Ictotmin -45 · max 45 mA489
Storage temperature Tstoragemin -65 · max 150 °C489
Operating supply voltage VDDOperation ensured down to 2.7V or BOD triggering level, VBOD; see note 2min 2.7 · max 5.5 V490
Operating temperature range(1) TRefer to device ordering codes for temperature rangemin -40 · max 125 °C490
Operating system clock frequency CLK_CPUVDD = [2.7, 5.5]V; T = [-40, 125]°C; note 1min 0 · max 8 MHz490
Operating system clock frequency CLK_CPUVDD = [4.5, 5.5]V; T = [-40, 125]°C; note 2min 0 · max 16 MHz490
Active power consumptionActive; CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 7.2 mA491
Active power consumptionActive; CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 3.7 mA491
Active power consumptionActive; CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drivetyp 2.2 mA491
Active power consumptionActive; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 19 uA491
Active power consumptionActive; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drivetyp 11 uA491
Idle power consumptionIdle; CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterizationtyp 2.2 · max 5 mA491
Idle power consumptionIdle; CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterizationtyp 1.3 · max 2.5 mA491
Idle power consumptionIdle; CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drivetyp 0.7 · max 1.5 mA491
Idle power consumptionIdle; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterizationtyp 8 · max 20 uA491
Idle power consumptionIdle; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterizationtyp 4 · max 15 uA491
Standby power consumptionStandby; RTC running at 1.024 kHz from external XOSC32K (CL = 7.5 pF); VDD = 3V; 25°Ctyp 0.7 uA491
Standby power consumptionStandby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 25°Ctyp 0.7 · max 3 uA491
Standby power consumptionStandby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 85°C; maximum based on characterizationmax 6 uA491
Standby power consumptionStandby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 125°Cmax 8 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedPower Down/Standby; all peripherals stopped; VDD = 3V; 25°Ctyp 0.1 · max 2 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedPower Down/Standby; all peripherals stopped; VDD = 3V; 85°C; maximum based on characterizationmax 5 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedPower Down/Standby; all peripherals stopped; VDD = 3V; 125°Cmax 7 uA491
Reset power consumptionReset; Reset line pulled down; VDD = 3V; 25°Ctyp 100 uA491
Start-up time from any Reset release twakeupVDD = 3V; T = 25°C; OSC20M system clocktyp 200 us492
Wake-up from Idle sleep mode twakeupOSC20M @ 16 MHz; VDD = 5V; T = 25°Ctyp 1.2 us492
Wake-up from Idle sleep mode twakeupOSC20M @ 8 MHz; VDD = 3V; T = 25°Ctyp 2.4 us492
Wake-up from Standby and Power-Down sleep mode twakeupVDD = 3V; T = 25°C; OSC20M system clocktyp 10 us492
BODContinuous; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 19 uA492
BODSampling @ 1 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 1 uA492
TCA16-bit count @ 1 MHz; module only; VDD = 3V; T = 25°C; Idletyp 13 uA492
TCB16-bit count @ 1 MHz; module only; VDD = 3V; T = 25°C; Idletyp 7.5 uA492
RTC16-bit count @ 32.768 kHz @ OSCULP32K; module only; VDD = 3V; T = 25°C; Idletyp 1 uA492
WDT (including OSCULP32K)Module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 1 uA492
OSC20MModule only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 125 uA492
ACFast mode; CPU in Standby; module only; VDD = 3V; T = 25°Ctyp 92 uA492
ACLow-Power mode; CPU in Standby; module only; VDD = 3V; T = 25°Ctyp 45 uA492
ADC50 ksps; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 325 uA492
ADC100 ksps; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 340 uA492
XOSC32KCL = 7.5 pF; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 0.5 uA492
OSCULP32KModule only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 0.5 uA492
USARTEnable @ 9600 Baud; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 13 uA492
SPI (Master)Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 2 uA492
TWI (Master)Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 24 uA492
TWI (Slave)Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 17 uA492
Flash programmingErase Operation; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 1.5 mA493
Flash programmingWrite Operation; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHztyp 3 mA493
Power-on Slope SRONmax 100 V/ms493
POR threshold voltage on VDD falling VPORVDD falls/rises at 0.5 V/ms or slowermin 0.8 · max 1.6 V493
POR threshold voltage on VDD rising VPORVDD falls/rises at 0.5 V/ms or slowermin 1.4 · max 1.8 V493
BOD triggering level (falling/rising) VBODBODLEVEL7min 3.9 · typ 4.2 · max 4.5 V493
BOD triggering level (falling/rising) VBODBODLEVEL2min 2.4 · typ 2.6 · max 2.9 V493
VLM threshold relative to BOD triggering level VVLMBOD.VLMLVL = 0x0typ 4 %493
VLM threshold relative to BOD triggering level VVLMBOD.VLMLVL = 0x1typ 13 %493
VLM threshold relative to BOD triggering level VVLMBOD.VLMLVL = 0x2typ 25 %493
Hysteresis VHYSBODLEVEL7typ 80 mV493
Hysteresis VHYSBODLEVEL2typ 40 mV493
Detection time TBODContinuoustyp 7 us493
Detection time TBODSampled, 1 kHztyp 1 ms493
Detection time TBODSampled, 125 Hztyp 8 ms493
Start-up time TStartTime from enable to readytyp 40 us493
Ensured detection for a high-voltage Reset VHVRSTmin 11.5 · max 12.5 V494
Input low-voltage for RESET VRST_VILmin -0.2 V494
Minimum pulse-width on the RESET pin tRSTmax 2.5 us494
RESET pull-up resistor RRSTVReset = 0Vmin 20 · max 60 kΩ494
Accuracy with 16 MHz frequency selection fOSC20MFactory calibrated; T = 25°C, 3.0Vmin -3 · max 3 %494
Accuracy with 16 MHz frequency selection fOSC20MFactory calibrated; T = [0, 70]°C; VDD = [2.7, 3.6]V; based on characterizationmin -4 · max 4 %494
Accuracy with 16 MHz frequency selection fOSC20MFactory calibrated; Full operation range; based on characterizationmin -5 · max 5 %494
User calibration range fCALOSC20M(1) = 16 MHzmin 14.5 · max 17.5 MHz494
Calibration step size %CALVDD = 3Vtyp 1.5 %494
Duty cycle DCVDD = 3Vtyp 50 %494
Start-up time TStartWithin 2% accuracy; VDD = 3Vtyp 8 us494
Accuracy fOSCULP32KFactory calibrated; T = 25°C, 3.0Vmin -3 · max 3 %494
Accuracy fOSCULP32KFactory calibrated; T = [0, 70]°C; VDD = [2.7, 3.6]V; based on characterizationmin -10 · max 10 %494
Accuracy fOSCULP32KFactory calibrated; Full operation range; based on characterizationmin -30 · max 30 %494
Start-up time TStartVDD = 3Vtyp 250 us494
Frequency Fouttyp 32.768 kHz495
Start-up time TStartCL = 7.5 pFtyp 300 ms495
Crystal load capacitance CLmin 7.5 · max 12.5 pF495
Parasitic capacitor load CTOSC1typ 5.5 pF495
Parasitic capacitor load CTOSC2typ 5.5 pF495
Equivalent Series Resistance - Safety Factor = 3 ESRCL = 7.5 pFmax 80 kΩ495
Equivalent Series Resistance - Safety Factor = 3 ESRCL = 12.5 pFmax 40 kΩ495
Frequency fCLCLVDD = [2.7, 5.5]Vmin 0 · max 8 MHz495
Frequency fCLCLVDD = [4.5, 5.5]Vmin 0 · max 16 MHz495
Clock period tCLCLVDD = [2.7, 5.5]Vmin 125 ns495
Clock period tCLCLVDD = [4.5, 5.5]Vmin 62.5 ns495
High time tCHCXVDD = [2.7, 5.5]Vmin 50 ns495
High time tCHCXVDD = [4.5, 5.5]Vmin 25 ns495
Low time tCLCXVDD = [2.7, 5.5]Vmin 50 ns495
Low time tCLCXVDD = [4.5, 5.5]Vmin 25 ns495
Input low-voltage, except RESET pin as I/O VILTA = [-40, 105]°C; VDD = [2.7, 5.5]Vmin -0.2 V495
I/O pin drive strength VOLVDD = 3.0V, IOL = 7.5 mA; TA = [-40, 105]°Cmax 0.6 V495
I/O pin drive strength VOLVDD = 5.0V, IOL = 15 mA; TA = [-40, 105]°Cmax 1 V495
I/O pin drive strength VOHVDD = 3.0V, IOH = 7.5 mA; TA = [-40, 105]°Cmin 2.4 V495
I/O pin drive strength VOHVDD = 5.0V, IOH = 15 mA; TA = [-40, 105]°Cmin 4 V495
θJA θJA8-pin SOICtyp 91.8 °C/W547
θJC θJC8-pin SOICtyp 21.5 °C/W547
Operating supply voltage VDDmin 2.7 · max 5.5 V490
Operating temperature range TRefer to device ordering codes for device temperature rangemin -40 · max 125 °C490
Operating system clock frequency CLK_CPUVDD = [2.7, 5.5]V; T = [-40, 125]°Cmin 0 · max 8 MHz490
Operating system clock frequency CLK_CPUVDD = [4.5, 5.5]V; T = [-40, 125]°Cmin 0 · max 16 MHz490
Active power consumptionCLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 7.2 mA491
Active power consumptionCLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 3.7 mA491
Active power consumptionCLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drivetyp 2.2 mA491
Active power consumptionCLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drivetyp 19 uA491
Active power consumptionCLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drivetyp 11 uA491
Idle power consumptionCLK_CPU = 16 MHz; VDD = 5V; T = 25°C; maximum based on characterizationtyp 2.2 · max 5 mA491
Idle power consumptionCLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; maximum based on characterizationtyp 1.3 · max 2.5 mA491
Idle power consumptionCLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°Ctyp 0.7 · max 1.5 mA491
Idle power consumptionCLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; maximum based on characterizationtyp 8 · max 20 uA491
Idle power consumptionCLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; maximum based on characterizationtyp 4 · max 15 uA491
Standby power consumptionRTC running at 1.024 kHz from external XOSC32K (CL = 7.5 pF); VDD = 3V; T = 25°Ctyp 0.7 uA491
Standby power consumptionRTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 25°Ctyp 0.7 · max 3 uA491
Standby power consumptionRTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 85°C; based on characterizationmax 6 uA491
Standby power consumptionRTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 125°Cmax 8 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedAll peripherals stopped; VDD = 3V; T = 25°Ctyp 0.1 · max 2 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedAll peripherals stopped; VDD = 3V; T = 85°C; based on characterizationmax 5 uA491
Power down/Standby power consumption are the same when all peripherals are stoppedAll peripherals stopped; VDD = 3V; T = 125°Cmax 7 uA491
Reset power consumptionReset line pulled down; VDD = 3V; T = 25°Ctyp 100 uA491
BODContinuous; VDD = 3V; T = 25°C; Idle; module current onlytyp 19 uA492
BODSampling @ 1 kHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 1 uA492
TCA16-bit count @ 1 MHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 13 uA492
TCB16-bit count @ 1 MHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 7.5 uA492
RTC16-bit count @ 32.768 kHz @ OSCULP32K; VDD = 3V; T = 25°C; Idle; module current onlytyp 1 uA492
WDT (including OSCULP32K)VDD = 3V; T = 25°C; Idle; module current onlytyp 1 uA492
OSC20MVDD = 3V; T = 25°C; Idle; module current onlytyp 125 uA492
ACFast mode; CPU in Standby; VDD = 3V; T = 25°C; module current onlytyp 92 uA492
ACLow-Power mode; CPU in Standby; VDD = 3V; T = 25°C; module current onlytyp 45 uA492
ADC50 ksps; VDD = 3V; T = 25°C; Idle; module current onlytyp 325 uA492
ADC100 ksps; VDD = 3V; T = 25°C; Idle; module current onlytyp 340 uA492
XOSC32KCL = 7.5 pF; VDD = 3V; T = 25°C; Idle; module current onlytyp 0.5 uA492
OSCULP32KVDD = 3V; T = 25°C; Idle; module current onlytyp 0.5 uA492
USARTEnable @ 9600 Baud; VDD = 3V; T = 25°C; Idle; module current onlytyp 13 uA492
SPI (Master)Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 2 uA492
TWI (Master)Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 24 uA492
TWI (Slave)Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current onlytyp 17 uA492
Flash programmingErase Operation; module current onlytyp 1.5 mA493
Flash programmingWrite Operation; module current onlytyp 3 mA493
Maximum combined I/O sink current per pin group ItotalPin group x (Px[7:0])max 100 mA496
Maximum combined I/O source current per pin group ItotalPin group x (Px[7:0])max 100 mA496
Input low-voltage on RESET pin as I/O VIL2min -0.2 V496
I/O pin drive strength on RESET pin as I/O VOL2VDD = 3.0V, IOL = 0.25 mAmax 0.6 V496
I/O pin drive strength on RESET pin as I/O VOL2VDD = 5.0V, IOL = 0.5 mAmax 1 V496
I/O pin drive strength on RESET pin as I/O VOH2VDD = 3.0V, IOH = 0.25 mAmin 2.4 V496
I/O pin drive strength on RESET pin as I/O VOH2VDD = 5.0V, IOH = 0.5 mAmin 4 V496
Rise time tRISEVDD = 3.0V, load = 20 pFtyp 2.5 ns496
Rise time tRISEVDD = 5.0V, load = 20 pFtyp 1.5 ns496
Fall time tFALLVDD = 3.0V, load = 20 pFtyp 2 ns496
Fall time tFALLVDD = 5.0V, load = 20 pFtyp 1.3 ns496
I/O pin capacitance except TOSC and TWI pins CPINtyp 3 pF496
I/O pin capacitance on TOSC pins CPINtyp 5.5 pF496
I/O pin capacitance on TWI pins CPINtyp 10 pF496
Pull-up resistor RPmin 20 · typ 35 · max 50 kΩ496
SCK clock frequency fSCKMastermax 10 MHz496
SCK period tSCKMastermin 100 ns498
SCK rise time tSCKRMastertyp 2.7 ns498
SCK fall time tSCKFMastertyp 2.7 ns498
MISO setup to SCK tMISMastertyp 10 ns498
MISO hold after SCK tMIHMastertyp 10 ns498
MOSI hold after SCK tMOHMastertyp 1 ns498
Slave SCK clock frequency fSSCKSlavemax 5 MHz498
SCK rise time tSSCKRSlavemax 1600 ns498
SCK fall time tSSCKFSlavemax 1600 ns498
MOSI setup to SCK tSISSlavemin 3 ns498
SS setup to SCK tSSSSlavemin 21 ns498
SS hold after SCK tSSHSlavemin 20 ns498
MISO setup to SCK tSOSSlavetyp 8 ns498
MISO hold after SCK tSOHSlavetyp 13 ns498
MISO setup after SS low tSOSSSlavetyp 11 ns498
MISO hold after SS low tSOSHSlavetyp 8 ns498
SCL clock frequency fSCLMaximum frequency requires system clock at 10 MHz, VDD = [2.7, 5.5]V and T = [-40, 105]°Cmin 0 · max 1000 kHz499
Output low voltage VOLIload = 3 mA, Normal mode, VDD > 2.7Vmax 0.4 V499
Low-level output current IOLfSCL ≤ 400 kHz, VOL = 0.4Vmin 3 mA499
Low-level output current IOLfSCL ≤ 1 MHz, VOL = 0.4Vmin 20 mA499
Capacitive load for each bus line CBfSCL ≤ 100 kHzmax 400 pF499
Capacitive load for each bus line CBfSCL ≤ 400 kHzmax 400 pF499
Capacitive load for each bus line CBfSCL ≤ 1 MHzmax 550 pF499
Rise time for both SDA and SCL tRfSCL ≤ 100 kHzmax 1000 ns499
Rise time for both SDA and SCL tRfSCL ≤ 400 kHzmin 20 · max 300 ns499
Rise time for both SDA and SCL tRfSCL ≤ 1 MHzmax 120 ns499
Output fall time from VIHmin to VILmax tOF10 pF < Capacitance of bus line < 400 pF; fSCL ≤ 400 kHzmax 250 ns499
Output fall time from VIHmin to VILmax tOF10 pF < Capacitance of bus line < 400 pF; fSCL ≤ 1 MHzmax 120 ns499
Spikes suppressed by Input filter tSPmin 0 · max 50 ns499
Input current for each I/O pin IL0.1×VDD < VI < 0.9×VDDmax 1 uA499
Capacitance for each I/O pin CImax 10 pF499
Hold time (repeated) Start condition tHD;STAfSCL ≤ 100 kHzmin 4 us499
Hold time (repeated) Start condition tHD;STAfSCL ≤ 400 kHzmin 0.6 us499
Hold time (repeated) Start condition tHD;STAfSCL ≤ 1 MHzmin 0.26 us499
Data hold time tHD;DATSlave; All Frequencies; SDAHOLD = 0x00min 90 · typ 150 · max 220 ns501
Data hold time tHD;DATSlave; All Frequencies; SDAHOLD = 0x01min 130 · typ 200 · max 350 ns501
Data hold time tHD;DATSlave; All Frequencies; SDAHOLD = 0x02min 260 · typ 400 · max 580 ns501
Data hold time tHD;DATSlave; All Frequencies; SDAHOLD = 0x03min 390 · typ 550 · max 1270 ns501
Start-up time TStarttyp 25 us501
Power supply voltage range for INT055V VDDINT055Vmin 2.7 · max 5.5 V501
Power supply voltage range for INT11V VDDINT11Vmin 2.7 · max 5.5 V501
Power supply voltage range for INT15V VDDINT15Vmin 2.7 · max 5.5 V501
Power supply voltage range for INT25V VDDINT25Vmin 2.9 · max 5.5 V501
Power supply voltage range for INT43V VDDINT43Vmin 4.75 · max 5.5 V501
Internal reference voltage INT11VVDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterizationmin -2 · max 2 %501
Internal reference voltage INT055V, INT15V, INT25VVDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterizationmin -3 · max 3 %501
Internal reference voltage INT055V, INT11V, INT15V, INT25V, INT43VVDD = [2.7V, 5.5V]; T = [-40, 125]°C; based on characterizationmin -5 · max 5 %501
Internal reference voltage INT055V, INT11V, INT15V, INT25VVDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterizationmin -3 · max 3 %502
Supply voltage VDDADC; Temperature = -40°C to 125°Cmin 2.7 · max 5.5 V502
Reference voltage VREFREFSEL = Internal referencemin 0.55 V502
Reference voltage VREFREFSEL = VDDmin 2.7 · max 5.5 V502
Input capacitance CINSAMPCAP = 5 pFtyp 5 pF502
Input capacitance CINSAMPCAP = 10 pFtyp 10 pF502
Input resistance RINtyp 14 kΩ502
Input voltage range VINmin 0 V502
Input bandwidth IBAND1.1V ≤ VREFmax 57.5 kHz502
Sample rate fADC1.1V ≤ VREFmin 15 · max 115 ksps502
Sample rate fADC1.1V ≤ VREF (8-bit resolution)min 15 · max 150 ksps502
Sample rate fADCVREF = 0.55V (10 bits)min 7.5 · max 20 ksps502

Parameters

25
ADC (Bit)
10bit
CPU Core
AVR
CPU Maximum Speed
20MHz
Core Size
8 Bit
Current - Supply
7.2mA
DAC (Bit)
8bit
EEPROM
128Byte
Features
Undervoltage detection (BOR/LVD/LVR/LVI)
Infrared Data Association
有
Internal Oscillator
有
Low-Voltage Detect
有
Number of I/O
6
Operating Temperature
-40℃~+125℃
Oscillator Type
Built-in
Output Current per Pin(Max)
40mA
Program Memory Type
FLASH
Program Storage Size
4KB
RAM Size
256Byte
Rise Time
1.3ns
Standby Current
100nA
Thermal Resistance(Junction to Ambient)
91.8℃/W
Thermal Resistance(Junction to Case)
21.5℃/W
Voltage - Supply
2.7V~5.5V
Voltage - Supply(Absolute Max)
6V
Watchdog
有

Order codes

3

Pinout

8
The pins of the ATTINY412-SSN
PinNameType
1VCCPower in
2PA6Input/output
3PA7Input/output
4PA1Input/output
5PA2Input/output
6RESET/PA0Input/output
7PA3Input/output
8GNDPower in

Open-source boards using it

All 56
  • 2 layers24 × 17 mmPower atiny v2, the printed circuit board in 3D

    Power atiny v2

    fijam/md-lpm

    This project consists of hardware files and software for a coin-battery operated laser tester that fits in a MiniDisk case.

    17 parts14
  • 2 layers100 × 22 mmPCBv2, the printed circuit board in 3D

    PCBv2

    adaand00/TINYLED

    Light-up sign with an attiny10 and three ws2812b RGB LEDs.

    20 parts5GPL-3.0
  • 2 layers26.1 × 31.4 mmQC Hack wPins, the printed circuit board in 3D

    QC Hack wPins

    Fab-Lab-Island/fli-bootcamp-2025

    About Fab Lab ísland bootcamp Húsavík 2025. Kíkið á síðuna fyrir neðan!

    15 parts2
  • 2 layersPcb actionneur ventouse, the printed circuit board in 3D

    Pcb actionneur ventouse

    Brasseur2robot/Les-brasseurs-d-idees

    Codebase de l'équipe légende des brasseurs d'idées concourant à la coupe de France de robotique. Vous pouvez y retrouver les différents fichiers utilisés pour la création et le fonctionnement de notre robot principal et…

    25 parts1GPL-3.0
  • 4 layers98 × 98 mmIGEM melty, the printed circuit board in 3D

    IGEM melty

    SreeniEadara/Hopkins-iGEM-2022-electrical

    Schematics and PCB designs for Hopkins iGEM 2022

    64 parts1
  • 2 layers58 × 29.5 mmAttiny412 addressable, the printed circuit board in 3D

    Attiny412 addressable

    user-will/cursedPCB

    A quick start guide and related files for the Cursed PCB by Reil Industrial

    35 parts1
  • 2 layers24.2 × 24.1 mmVPC, the printed circuit board in 3D

    VPC

    Archfx/evie

    Camaro6 tweaks

    27 parts
  • 2 layers175 × 85 mmGain box psu pcb, the printed circuit board in 3D

    Gain box psu pcb

    carmisergio/denon-preout-mod

    PCB designs and firmware for the Denon AVR-X1300W Pre-out mod

    80 parts

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Questions

Is there a KiCad symbol and footprint for the ATTINY412-SSN?

Yes. The symbol is MCU_Microchip_ATtiny:ATtiny412-SS and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the ATTINY412-SSN?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the ATTINY412-SSN datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the ATTINY412-SSN?

JLCPCB lists it as part C1337190, with 2,388 in stock; the sellers' links on this page open their listings.

What can replace the ATTINY412-SSN?

Parts like it in the library: the ATTINY13A-SSU by Microchip Technology, the PIC12F1822-I/SN by Microchip Technology, the ATTINY202-SSN by Microchip Technology and the PIC12F675-I/SN by Microchip Technology. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the ATTINY412-SSN?

56 boards in 38 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8