
Power atiny v2
fijam/md-lpm
This project consists of hardware files and software for a coin-battery operated laser tester that fits in a MiniDisk case.

The ATTINY412-SSN is a microcontroller made by Microchip Technology in a SOIC-8 package with 8 pins. -40℃~+105℃ 1.8V~5.5V 10bit 128Byte 20MHz 256Byte 4KB 6 8 Bit 8bit AVR Built-in FLASH SOIC-8 Microcontrollers (MCU/MPU/SOC) ROHS.
PCBKit's library has its KiCad symbol (MCU_Microchip_ATtiny:ATtiny412-SS, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 2,388 are in stock at JLCPCB (part C1337190). 56 open-source boards in 38 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Power supply voltage VDD | min -0.5 · max 6 V | 489 | |
| Current into a VDD pin IVDD | T = [-40, 85]°C | max 200 mA | 489 |
| Current into a VDD pin IVDD | T = [85, 125]°C | max 100 mA | 489 |
| Current out of a GND pin IGND | T = [-40, 85]°C | max 200 mA | 489 |
| Current out of a GND pin IGND | T = [85, 125]°C | max 100 mA | 489 |
| RESET pin voltage with respect to GND VRST | min -0.5 · max 13 V | 489 | |
| Pin voltage with respect to GND VPIN | min -0.5 V | 489 | |
| I/O pin sink/source current IPIN | min -40 · max 40 mA | 489 | |
| I/O pin injection current except RESET pin Ic1(1) | VPIN < GND – 0.6V or 5.5V < VPIN ≤ 6.1V; 4.9V < VDD ≤ 5.5V | min -1 · max 1 mA | 489 |
| I/O pin injection current except RESET pin Ic2(1) | VPIN < GND – 0.6V or VPIN ≤ 5.5V; VDD ≤ 4.9V | min -15 · max 15 mA | 489 |
| Sum of I/O pin injection current except RESET pin Ictot | min -45 · max 45 mA | 489 | |
| Storage temperature Tstorage | min -65 · max 150 °C | 489 | |
| Operating supply voltage VDD | Operation ensured down to 2.7V or BOD triggering level, VBOD; see note 2 | min 2.7 · max 5.5 V | 490 |
| Operating temperature range(1) T | Refer to device ordering codes for temperature range | min -40 · max 125 °C | 490 |
| Operating system clock frequency CLK_CPU | VDD = [2.7, 5.5]V; T = [-40, 125]°C; note 1 | min 0 · max 8 MHz | 490 |
| Operating system clock frequency CLK_CPU | VDD = [4.5, 5.5]V; T = [-40, 125]°C; note 2 | min 0 · max 16 MHz | 490 |
| Active power consumption | Active; CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 7.2 mA | 491 |
| Active power consumption | Active; CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 3.7 mA | 491 |
| Active power consumption | Active; CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive | typ 2.2 mA | 491 |
| Active power consumption | Active; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 19 uA | 491 |
| Active power consumption | Active; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive | typ 11 uA | 491 |
| Idle power consumption | Idle; CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterization | typ 2.2 · max 5 mA | 491 |
| Idle power consumption | Idle; CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterization | typ 1.3 · max 2.5 mA | 491 |
| Idle power consumption | Idle; CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive | typ 0.7 · max 1.5 mA | 491 |
| Idle power consumption | Idle; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterization | typ 8 · max 20 uA | 491 |
| Idle power consumption | Idle; CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive; maximum based on characterization | typ 4 · max 15 uA | 491 |
| Standby power consumption | Standby; RTC running at 1.024 kHz from external XOSC32K (CL = 7.5 pF); VDD = 3V; 25°C | typ 0.7 uA | 491 |
| Standby power consumption | Standby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 25°C | typ 0.7 · max 3 uA | 491 |
| Standby power consumption | Standby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 85°C; maximum based on characterization | max 6 uA | 491 |
| Standby power consumption | Standby; RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; 125°C | max 8 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | Power Down/Standby; all peripherals stopped; VDD = 3V; 25°C | typ 0.1 · max 2 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | Power Down/Standby; all peripherals stopped; VDD = 3V; 85°C; maximum based on characterization | max 5 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | Power Down/Standby; all peripherals stopped; VDD = 3V; 125°C | max 7 uA | 491 |
| Reset power consumption | Reset; Reset line pulled down; VDD = 3V; 25°C | typ 100 uA | 491 |
| Start-up time from any Reset release twakeup | VDD = 3V; T = 25°C; OSC20M system clock | typ 200 us | 492 |
| Wake-up from Idle sleep mode twakeup | OSC20M @ 16 MHz; VDD = 5V; T = 25°C | typ 1.2 us | 492 |
| Wake-up from Idle sleep mode twakeup | OSC20M @ 8 MHz; VDD = 3V; T = 25°C | typ 2.4 us | 492 |
| Wake-up from Standby and Power-Down sleep mode twakeup | VDD = 3V; T = 25°C; OSC20M system clock | typ 10 us | 492 |
| BOD | Continuous; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 19 uA | 492 |
| BOD | Sampling @ 1 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 1 uA | 492 |
| TCA | 16-bit count @ 1 MHz; module only; VDD = 3V; T = 25°C; Idle | typ 13 uA | 492 |
| TCB | 16-bit count @ 1 MHz; module only; VDD = 3V; T = 25°C; Idle | typ 7.5 uA | 492 |
| RTC | 16-bit count @ 32.768 kHz @ OSCULP32K; module only; VDD = 3V; T = 25°C; Idle | typ 1 uA | 492 |
| WDT (including OSCULP32K) | Module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 1 uA | 492 |
| OSC20M | Module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 125 uA | 492 |
| AC | Fast mode; CPU in Standby; module only; VDD = 3V; T = 25°C | typ 92 uA | 492 |
| AC | Low-Power mode; CPU in Standby; module only; VDD = 3V; T = 25°C | typ 45 uA | 492 |
| ADC | 50 ksps; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 325 uA | 492 |
| ADC | 100 ksps; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 340 uA | 492 |
| XOSC32K | CL = 7.5 pF; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 0.5 uA | 492 |
| OSCULP32K | Module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 0.5 uA | 492 |
| USART | Enable @ 9600 Baud; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 13 uA | 492 |
| SPI (Master) | Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 2 uA | 492 |
| TWI (Master) | Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 24 uA | 492 |
| TWI (Slave) | Enable @ 100 kHz; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 17 uA | 492 |
| Flash programming | Erase Operation; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 1.5 mA | 493 |
| Flash programming | Write Operation; module only; VDD = 3V; T = 25°C; Idle; OSC20M at 1 MHz | typ 3 mA | 493 |
| Power-on Slope SRON | max 100 V/ms | 493 | |
| POR threshold voltage on VDD falling VPOR | VDD falls/rises at 0.5 V/ms or slower | min 0.8 · max 1.6 V | 493 |
| POR threshold voltage on VDD rising VPOR | VDD falls/rises at 0.5 V/ms or slower | min 1.4 · max 1.8 V | 493 |
| BOD triggering level (falling/rising) VBOD | BODLEVEL7 | min 3.9 · typ 4.2 · max 4.5 V | 493 |
| BOD triggering level (falling/rising) VBOD | BODLEVEL2 | min 2.4 · typ 2.6 · max 2.9 V | 493 |
| VLM threshold relative to BOD triggering level VVLM | BOD.VLMLVL = 0x0 | typ 4 % | 493 |
| VLM threshold relative to BOD triggering level VVLM | BOD.VLMLVL = 0x1 | typ 13 % | 493 |
| VLM threshold relative to BOD triggering level VVLM | BOD.VLMLVL = 0x2 | typ 25 % | 493 |
| Hysteresis VHYS | BODLEVEL7 | typ 80 mV | 493 |
| Hysteresis VHYS | BODLEVEL2 | typ 40 mV | 493 |
| Detection time TBOD | Continuous | typ 7 us | 493 |
| Detection time TBOD | Sampled, 1 kHz | typ 1 ms | 493 |
| Detection time TBOD | Sampled, 125 Hz | typ 8 ms | 493 |
| Start-up time TStart | Time from enable to ready | typ 40 us | 493 |
| Ensured detection for a high-voltage Reset VHVRST | min 11.5 · max 12.5 V | 494 | |
| Input low-voltage for RESET VRST_VIL | min -0.2 V | 494 | |
| Minimum pulse-width on the RESET pin tRST | max 2.5 us | 494 | |
| RESET pull-up resistor RRST | VReset = 0V | min 20 · max 60 kΩ | 494 |
| Accuracy with 16 MHz frequency selection fOSC20M | Factory calibrated; T = 25°C, 3.0V | min -3 · max 3 % | 494 |
| Accuracy with 16 MHz frequency selection fOSC20M | Factory calibrated; T = [0, 70]°C; VDD = [2.7, 3.6]V; based on characterization | min -4 · max 4 % | 494 |
| Accuracy with 16 MHz frequency selection fOSC20M | Factory calibrated; Full operation range; based on characterization | min -5 · max 5 % | 494 |
| User calibration range fCAL | OSC20M(1) = 16 MHz | min 14.5 · max 17.5 MHz | 494 |
| Calibration step size %CAL | VDD = 3V | typ 1.5 % | 494 |
| Duty cycle DC | VDD = 3V | typ 50 % | 494 |
| Start-up time TStart | Within 2% accuracy; VDD = 3V | typ 8 us | 494 |
| Accuracy fOSCULP32K | Factory calibrated; T = 25°C, 3.0V | min -3 · max 3 % | 494 |
| Accuracy fOSCULP32K | Factory calibrated; T = [0, 70]°C; VDD = [2.7, 3.6]V; based on characterization | min -10 · max 10 % | 494 |
| Accuracy fOSCULP32K | Factory calibrated; Full operation range; based on characterization | min -30 · max 30 % | 494 |
| Start-up time TStart | VDD = 3V | typ 250 us | 494 |
| Frequency Fout | typ 32.768 kHz | 495 | |
| Start-up time TStart | CL = 7.5 pF | typ 300 ms | 495 |
| Crystal load capacitance CL | min 7.5 · max 12.5 pF | 495 | |
| Parasitic capacitor load CTOSC1 | typ 5.5 pF | 495 | |
| Parasitic capacitor load CTOSC2 | typ 5.5 pF | 495 | |
| Equivalent Series Resistance - Safety Factor = 3 ESR | CL = 7.5 pF | max 80 kΩ | 495 |
| Equivalent Series Resistance - Safety Factor = 3 ESR | CL = 12.5 pF | max 40 kΩ | 495 |
| Frequency fCLCL | VDD = [2.7, 5.5]V | min 0 · max 8 MHz | 495 |
| Frequency fCLCL | VDD = [4.5, 5.5]V | min 0 · max 16 MHz | 495 |
| Clock period tCLCL | VDD = [2.7, 5.5]V | min 125 ns | 495 |
| Clock period tCLCL | VDD = [4.5, 5.5]V | min 62.5 ns | 495 |
| High time tCHCX | VDD = [2.7, 5.5]V | min 50 ns | 495 |
| High time tCHCX | VDD = [4.5, 5.5]V | min 25 ns | 495 |
| Low time tCLCX | VDD = [2.7, 5.5]V | min 50 ns | 495 |
| Low time tCLCX | VDD = [4.5, 5.5]V | min 25 ns | 495 |
| Input low-voltage, except RESET pin as I/O VIL | TA = [-40, 105]°C; VDD = [2.7, 5.5]V | min -0.2 V | 495 |
| I/O pin drive strength VOL | VDD = 3.0V, IOL = 7.5 mA; TA = [-40, 105]°C | max 0.6 V | 495 |
| I/O pin drive strength VOL | VDD = 5.0V, IOL = 15 mA; TA = [-40, 105]°C | max 1 V | 495 |
| I/O pin drive strength VOH | VDD = 3.0V, IOH = 7.5 mA; TA = [-40, 105]°C | min 2.4 V | 495 |
| I/O pin drive strength VOH | VDD = 5.0V, IOH = 15 mA; TA = [-40, 105]°C | min 4 V | 495 |
| θJA θJA | 8-pin SOIC | typ 91.8 °C/W | 547 |
| θJC θJC | 8-pin SOIC | typ 21.5 °C/W | 547 |
| Operating supply voltage VDD | min 2.7 · max 5.5 V | 490 | |
| Operating temperature range T | Refer to device ordering codes for device temperature range | min -40 · max 125 °C | 490 |
| Operating system clock frequency CLK_CPU | VDD = [2.7, 5.5]V; T = [-40, 125]°C | min 0 · max 8 MHz | 490 |
| Operating system clock frequency CLK_CPU | VDD = [4.5, 5.5]V; T = [-40, 125]°C | min 0 · max 16 MHz | 490 |
| Active power consumption | CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 7.2 mA | 491 |
| Active power consumption | CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 3.7 mA | 491 |
| Active power consumption | CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive | typ 2.2 mA | 491 |
| Active power consumption | CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; peripherals disabled, without I/O drive | typ 19 uA | 491 |
| Active power consumption | CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; peripherals disabled, without I/O drive | typ 11 uA | 491 |
| Idle power consumption | CLK_CPU = 16 MHz; VDD = 5V; T = 25°C; maximum based on characterization | typ 2.2 · max 5 mA | 491 |
| Idle power consumption | CLK_CPU = 8 MHz (div2); VDD = 5V; T = 25°C; maximum based on characterization | typ 1.3 · max 2.5 mA | 491 |
| Idle power consumption | CLK_CPU = 8 MHz (div2); VDD = 3V; T = 25°C | typ 0.7 · max 1.5 mA | 491 |
| Idle power consumption | CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 5V; T = 25°C; maximum based on characterization | typ 8 · max 20 uA | 491 |
| Idle power consumption | CLK_CPU = 32.768 kHz (OSCULP32K); VDD = 3V; T = 25°C; maximum based on characterization | typ 4 · max 15 uA | 491 |
| Standby power consumption | RTC running at 1.024 kHz from external XOSC32K (CL = 7.5 pF); VDD = 3V; T = 25°C | typ 0.7 uA | 491 |
| Standby power consumption | RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 25°C | typ 0.7 · max 3 uA | 491 |
| Standby power consumption | RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 85°C; based on characterization | max 6 uA | 491 |
| Standby power consumption | RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; T = 125°C | max 8 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | All peripherals stopped; VDD = 3V; T = 25°C | typ 0.1 · max 2 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | All peripherals stopped; VDD = 3V; T = 85°C; based on characterization | max 5 uA | 491 |
| Power down/Standby power consumption are the same when all peripherals are stopped | All peripherals stopped; VDD = 3V; T = 125°C | max 7 uA | 491 |
| Reset power consumption | Reset line pulled down; VDD = 3V; T = 25°C | typ 100 uA | 491 |
| BOD | Continuous; VDD = 3V; T = 25°C; Idle; module current only | typ 19 uA | 492 |
| BOD | Sampling @ 1 kHz; VDD = 3V; T = 25°C; Idle; module current only | typ 1 uA | 492 |
| TCA | 16-bit count @ 1 MHz; VDD = 3V; T = 25°C; Idle; module current only | typ 13 uA | 492 |
| TCB | 16-bit count @ 1 MHz; VDD = 3V; T = 25°C; Idle; module current only | typ 7.5 uA | 492 |
| RTC | 16-bit count @ 32.768 kHz @ OSCULP32K; VDD = 3V; T = 25°C; Idle; module current only | typ 1 uA | 492 |
| WDT (including OSCULP32K) | VDD = 3V; T = 25°C; Idle; module current only | typ 1 uA | 492 |
| OSC20M | VDD = 3V; T = 25°C; Idle; module current only | typ 125 uA | 492 |
| AC | Fast mode; CPU in Standby; VDD = 3V; T = 25°C; module current only | typ 92 uA | 492 |
| AC | Low-Power mode; CPU in Standby; VDD = 3V; T = 25°C; module current only | typ 45 uA | 492 |
| ADC | 50 ksps; VDD = 3V; T = 25°C; Idle; module current only | typ 325 uA | 492 |
| ADC | 100 ksps; VDD = 3V; T = 25°C; Idle; module current only | typ 340 uA | 492 |
| XOSC32K | CL = 7.5 pF; VDD = 3V; T = 25°C; Idle; module current only | typ 0.5 uA | 492 |
| OSCULP32K | VDD = 3V; T = 25°C; Idle; module current only | typ 0.5 uA | 492 |
| USART | Enable @ 9600 Baud; VDD = 3V; T = 25°C; Idle; module current only | typ 13 uA | 492 |
| SPI (Master) | Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current only | typ 2 uA | 492 |
| TWI (Master) | Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current only | typ 24 uA | 492 |
| TWI (Slave) | Enable @ 100 kHz; VDD = 3V; T = 25°C; Idle; module current only | typ 17 uA | 492 |
| Flash programming | Erase Operation; module current only | typ 1.5 mA | 493 |
| Flash programming | Write Operation; module current only | typ 3 mA | 493 |
| Maximum combined I/O sink current per pin group Itotal | Pin group x (Px[7:0]) | max 100 mA | 496 |
| Maximum combined I/O source current per pin group Itotal | Pin group x (Px[7:0]) | max 100 mA | 496 |
| Input low-voltage on RESET pin as I/O VIL2 | min -0.2 V | 496 | |
| I/O pin drive strength on RESET pin as I/O VOL2 | VDD = 3.0V, IOL = 0.25 mA | max 0.6 V | 496 |
| I/O pin drive strength on RESET pin as I/O VOL2 | VDD = 5.0V, IOL = 0.5 mA | max 1 V | 496 |
| I/O pin drive strength on RESET pin as I/O VOH2 | VDD = 3.0V, IOH = 0.25 mA | min 2.4 V | 496 |
| I/O pin drive strength on RESET pin as I/O VOH2 | VDD = 5.0V, IOH = 0.5 mA | min 4 V | 496 |
| Rise time tRISE | VDD = 3.0V, load = 20 pF | typ 2.5 ns | 496 |
| Rise time tRISE | VDD = 5.0V, load = 20 pF | typ 1.5 ns | 496 |
| Fall time tFALL | VDD = 3.0V, load = 20 pF | typ 2 ns | 496 |
| Fall time tFALL | VDD = 5.0V, load = 20 pF | typ 1.3 ns | 496 |
| I/O pin capacitance except TOSC and TWI pins CPIN | typ 3 pF | 496 | |
| I/O pin capacitance on TOSC pins CPIN | typ 5.5 pF | 496 | |
| I/O pin capacitance on TWI pins CPIN | typ 10 pF | 496 | |
| Pull-up resistor RP | min 20 · typ 35 · max 50 kΩ | 496 | |
| SCK clock frequency fSCK | Master | max 10 MHz | 496 |
| SCK period tSCK | Master | min 100 ns | 498 |
| SCK rise time tSCKR | Master | typ 2.7 ns | 498 |
| SCK fall time tSCKF | Master | typ 2.7 ns | 498 |
| MISO setup to SCK tMIS | Master | typ 10 ns | 498 |
| MISO hold after SCK tMIH | Master | typ 10 ns | 498 |
| MOSI hold after SCK tMOH | Master | typ 1 ns | 498 |
| Slave SCK clock frequency fSSCK | Slave | max 5 MHz | 498 |
| SCK rise time tSSCKR | Slave | max 1600 ns | 498 |
| SCK fall time tSSCKF | Slave | max 1600 ns | 498 |
| MOSI setup to SCK tSIS | Slave | min 3 ns | 498 |
| SS setup to SCK tSSS | Slave | min 21 ns | 498 |
| SS hold after SCK tSSH | Slave | min 20 ns | 498 |
| MISO setup to SCK tSOS | Slave | typ 8 ns | 498 |
| MISO hold after SCK tSOH | Slave | typ 13 ns | 498 |
| MISO setup after SS low tSOSS | Slave | typ 11 ns | 498 |
| MISO hold after SS low tSOSH | Slave | typ 8 ns | 498 |
| SCL clock frequency fSCL | Maximum frequency requires system clock at 10 MHz, VDD = [2.7, 5.5]V and T = [-40, 105]°C | min 0 · max 1000 kHz | 499 |
| Output low voltage VOL | Iload = 3 mA, Normal mode, VDD > 2.7V | max 0.4 V | 499 |
| Low-level output current IOL | fSCL ≤ 400 kHz, VOL = 0.4V | min 3 mA | 499 |
| Low-level output current IOL | fSCL ≤ 1 MHz, VOL = 0.4V | min 20 mA | 499 |
| Capacitive load for each bus line CB | fSCL ≤ 100 kHz | max 400 pF | 499 |
| Capacitive load for each bus line CB | fSCL ≤ 400 kHz | max 400 pF | 499 |
| Capacitive load for each bus line CB | fSCL ≤ 1 MHz | max 550 pF | 499 |
| Rise time for both SDA and SCL tR | fSCL ≤ 100 kHz | max 1000 ns | 499 |
| Rise time for both SDA and SCL tR | fSCL ≤ 400 kHz | min 20 · max 300 ns | 499 |
| Rise time for both SDA and SCL tR | fSCL ≤ 1 MHz | max 120 ns | 499 |
| Output fall time from VIHmin to VILmax tOF | 10 pF < Capacitance of bus line < 400 pF; fSCL ≤ 400 kHz | max 250 ns | 499 |
| Output fall time from VIHmin to VILmax tOF | 10 pF < Capacitance of bus line < 400 pF; fSCL ≤ 1 MHz | max 120 ns | 499 |
| Spikes suppressed by Input filter tSP | min 0 · max 50 ns | 499 | |
| Input current for each I/O pin IL | 0.1×VDD < VI < 0.9×VDD | max 1 uA | 499 |
| Capacitance for each I/O pin CI | max 10 pF | 499 | |
| Hold time (repeated) Start condition tHD;STA | fSCL ≤ 100 kHz | min 4 us | 499 |
| Hold time (repeated) Start condition tHD;STA | fSCL ≤ 400 kHz | min 0.6 us | 499 |
| Hold time (repeated) Start condition tHD;STA | fSCL ≤ 1 MHz | min 0.26 us | 499 |
| Data hold time tHD;DAT | Slave; All Frequencies; SDAHOLD = 0x00 | min 90 · typ 150 · max 220 ns | 501 |
| Data hold time tHD;DAT | Slave; All Frequencies; SDAHOLD = 0x01 | min 130 · typ 200 · max 350 ns | 501 |
| Data hold time tHD;DAT | Slave; All Frequencies; SDAHOLD = 0x02 | min 260 · typ 400 · max 580 ns | 501 |
| Data hold time tHD;DAT | Slave; All Frequencies; SDAHOLD = 0x03 | min 390 · typ 550 · max 1270 ns | 501 |
| Start-up time TStart | typ 25 us | 501 | |
| Power supply voltage range for INT055V VDDINT055V | min 2.7 · max 5.5 V | 501 | |
| Power supply voltage range for INT11V VDDINT11V | min 2.7 · max 5.5 V | 501 | |
| Power supply voltage range for INT15V VDDINT15V | min 2.7 · max 5.5 V | 501 | |
| Power supply voltage range for INT25V VDDINT25V | min 2.9 · max 5.5 V | 501 | |
| Power supply voltage range for INT43V VDDINT43V | min 4.75 · max 5.5 V | 501 | |
| Internal reference voltage INT11V | VDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterization | min -2 · max 2 % | 501 |
| Internal reference voltage INT055V, INT15V, INT25V | VDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterization | min -3 · max 3 % | 501 |
| Internal reference voltage INT055V, INT11V, INT15V, INT25V, INT43V | VDD = [2.7V, 5.5V]; T = [-40, 125]°C; based on characterization | min -5 · max 5 % | 501 |
| Internal reference voltage INT055V, INT11V, INT15V, INT25V | VDD = [2.7V, 3.6V]; T = [0, 105]°C; based on characterization | min -3 · max 3 % | 502 |
| Supply voltage VDD | ADC; Temperature = -40°C to 125°C | min 2.7 · max 5.5 V | 502 |
| Reference voltage VREF | REFSEL = Internal reference | min 0.55 V | 502 |
| Reference voltage VREF | REFSEL = VDD | min 2.7 · max 5.5 V | 502 |
| Input capacitance CIN | SAMPCAP = 5 pF | typ 5 pF | 502 |
| Input capacitance CIN | SAMPCAP = 10 pF | typ 10 pF | 502 |
| Input resistance RIN | typ 14 kΩ | 502 | |
| Input voltage range VIN | min 0 V | 502 | |
| Input bandwidth IBAND | 1.1V ≤ VREF | max 57.5 kHz | 502 |
| Sample rate fADC | 1.1V ≤ VREF | min 15 · max 115 ksps | 502 |
| Sample rate fADC | 1.1V ≤ VREF (8-bit resolution) | min 15 · max 150 ksps | 502 |
| Sample rate fADC | VREF = 0.55V (10 bits) | min 7.5 · max 20 ksps | 502 |
| Pin | Name | Type |
|---|---|---|
| 1 | VCC | Power in |
| 2 | PA6 | Input/output |
| 3 | PA7 | Input/output |
| 4 | PA1 | Input/output |
| 5 | PA2 | Input/output |
| 6 | RESET/PA0 | Input/output |
| 7 | PA3 | Input/output |
| 8 | GND | Power in |

fijam/md-lpm
This project consists of hardware files and software for a coin-battery operated laser tester that fits in a MiniDisk case.


Fab-Lab-Island/fli-bootcamp-2025
About Fab Lab ísland bootcamp Húsavík 2025. Kíkið á síðuna fyrir neðan!

Brasseur2robot/Les-brasseurs-d-idees
Codebase de l'équipe légende des brasseurs d'idées concourant à la coupe de France de robotique. Vous pouvez y retrouver les différents fichiers utilisés pour la création et le fonctionnement de notre robot principal et…

SreeniEadara/Hopkins-iGEM-2022-electrical
Schematics and PCB designs for Hopkins iGEM 2022

user-will/cursedPCB
A quick start guide and related files for the Cursed PCB by Reil Industrial


carmisergio/denon-preout-mod
PCB designs and firmware for the Denon AVR-X1300W Pre-out mod
<iframe src="https://pcbkit.io/embed/parts/microchip/ATTINY412-SSN" title="ATTINY412-SSN in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/microchip/ATTINY412-SSN.jpg" alt="ATTINY412-SSN" width="1200" height="900">[](https://pcbkit.io/parts/microchip/ATTINY412-SSN)Yes. The symbol is MCU_Microchip_ATtiny:ATtiny412-SS and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
SOIC-8, with 8 pins. Its footprint is drawn on this page.
Microchip Technology publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C1337190, with 2,388 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the ATTINY13A-SSU by Microchip Technology, the PIC12F1822-I/SN by Microchip Technology, the ATTINY202-SSN by Microchip Technology and the PIC12F675-I/SN by Microchip Technology. Check their datasheets: a part that fits the footprint may still differ in its ratings.
56 boards in 38 repositories on GitHub; the most starred are listed on this page, with their KiCad files.