4 layers130 × 90 mm
Phase2-module
udaravima/Lab_Bench
A modular, rack-style DC power supply: up to 8 hot-pluggable 600 W buck modules on a shared DC input bus, coordinated by a central manager over CAN.
180 parts1GPL-3.0
2 layers100 × 80 mm
Phase3-manager
udaravima/Lab_Bench1A modular, rack-style DC power supply: up to 8 hot-pluggable 600 W buck modules on a shared DC input bus, coordinated by a central manager over CAN.
- Size
- 100 × 80 mm
- Copper layers
- 2
- Thickness
- 1.6 mm
- Parts
- 87
- Nets
- 78
- Pads
- 343
- Tracks, vias
- 1,394, 475
- Pours
- 3
- Routed
- Yes
- KiCad
- KiCad 10.0 (file 20260206)
- Created
- 13 Jul 2026
- Updated
- 20 Oct 2026
Overview
Phase3-manager is an open-source printed circuit board by udaravima, from the udaravima/Lab_Bench repository on GitHub, published under the GPL-3.0 licence. It is a 2-layer board of 100 × 80 mm with 87 parts on 78 nets, routed with 1,394 tracks and 475 vias.
It is built around the ESP32-S3-WROOM-1-N8R2, TCAN1042HGVD and LMR36015AQRNXRQ1, with the TCA9535PWR(UMW), TPD2E001DZD and 1N4148W among its other parts. Its parts include 37 resistors, 18 capacitors, 6 ICs, 5 connectors and 4 diodes. It belongs with the power boards and the ESP32 boards of this library.
Main components
8
ESP32-S3-WROOM-1-N8R2
SMD,25.5x18mm-40℃~+85℃ -98.2dBm 2.4GHz 20.5dBm 355mA 3V~3.6V 97mA Bluetooth5.0 ESP32-S3 Chip On-board PCB Antenna UART、SPI、I2C、I2S、USB SMD,25.5x18mm WiFi Modules ROHSEspressif SystemsWiFi Modules
TCAN1042HGVD
SOIC-8-40℃~+125℃ 12uA 4.5V~5.5V 5Mbps 80mA CAN FD Transceiver Low-power mode、Wake-up function、TXD dominant timeout、ESD Protection、Undervoltage Protection、Thermal shutdown protection、Bus Fault Protection、Integrated level shifting SOIC-8 CAN Transceivers ROHSTexas InstrumentsCAN Transceivers
LMR36015AQRNXRQ1
VQFN-12(2x3)-40℃~+150℃@(TJ) 1 1.5A 26uA 4.2V~60V 400kHz Adjustable Buck Built-in Overcurrent Protection、Light load efficient mode、Operating status indication、Cycle-by-cycle current limiting、Hiccup current limiting Step-down type Yes VQFN-12(2x3) DC-DC Converters ROHSTexas InstrumentsDC-DC Converters
TCA9535PWR(UMW)
TSSOP-24I/O ExpandersUMW
TPD2E001DZD
SOT-23-4-40℃~+85℃ 1.5pF 11V 1nA 2 5.5V ESD IEC 61000-4-2 Unidirectional SOT-23-4 ESD and Surge Protection (TVS/ESD) ROHSTexas InstrumentsESD And Surge Protection (TVS/ESD)
1N4148W
SOD-123150mA 1A 1V@50mA 1uA@75V 400mW 4ns 75V Independent SOD-123 Switching Diodes ROHSSTMicroelectronicsSwitching Diodes
MLT-8530
SMD,8.5x8.5mm-20℃~+70℃ 2.5V~4.5V 2.7kHz 3.3mm 3.6V 8.5mm 8.5mm 80dB 95mA Electromagnetic Passive (Externally Driven) SMD SMD,8.5x8.5mm Buzzers ROHSJiangsu Huaneng ElecBuzzers
SMBJ33A
DO-214AA(SMB)-55℃~+150℃ 11.26A@10/1000us 33V 40.6V 53.3V 5uA 600W@10/1000us IEC 61000-4-2 TVS Unidirectional DO-214AA(SMB) ESD and Surge Protection (TVS/ESD) ROHShongjiachengESD And Surge Protection (TVS/ESD)
README
README.mdLab_Bench — Multi-Channel Modular Power Supply
A modular, rack-style DC power supply: up to 8 hot-pluggable 600 W buck modules on a shared DC input bus, coordinated by a central manager over CAN. Each channel is a self-contained analog CV/CC supply with bench-grade precision, usable for lab work, bulk DC power, and battery charging.
Headline specification
| Parameter | Value |
|---|---|
| Input bus | 24–30 V DC nominal (12 V tolerated, output ceiling drops with it) |
| Channels | 1–8, hot-pluggable, slot-addressed |
| Per-channel output | 0 … (V_in − 2 V), 0–30 A, 600 W envelope (first limit binds) |
| Regulation | Analog CV/CC (diode-OR min-selector), firmware never in the loop |
| Setpoint resolution | ~0.5 mV / ≤0.8 mA (16-bit DAC, per-module calibration) |
| Readback | 20-bit INA228, ±0.05 % class |
| Comms | CAN 2.0B @ 500 kbit/s, heartbeat-supervised |
| Scaling | Channels parallel into droop-share groups (firmware feature) |
| Grounding | All outputs share input ground — parallel OK, no series stacking |
| Global limits | Manager-enforced total power budget + hardwired E-stop line |
Documentation index
| Doc | Contents |
|---|---|
| docs/01-system-architecture.md | Topology, backplane, grounding, power budget |
| docs/02-module-design.md | 600 W module: power stage, CV/CC loop, sensing, MCU |
| docs/03-can-protocol.md | Bus parameters, ID map, payloads, fault semantics |
| docs/04-protection-matrix.md | Every fault: detection, response, latching, recovery |
| docs/05-build-plan.md | Phased build with exit criteria (150 W proto → 8-ch rack) |
| docs/06-phase1-circuit-design.md | Worked component values for the 150 W prototype |
| docs/07-module-firmware.md | STM32G431 firmware architecture, pin map, bring-up |
| docs/08-phase2-circuit-design.md | Worked component values for the 600 W module (LM5143 + LM5069) |
| docs/09-phase3-circuit-design.md | Backplane + ESP32-S3 manager design (slots, E-stop chain, bus metering, UI) |
| docs/10-manager-firmware.md | Manager firmware architecture (host-tested core + ESP-IDF shell) |
| docs/11-build-guide.md | How to build one: ordering, assembly, firmware, first power-up |
| docs/12-phase1-bench-tests.md | Phase-1 bench test procedure against the exit criteria (+ results template) |
| hardware/SOURCING.md | LCSC-first part sourcing, prices, order-early list |
| HANDOVER.md | Session handover: state, decisions, gotchas, next steps |
| hardware/phase1-module/tools/README.md | Schematic/PCB generation + verification pipeline |
| hardware/phase1-module/lib/PARTS-TO-DOWNLOAD.md | Exact orderables, package corrections, verified pricing |
Repository layout
docs/ Design docs 01..10, build guide 11, bench tests 12
test-results/ Bench results (template + one file per board run)
hardware/common/ Shared generators, checkers, bom.py + lcsc_parts.py
hardware/phase1-module/ KiCad 7 project (schematics hand-owned; board generated + routed)
tools/ Generators + mechanical checkers (see README)
lib/ Vetted symbol + footprint libraries (shared by phase 2)
hardware/phase2-module/ KiCad 7 project — GENERATED (600 W module, docs/08)
hardware/phase3-backplane/ KiCad 7 project — GENERATED (8-slot backplane, docs/09)
hardware/phase3-manager/ KiCad 7 project — GENERATED (ESP32-S3 manager, docs/09)
firmware/
common/labbench_can.h CAN codec, shared module <-> manager
module/core/ Portable control core (host-tested)
module/ STM32G431 bare-metal firmware (Makefile+arm-gcc)
manager/core/ Portable manager core (host-tested)
manager/idf/ ESP-IDF shell (needs IDF >= 5.1; unproven on silicon)
tests/ Host unit tests — `cd firmware/tests && make test`
tools/lbcan.py Bench helper: build cansend frames, decode candumpStatus (2026-10-06)
Nothing has run on silicon yet; the first board to be built is the Phase-1
module. v0.1.0 was released from master on 2026-09-29.
| Area | State |
|---|---|
| Design docs | Complete: 01–10, plus the build guide (11) and Phase-1 bench test procedure (12) |
| Phase-1 module (150 W) | 100 × 80 mm, routed, 0 unconnected, 0 DRC errors, fab zip and CPL committed. OVP_TRIP routed to the MCU (PB4) for the firmware 0.2 OVP latch. L2 moved to a 5 × 5 mm land (2026-10-06). Next: order and run docs/12. The older 120 × 80 layout on branch phase1-120x80 has wrong L1/U7 lands: do not order it |
| Phase-2 module (600 W) | 130 × 90 mm, routed, 0 unconnected, 0 DRC errors, fab zip and CPL committed; pre-order review closed (HANDOVER); L2 moved to a 5 × 5 mm land (2026-10-06) |
| Phase-3 backplane | 330 × 100 mm, fab-ready; gated on the XT60 polarity buzz-out (MECHANICAL.md) |
| Phase-3 manager | 100 × 80 mm, routed, 0 unconnected, 0 DRC errors; L2 moved to a 5 × 5 mm land (2026-10-05) |
| Module firmware | v0.2 builds (~7 KB, bare-metal STM32G431) with the OCP backup and OVP latch; control core host-tested |
| Manager firmware | v0.2 builds on ESP-IDF 5.3.2; manager, SCPI and UI cores host-tested |
| BOM / sourcing | LCSC numbers in the schematics and per-board BOM and CPL files (hardware/common/bom.py); no CHECK: rows left (closed 2026-10-06); INA228 stock is thin (5 at LCSC); generic R/C parts not yet numbered |
| CI | GitHub Actions: host tests, module and manager firmware builds on every PR |
Complete Phase-1 build (parts, five PCBs, stencil, shipping) ≈ US$100–125.
HANDOVER.md has the detailed resume points. Work lands on the
development branch through pull requests; master receives batched merges.
License
GPL-3.0 (see LICENSE).
Parts
87| Qty | Value | Footprint | References |
|---|---|---|---|
| 25 | 10K | Resistor_SMD:R_0603_1608Metric | R64, R65, R66, R72, R75, R76, R77, R78, R79, R80, R81, R82, R83, R84, R85, R86 +9 |
| 9 | 100n | Capacitor_SMD:C_0603_1608Metric | C52, C65, C66, C69, C70, C73, C74, C75, C76 |
| 4 | 100K | Resistor_SMD:R_0603_1608Metric | R52, R71, R73, R98 |
| 4 | M3 | MountingHole:MountingHole_3.2mm_M3 | H1, H2, H3, H4 |
| 3 | 2N7002 | Package_TO_SOT_SMD:SOT-23 | Q8, Q9, Q10 |
| 3 | Fiducial | Fiducial:Fiducial_1mm_Mask2mm | FID1, FID2, FID3 |
| 2 | 1K | Resistor_SMD:R_0603_1608Metric | R69, R70 |
| 2 | 1u | Capacitor_SMD:C_0603_1608Metric | C53, C68 |
| 2 | 22u/16V | Capacitor_SMD:C_1210_3225Metric | C54, C55 |
| 2 | 4.7K | Resistor_SMD:R_0603_1608Metric | R62, R63 |
| 2 | 4.7u/50V | Capacitor_SMD:C_1210_3225Metric | C50, C51 |
| 2 | 5.1K | Resistor_SMD:R_0603_1608Metric | R67, R68 |
| 1 | 100K 1% | Resistor_SMD:R_0603_1608Metric | R50 |
| 1 | 10u | Capacitor_SMD:C_1210_3225Metric | C64 |
| 1 | 10u/16V | Capacitor_SMD:C_1210_3225Metric | C56 |
| 1 | 1N4148W | Diode_SMD:D_SOD-323 | D9 |
| 1 | 22u/10V | Capacitor_SMD:C_1210_3225Metric | C57 |
| 1 | 24.9K 1% | Resistor_SMD:R_0603_1608Metric | R51 |
| 1 | 2A mini blade | Fuse:Fuse_Blade_Mini_directSolder | F1 |
| 1 | 33u/1.2A | Inductor_SMD:L_Changjiang_FNR5040S | L2 |
| 1 | AO3401A-class PMOS | Package_TO_SOT_SMD:SOT-23 | Q11 |
| 1 | BACKPLANE | Connector_PinHeader_2.54mm:PinHeader_1x20_P2.54mm_Vertical | J1 |
| 1 | BOOT | Button_Switch_SMD:SW_SPST_TL3342 | SW2 |
| 1 | EC11 | Rotary_Encoder:RotaryEncoder_Alps_EC11E-Switch_Vertical_H20mm | ENC1 |
| 1 | ESP32-S3-WROOM-1-N8R2 | RF_Module:ESP32-S3-WROOM-1 | U10 |
| 1 | ILI9341 LCD MODULE | Connector_PinHeader_2.54mm:PinHeader_1x14_P2.54mm_Vertical | J6 |
| 1 | LED_CAN | LED_SMD:LED_0603_1608Metric | D8 |
| 1 | LED_STAT | LED_SMD:LED_0603_1608Metric | D7 |
| 1 | LMR36015AQRNXRQ1 | labbench:LMR36015_RNX_VQFN-HR-12 | U8 |
| 1 | MLT-8530 | labbench:MLT-8530 | BZ1 |
| 1 | NCP1117-3.3 | Package_TO_SOT_SMD:SOT-223-3_TabPin2 | U9 |
| 1 | PANEL KEYS | Connector_PinHeader_2.54mm:PinHeader_1x09_P2.54mm_Vertical | J5 |
| 1 | RESET | Button_Switch_SMD:SW_SPST_TL3342 | SW1 |
| 1 | SMBJ33A | Diode_SMD:D_SMB | D5 |
| 1 | TCA9535PWR | Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm | U13 |
| 1 | TCAN1042HGV | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U11 |
| 1 | TPD2E001 | Package_TO_SOT_SMD:Texas_R-PDSO-N5_DRL-5 | U12 |
| 1 | UART | Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical | J4 |
| 1 | USB-C | Connector_USB:USB_C_Receptacle_GCT_USB4105-xx-A_16P_TopMnt_Horizontal | J3 |
Questions
How big is the Phase3-manager PCB?
It measures 100 × 80 mm and has 2 copper layers, 1.6 mm thick.
What parts does the Phase3-manager use?
87 parts, built around the ESP32-S3-WROOM-1-N8R2, TCAN1042HGVD, LMR36015AQRNXRQ1 and TCA9535PWR(UMW). The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Phase3-manager KiCad files?
From the udaravima/Lab_Bench repository on GitHub, at the commit this page was made from: the board is hardware/phase3-manager/phase3-manager.kicad_pcb and its schematic hardware/phase1-module/aux-rails.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Phase3-manager design in my own project?
Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).
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