RC controller

BONK

An open-source handheld RC transmitter built around the ESP32. Designed by Spectral Systems.

Status: Rev 1 (first PCB revision). The schematic passes ERC with 0 errors and the PCB passes DRC. Boards have been ordered but not yet assembled or tested, so expect errata. See Known issues before building one.

Contents

• Features
• Repository layout
• Hardware overview
• Power architecture
• ESP32 pin map
• Buses and addresses
• Firmware notes
• Bill of materials
• Manufacturing
• Assembly
• Bring-up checklist
• Known issues (Rev 1)
• License

Features

• MCU: ESP32 module (Ai-Thinker ESP32-SL) with on-board PCB antenna
• Inputs: 2 analog joysticks, 2 potentiometers, 2 toggle switches, a rotary encoder with push switch, and BOOT/EN buttons
• Display: 2.8" ILI9341 320x240 SPI TFT module (its SD card slot is not used)
• Radio: nRF24L01 breakout on the shared SPI bus. ESP-NOW/WiFi/BLE are also available from the ESP32 itself
• USB-C: programming and charging through a CP2102N USB-UART bridge with automatic reset into the bootloader
• Battery: 2x 18650 cells in parallel (1S), with a TP4056 charger, DW01A + FS8205A protection, and USB/battery load sharing
• Battery monitoring: INA226 voltage and current monitor on I2C, which measures both charge and discharge current
• PCB: 4 layers, 125 x 100 mm, 1.6 mm thick

Repository layout

RC controller.kicad_pro     KiCad project
RC controller.kicad_sch     Schematic (single sheet, with design notes)
RC controller.kicad_pcb     PCB layout
RC controller.png           3D render
bom/
  ibom.html                 Interactive BOM (open in a browser for assembly)
  RC controller.csv         Raw BOM export
production/
  RC_controller.zip         Gerbers + drill files, ready to upload to JLCPCB
  bom.csv                   BOM for JLCPCB assembly
  positions.csv             Pick-and-place (CPL) file
  designators.csv
  netlist.ipc               IPC netlist (lets the fab run electrical tests)
placement/
  RC controller-all.pos     KiCad component placement file

Designed in KiCad 10.0.6. Open RC controller.kicad_pro to view everything.

Hardware overview

Power architecture

Net names

Charging path

TP4056 BAT → BAT_P → R11 shunt → +VBAT_IN → cells → BAT- → Q4 (FS8205A) → GND → back to the TP4056

The return path goes through the protection MOSFETs. That's what allows the DW01A to stop charging if a cell reaches its overcharge limit.

Load sharing

• USB connected: 5 V feeds +VBAT_OUT through D3 (about 4.5 V). Q3's gate sits at 5 V, so Q3 is off, and its body diode is reverse biased. The battery is isolated from the load and only the charger talks to it. Charge termination is therefore not confused by system current.
• USB disconnected: R27 pulls Q3's gate to GND, Q3 turns on, and the battery powers +VBAT_OUT through Q3's low channel resistance. D3 blocks the battery from back-feeding the USB side.
• During the handover, Q3's body diode keeps the rail up so the ESP32 doesn't brown out.

Protection

The DW01A watches the cell voltage and the voltage drop across the FS8205A. If it detects overcharge, overdischarge, or overcurrent, it turns off one of the two MOSFETs and disconnects BAT- from GND. R26 only feeds the DW01A's CS sense pin and carries no load current.

Battery monitoring

R11 (20 mΩ) is in series with the battery, so the INA226 sees both directions of current:

• Positive current = discharging
• Negative current = charging

The full-scale range is about ±4 A (81.92 mV / 20 mΩ). The INA226's Vin+/Vin- traces are Kelvin-connected directly at R11's pads.

ESP32 pin map

Unused: IO12 and IO17. The SD0 to SD3, CMD and CLK pins are reserved for the module's flash and must stay unconnected.

Why these pins:

• All analog inputs (sticks and pots) are on ADC1 pins, because ADC2 can't be used while WiFi (including ESP-NOW) is active.
• GPIO34 to 39 are input-only with no internal pull-ups, which makes them a good fit for the analog sticks.
• IO0, IO2, IO5, IO12 and IO15 are strapping pins. Nothing on the board forces them to a level that would break booting. IO12 is deliberately left unconnected.

Buses and addresses

SPI (shared)

SCK = IO18, MOSI = IO23, MISO = IO19. Only one device is selected at a time.

I2C

Firmware notes

Firmware is developed separately with PlatformIO (Arduino framework). The following points are for anyone writing firmware for this board:

• Toggle switches and the encoder push switch (IO25, IO26, IO16) have no external pull-ups. Use INPUT_PULLUP. A closed switch reads LOW.
• Encoder A/B (IO27, IO14) already have 10k external pull-ups and RC debounce.
• TFT_eSPI configuration: MISO 19, MOSI 23, SCLK 18, CS 15, DC 2, RST -1 (tied to EN), backlight 13. The breadboard prototype used setRotation(3); check that this still fits the PCB orientation.
• INA226: address 0x40, shunt 0.020 Ω. Discharge reads positive, charging reads negative.
• Low-battery cutoff: the AP2112K is an LDO. Once the battery falls below roughly 3.5 V, the 3.3 V rail starts following it down. Use the INA226 bus voltage to warn the user, and shut down before the DW01A's overdischarge protection trips.
• Uploading: the CP2102N's DTR/RTS lines drive EN and IO0 through Q1/Q2, so uploads should start automatically. If they don't, hold BOOT, tap EN, then release BOOT.

Bill of materials

LCSC numbers are the parts matched for the Rev 1 JLCPCB order. Stock and part numbers change, so verify each one before ordering. Full BOM files are in bom/ and production/.

Manufacturing

Fabricated at JLCPCB. Upload production/RC_controller.zip.

Stackup:

Design rules used: 0.2 mm default tracks and clearance, 0.5 mm power tracks, 1.0 mm battery tracks, 0.6/0.3 mm vias. USB D+/D- are routed as a differential pair over the In1 GND plane. There is a copper keepout under the ESP32 antenna on all layers.

Notes:

• The USB-C connector (X1) has very fine pin spacing, so the board allows bridged solder-mask openings between its pads. Take care not to bridge pins when soldering it.
• U6 (TP4056) uses a modified footprint with 0.3 mm thermal vias, and pad B12 on X1 has a solid zone connection. Both changes are stored on the board, so don't run "Update Footprints from Library" on U6 or X1 without reapplying them.

Assembly

The Rev 1 order uses JLCPCB partial assembly: JLC places the SMT parts on the top side, and the rest is hand-soldered.

Before ordering assembly:

1. Q4 must be a TSSOP-8 part. JLC's automatic match picked a SOT-23-6 FS8205A, which will not fit the footprint. Open the part details and confirm the package.
2. Check every rotation in the placement preview: U8, U3, U6, U9, U2, U7, Q1 to Q4, D3 (cathode band) and the LEDs. Compare each part's pin 1 with the pin-1 mark on the silkscreen.
3. Mounting holes H1 to H4 appear in the CPL but not in the BOM. JLC warns about this; it's safe to continue.

Hand-soldering order (suggested):

1. ESP32-SL module (L1)
2. USB-C connector (X1)
3. Battery holder (BT1, bottom side)
4. Buttons, toggles, encoder, pots
5. Joysticks
6. Display and nRF24 headers last, since they cover other parts

The interactive BOM (bom/ibom.html) highlights where each part goes.

Bring-up checklist

Work through this in order, and don't insert the cells until step 4.

1. Visual inspection. Look for solder bridges, especially on U8, U3 and X1.
2. Short-circuit check (power off). Measure resistance from GND to +5V, +VBAT_OUT, +3V3 and BAT_P. None of them should read close to 0 Ω.
3. USB power, no cells, ideally before soldering the ESP32. Use a current-limited supply or a USB power meter if you have one. Expect:
   • +5V ≈ 5 V
   • +VBAT_OUT ≈ 4.5 V (5 V minus the SS34 drop)
   • +3V3 ≈ 3.3 V
4. Insert the cells. Check polarity. Both cells must be at about the same voltage before you insert them, because cells in parallel at different voltages push a large current into each other. If the board doesn't run from the battery after you insert the cells, plug in USB once: some DW01-based circuits need a charger connection to leave the protected state.
5. Charging. With USB connected, the charge LED should light, and the INA226 should report a negative current.
6. USB-UART. Connect to a PC and confirm the CP2102N appears as a serial port. Older systems may need Silicon Labs' CP210x driver.
7. Firmware. Upload a test sketch. Uploads should start without pressing BOOT, thanks to auto-reset.
8. Peripherals, one at a time: display, sticks and pots, switches and encoder, INA226, nRF24.

Known issues (Rev 1)

• Q4 package: see Assembly. Make sure a TSSOP-8 FS8205A is placed.
• No dedicated bulk capacitor at the nRF24. nRF24L01 modules are known to need a local bulk capacitor for stable operation. If the radio is unreliable, solder a 10 to 100 µF capacitor across the module's VCC and GND pins. Add a footprint for it in Rev 2.
• 10 µF capacitors are 10 V, 0603. At 5 V, DC bias derating significantly reduces their effective capacitance. Consider 16 V or higher, or 0805, in Rev 2.
• Shared MISO. The ILI9341 and the nRF24 share MISO. Some ILI9341 modules reportedly don't release MISO when deselected, which can corrupt nRF24 reads. If this happens, disconnect the display's MISO; the display only needs MISO for read-back.
• 3.3 V regulation at low battery. The AP2112K is an LDO, so below about 3.5 V battery the 3.3 V rail drops with it. Handle this with a firmware cutoff.
• R6/R7 = 50 Ω is a non-standard value (0.1% thin-film part). 51 Ω works the same and is cheaper to source.
• LED forward voltage. D1 and D2 are powered from 3.3 V through 470 Ω. Pick LEDs with a forward voltage around 2 V. Some "green" 0603 LEDs are about 3 V and will be very dim at 3.3 V.

License

The hardware design files are licensed under the CERN Open Hardware Licence Version 2, Permissive (CERN-OHL-P-2.0). See the LICENSE file.

Under this licence you may use, study, modify, make and sell the design, as long as you keep the copyright and licence notices. Firmware, once published, will be licensed separately.

Credits

Designed by Victor Macharia (Syb0rg), Spectral Systems. Repository: github.com/tyke01/bonk

Contributions, issue reports, and build photos are welcome. Please open an issue if you build one.