8b alu slice

01 — Early ALU (historical)

Pre-Tomato experiments · superseded by Lot 07.

Archive lot for early ALU board work. The living Dual-LUT PCB is 07_alu. The prior 8-bit discrete-transistor story (270×270 mm, ~3,488 devices) is documented at alu.tmarhguy.com.

Project map: Boards · 07_alu · Root README

Legacy notes (transistor-era board)

Monolithic 8-bit ALU — complete combinational processor on a single PCB (historical reference below).

Specifications

Functional Blocks

Arithmetic Unit (Top-Left Quadrant)

Components:

• 8× 1-bit full adders (336T)
• 8× XOR gates for B input (96T)
• Carry chain routing

Function: A + B or A - B (via 2's complement)

Signals:

IN:  A[7:0], B[7:0], M
OUT: SUM[7:0], COUT

Logic Unit (Top-Right Quadrant)

Components:

• NAND array (32T)
• NOR array (32T)
• XOR array (96T)
• PASS A/B buffers (32T)
• 5:1 MUX (160T)

Function: NAND, NOR, XOR, PASS A, PASS B operations

Signals:

IN:  A[7:0], B[7:0], LOGIC_SEL[2:0]
OUT: LOGIC_OUT[7:0]

Selection & Output (Center)

Components:

• 2:1 MUX (160T) - arithmetic vs logic select
• Global inverter (16T)

Function: Select result and optionally invert

Signals:

IN:  ARITH[7:0], LOGIC[7:0], MUX_SEL, INV_OUT
OUT: RESULT[7:0]

Flag Generation (Bottom-Left Quadrant)

Components:

• EQUAL comparator (~100T)
• LESS comparator (~120T)
• POSITIVE detector (~20T)

Function: Generate comparison and status flags

Signals:

IN:  A[7:0], B[7:0], OUT[7:0], COUT_IN
OUT: LESS, EQUAL, POSITIVE, COUT

Control Decoder (Bottom-Right Quadrant)

Components:

• Combinational decode logic (~68T)

Function: FUNC[4:0] → control signals

Signals:

IN:  FUNC[4:0]
OUT: M, MUX_SEL, INV_OUT, LOGIC_SEL[2:0]

Pinout

Input Pins (22 total)

Output Pins (12 total)

Fabrication

Manufacturing Requirements

PCB Specs:

• Size: 270×270mm (confirm manufacturer supports large format)
• Layers: 2
• Thickness: 1.6mm
• Copper: 1oz (35µm)
• Min trace/space: 0.2mm/0.2mm
• Surface finish: HASL lead-free

Assembly

Component count:

• 3,488 transistors (624 Discrete + 2,864 in ICs + Support)
• ~500 resistors (10kΩ pull-ups, 220Ω current limiting)
• ~50 capacitors (100nF decoupling)
• 36x 74HC157 + 10x 74HC86 ICs
• Headers, test points

Estimated assembly time: 50-70 hours (hand soldering)

Testing

Power-On Test

1. Visual inspection
2. Continuity: VCC, GND
3. Resistance: VCC-GND > 10kΩ
4. Power-on: Measure current < 200mA idle
5. Voltage: VCC = 5.0V ± 0.1V at all points

Functional Test

Test ADD operation:
  FUNC = 00000
  A = 0x01
  B = 0x01
  Expected OUT = 0x02
  Measure with multimeter or logic analyzer

References

• Schematic - Complete circuit
• PCB Layout - Board layout
• Architecture - System design

Status: Design complete, fabrication-ready
Last Updated: 2026-01-16