Portcard RevC

Retelex

Retro telephone exchange. Also retro telex exchange.

MF8 — a six-channel digital voice carrier in discrete logic

Six 64 kbps channels and a sub-commutated signalling channel in an 8-bit frame, over one twisted pair, built in 74HC. A channel slot is equivalent to DS0: 64 kbps and octet-aligned.

Works with a CVSD voice card (the normal Retelex protocol), a synchronous data card, or a G.711 PCM stream.

[ F ][ C1 ][ C2 ][ C3 ][ S ][ C4 ][ C5 ][ C6 ]      8 bits, 15.625 µs, 64 kHz
                                                    512 kbps, 1.024 MBaud

The superframe is a sequence of 8 frames. It carries signalling (one bit per channel at 8 kHz), it carries the framing word, and it is the octet counter, so at a 64 kHz frame rate, the superframe rate is 8 kHz, the PCM sample rate exactly, and one superframe carries one sample.

But we don't use PCM in practice. Though byte-boundary support does exist.

Exchange

Sixty-four line exchange. Supports MF8 trunks between exchanges.

Up to 48 subscriber lines. 0x and 1x are reserved for trunk and supervisor features.

Anywhere from 1 to 64 lines can be trunks. Each exchange supports connections up to four different exchanges, in any number of lines. For example, MF8 can be doubled so an exchange has 12 lines tying it to its neighbour. This could be done on two fronts for a total of 24 tie lines.

The directions are labelled after the compass points NSEW but this is purely notional.

Digital switching, CVSD or data.

Pulse flood protocol. Sending exchange calls all outward directions which is passed on by all exchanges until dropped or accepted. Preliminary traffic simulation suggests this scales to about a thousand lines across a few dozen exchanges.

General purpose architecture. Chains, stars and rings are possible.

Layout

common/     the cards, and everything that belongs to neither shelf nor block
mf8/        the MF8 carrier: frame, line, backplane
exchange/   the exchange: the design as built, proposed/, analysis/
newimpl/    the exchange in Verilog, the reference the documents describe
pcb/        KiCad boards: the block header, the port card, the bus, SU-1, the lamp panel
sim/        every model, and the committed run beside each
falstad/    the voice path as Falstad circuits
spice/      analog circuits in ngspice
mf2/        MF2, the two-channel member of the MF8 family
old/        retired trees (old/verilog)

A card plugs into an MF8 shelf or an exchange block unchanged, so its specification belongs to neither: common/ is that, and it is why the split exists. Run the models from the repo root — python3 sim/mf8.py.

Documents

common/ — the cards, the socket they share, and the line to the telephone

mf8/ — the carrier

exchange/, newimpl/, falstad/

Tools

python3 sim/mf8.py            frame layer (8-bit / 6 ch)  (mf8.log)
python3 sim/mf8_line.py       over the line              (mf8_line.log)
# measured, not taken: mf8_16.py, mf8_10.py, mf8_10_16.py, mf8_baud.py
python3 sim/linecodes.py      line codes and rate  (linecodes.log)
python3 sim/impulse_sweep.py  impulse falloff      (impulse_sweep.log, .csv)
python3 sim/mf8_render.py     listenable renders   (mf8_render.log; wavs in out/)
python3 sim/subline.py        subscriber line      (subline.log)
python3 sim/cvsd_law.py       the codec law        (cvsd_law.log)
python3 sim/tolerance.py      codec tolerances     (tolerance.log)
python3 sim/tones.py          call-progress tones   (tones.log; wavs in sim/out/)
python3 sim/falstad_cvsd.py   Falstad prototypes   (falstad_cvsd.log; falstad/*.txt)

sim/out/ is not committed. Each render is the full 15 s as the link delivers it — muted wherever the framer was not locked, so outages are heard in place rather than edited out. Files are {dm,ami}_{condition}_ch{n}.wav, with source_ch{n}.wav as the reference.

The .log files beside each in sim/ are the committed runs. Every table in the documents is reproducible from them.

Test audio

sim/talker1.wav … sim/talker7.wav are seven independent LibriSpeech dev-clean speakers, 30 s each, and are not committed — they are extracts from third-party material. Rebuild them with python3 sim/talkers.py --root <dev-clean>. sim/phy_fast.c builds to sim/libphyfast.so; see the header of fast.py.

What is settled and what is not

Settled: the frame, the F word, the framer, and that the carrier is transparent — six talkers through the whole chain in both line codes add +0.00 dB.

Not settled, and not settleable here: the impulse rate on the target loops. The curve is measured (impulse_sweep.py, mf8/line-codes.md §4.5): each impulse costs differential Manchester about 0.77 breaks and AMI about 0.14, so differential Manchester reaches one click a second at 1.3 impulses/s and AMI at about 8. AMI holds that advantage until it collapses outright between 800 and 900 impulses/s. Which matters depends on the loop, and that is a counter on a real pair.

Todo

• Hook flash - put the call on hold! Implemented probably in the subscriber card When on hold the keypad could become available