74HC74D

Nexperia

-40℃~+125℃ 1 15ns 2 2V~6V 3.5pF 37ns@6V,50pF 3ns、3ns、3ns 40uA 5.2mA 5.2mA 74HC Series 82MHz Asynchronous Complementary D-Type Rising Edge Set and Reset SOIC-14 Flip Flops ROHS

Extended

Datasheetnexperia/74HC74D

Category: Flip Flops
Package: SOIC-14
Pins: 14

Overview

The 74HC74D is a flip Flop made by Nexperia in a SOIC-14 package with 14 pins. -40℃~+125℃ 1 15ns 2 2V~6V 3.5pF 37ns@6V,50pF 3ns、3ns、3ns 40uA 5.2mA 5.2mA 74HC Series 82MHz Asynchronous Complementary D-Type Rising Edge Set and Reset SOIC-14 Flip Flops ROHS.

PCBKit's library has its KiCad symbol (74xx:74HC74, from KiCad's library) and its footprint (Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, from KiCad's library), ready for a KiCad board. 73,764 are in stock at JLCPCB (part C27597). 235 open-source boards in 166 repositories on GitHub use it.

Symbol

74xx:74HC74From KiCad's library

Footprint

Package_SO:SOIC-14_3.9x8.7mm_P1.27mmFrom KiCad's library

From the datasheet

Supply, least: 2 V · VCC, recommended operating min · p. 5
Supply, most: 6 V · VCC, recommended operating max · p. 5
Supply, absolute maximum: 7 V · VCC, absolute max · p. 5
Works from: -40 °C · Tamb, recommended operating min · p. 5
Works up to: 125 °C · Tamb, recommended operating max · p. 5
Takes working: 80 µA · VCC supply current max, 6.0 V, inputs at rails, IO = 0 A, -40 °C to +125 °C · p. 6
A pin gives at most: 25 mA · output source or sink current absolute max · p. 5

What it is and has

Function: Dual positive edge-triggered D-type flip-flop with set and reset · p. 1
Input levels: CMOS · p. 1
Power: CMOS low power dissipation · p. 1
Output impedance: Symmetrical · p. 1
Propagation delays: Balanced · p. 1
Latch-up performance: Exceeds 100 mA per JESD 78 Class II Level B · p. 1
ESD protection: HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V · p. 1
ESD protection: CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V · p. 1
JEDEC standard: JESD8C (2.7 V to 3.6 V) · p. 1
JEDEC standard: JESD7A (2.0 V to 6.0 V) · p. 1

Specifications

Parameter	Conditions	As printed	Page
supply voltage VCC		min -0.5 · max 7 V	5
input clamping current IIK	VI < -0.5 V or VI > VCC + 0.5 V	max 20 mA	5
output clamping current IOK	VO < -0.5 V or VO > VCC + 0.5 V	max 20 mA	5
output current IO	VO = -0.5 V to (VCC + 0.5 V)	max 25 mA	5
supply current ICC		max 100 mA	5
ground current IGND		min -100 mA	5
storage temperature Tstg		min -65 · max 150 °C	5
total power dissipation Ptot	Tamb = -40 °C to +125 °C; SOT108-1 (SO14); derates linearly with 10.1 mW/K above 100 °C	max 500 mW	5
supply voltage VCC	74HC74	min 2 · typ 5 · max 6 V	5
input voltage VI	74HC74; maximum VCC	min 0 V	5
output voltage VO	74HC74; maximum VCC	min 0 V	5
ambient temperature Tamb	74HC74	min -40 · typ 25 · max 125 °C	5
input transition rise and fall rate Δt/ΔV	74HC74; VCC = 2.0 V	max 625 ns/V	5
input transition rise and fall rate Δt/ΔV	74HC74; VCC = 4.5 V	typ 1.67 · max 139 ns/V	5
input transition rise and fall rate Δt/ΔV	74HC74; VCC = 6.0 V	max 83 ns/V	5
HIGH-level input voltage VIH	74HC74; VCC = 2.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	min 1.5 · typ 1.2 V	6
HIGH-level input voltage VIH	74HC74; VCC = 2.0 V; -40 °C to +125 °C	min 1.5 V	6
HIGH-level input voltage VIH	74HC74; VCC = 4.5 V; -40 °C to +85 °C; typical at Tamb = 25 °C	min 3.15 · typ 2.4 V	6
HIGH-level input voltage VIH	74HC74; VCC = 4.5 V; -40 °C to +125 °C	min 3.15 V	6
HIGH-level input voltage VIH	74HC74; VCC = 6.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	min 4.2 · typ 3.2 V	6
HIGH-level input voltage VIH	74HC74; VCC = 6.0 V; -40 °C to +125 °C	min 4.2 V	6
LOW-level input voltage VIL	74HC74; VCC = 2.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	typ 0.8 · max 0.5 V	6
LOW-level input voltage VIL	74HC74; VCC = 2.0 V; -40 °C to +125 °C	max 0.5 V	6
LOW-level input voltage VIL	74HC74; VCC = 4.5 V; -40 °C to +85 °C; typical at Tamb = 25 °C	typ 2.1 · max 1.35 V	6
LOW-level input voltage VIL	74HC74; VCC = 4.5 V; -40 °C to +125 °C	max 1.35 V	6
LOW-level input voltage VIL	74HC74; VCC = 6.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	typ 2.8 · max 1.8 V	6
LOW-level input voltage VIL	74HC74; VCC = 6.0 V; -40 °C to +125 °C	max 1.8 V	6
HIGH-level output voltage VOH	74HC74; VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +85 °C; typical at Tamb = 25 °C	min 3.84 · typ 4.32 V	6
HIGH-level output voltage VOH	74HC74; VI = VIH or VIL; IO = -4.0 mA; VCC = 4.5 V; -40 °C to +125 °C	min 3.7 V	6
HIGH-level output voltage VOH	74HC74; VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	min 5.34 · typ 5.81 V	6
HIGH-level output voltage VOH	74HC74; VI = VIH or VIL; IO = -5.2 mA; VCC = 6.0 V; -40 °C to +125 °C	min 5.2 V	6
LOW-level output voltage VOL	74HC74; VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +85 °C; typical at Tamb = 25 °C	typ 0.15 · max 0.33 V	6
LOW-level output voltage VOL	74HC74; VI = VIH or VIL; IO = 4.0 mA; VCC = 4.5 V; -40 °C to +125 °C	max 0.4 V	6
LOW-level output voltage VOL	74HC74; VI = VIH or VIL; IO = 5.2 mA; VCC = 6.0 V; -40 °C to +85 °C; typical at Tamb = 25 °C	typ 0.16 · max 0.33 V	6
LOW-level output voltage VOL	74HC74; VI = VIH or VIL; IO = 5.2 mA; VCC = 6.0 V; -40 °C to +125 °C	max 0.4 V	6
input leakage current II	74HC74; VI = VCC or GND; VCC = 6.0 V; -40 °C to +85 °C; limit ±1.0 uA	max 1 uA	6
input leakage current II	74HC74; VI = VCC or GND; VCC = 6.0 V; -40 °C to +125 °C; limit ±1.0 uA	max 1 uA	6
supply current ICC	74HC74; VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +85 °C	max 40 uA	6
supply current ICC	74HC74; VI = VCC or GND; IO = 0 A; VCC = 6.0 V; -40 °C to +125 °C	max 80 uA	6
input capacitance CI	74HC74; typical at Tamb = 25 °C	typ 3.5 pF	6

Pins, by the datasheet

1 1RD: Asynchronous reset-direct input (active LOW). · p. 4
2 1D: Data input. · p. 4
3 1CP: Clock input (LOW-to-HIGH, edge-triggered). · p. 4
4 1SD: Asynchronous set-direct input (active LOW). · p. 4
5 1Q: Output. · p. 4
6 1Q: Complement output. · p. 4
7 GND: Ground (0 V). · p. 4
8 2Q: Complement output. · p. 4
9 2Q: Output. · p. 4
10 2SD: Asynchronous set-direct input (active LOW). · p. 4
11 2CP: Clock input (LOW-to-HIGH, edge-triggered). · p. 4
12 2D: Data input. · p. 4
13 2RD: Asynchronous reset-direct input (active LOW). · p. 4
14 VCC: Supply voltage. · p. 4

Ordering codes, by the datasheet

74HC74D: SO14 · -40 °C to +125 °C; SOT108-1; CMOS input levels · p. 1

Parameters

Clock Frequency: 82MHz
Current - Output High(IOH): 5.2mA
Current - Output Low(IOL): 5.2mA
Current - Supply: 80uA
Function: Set and Reset
Hold Time: 3ns
Input Capacitance: 3.5pF
Number of Bits per Element: 1
Number of Elements: 2
Operating Temperature: -40℃~+125℃
Output Current per Pin(Max): 25mA
Output Type: Complementary
Propagation Delay: 37ns@6V,50pF
Quiescent Current: 40uA
Series: 74HC Series
Setup Time: 15ns
Synchronous/Asynchronous: Asynchronous
Trigger Type: Rising Edge
Type: D-Type
Voltage - Supply: 2V~6V
Voltage - Supply(Absolute Max): 7V

Order codes

74HC74D,653LCSC C27597
74HC74D,652LCSC C547150

Pinout

The pins of the 74HC74D
Pin	Name	Type
1	R	Input
2	D	Input
3	C	Input
4	S	Input
5	Q	Output
6	Q	Output
7	GND	Power in
8	Q	Output
9	Q	Output
10	S	Input
11	C	Input
12	D	Input
13	R	Input
14	VCC	Power in

Open-source boards using it

All 235

2 layers50.5 × 128.5 mm
OpenThereminV45
GaudiLabs/OpenThereminV4
Open Source Theremin Instrument
107 parts249GPL-3.0
2 layers99.9 × 99.9 mm
Easy z80
skiselev/easy_z80
An easy to build Zilog Z80 based single board computer
61 parts180GPL-3.0
2 layers138 × 96.9 mm
ISA Card
AkBKukU/CM153-Repro
A reproduction of the Philips CM-153 LMSI controller
161 parts145
2 layers88.9 × 98.4 mm
Kickstart switcher-12up
keirf/pcb-projects
The old Kickstart switcher documentation is here.
197 parts108CC0-1.0
2 layers70 × 85 mm
1bit CPU
naoto64/1bit-CPU
1bit CPU using 74HC series logic IC.
38 parts91MIT
2 layers83.8 × 60.8 mm
Cart FeRAM
soniccd123/Genesis-FeRAM-Cart
A open Sega Genesis cartridge PCB
16 parts89
4 layers184.2 × 169.5 mm
SB mini II
simonboak/SB-mini-II
A homebrewed Apple II clone
97 parts76MIT
2 layers116.2 × 79.2 mm
SNES Advanced UV 1-0 new
MouseBiteLabs/Super-Nintendo-Cartridges
A collection of Super Nintendo cartridge circuit boards
66 parts70CC-BY-SA-4.0

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Questions

Is there a KiCad symbol and footprint for the 74HC74D?

Yes. The symbol is 74xx:74HC74 and the footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the 74HC74D?

SOIC-14, with 14 pins. Its footprint is drawn on this page.

Where is the 74HC74D datasheet?

Nexperia publishes it: the Datasheet link on this page opens it.

Where can I order the 74HC74D?

JLCPCB lists it as part C27597, with 73,764 in stock; the sellers' links on this page open their listings.

What can replace the 74HC74D?

Parts like it in the library: the 74HC74D-Q100 by Nexperia, the GN74D by GN Semic, the SN74LS74DR(LX) by lingxingic and the SN74HC74DTR(XBLW) by XBLW. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the 74HC74D?

235 boards in 166 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

74HC74D

Overview

Symbol

Footprint

From the datasheet

What it is and has

Specifications

Pins, by the datasheet

Ordering codes, by the datasheet

Parameters

Order codes

Pinout

Open-source boards using it

OpenThereminV45

Easy z80

ISA Card

Kickstart switcher-12up

1bit CPU

Cart FeRAM

SB mini II

SNES Advanced UV 1-0 new

Show this part on your page

Questions

Is there a KiCad symbol and footprint for the 74HC74D?

What package is the 74HC74D?

Where is the 74HC74D datasheet?

Where can I order the 74HC74D?

What can replace the 74HC74D?

Which open-source boards use the 74HC74D?

Parts like it

74HC74D-Q100

GN74D

SN74LS74DR(LX)

SN74HC74DTR(XBLW)

AIP74HC74SA.TR

74HC74D-Q100653

74HC74D-Q100HL

74HC74D/AU118