
RPI RP2350A MINIMAL R4-S1
Vandewaetere/gitea-kicad-viewer
View KiCad projects in Gitea: interactive schematic, PCB, 3D and BOM right in the file view. No external requests, works for private repos.

NEMESIS (Non-periodic Event Monitoring & Evaluation of Stimulus-Induced States). A desktop app for Stentor habituation: live USB-microscope preview, Arduino stepper taps (Periodic/Poisson, seedable), independent MP4 recording, CSV v1.0 logging + run.json, and plotting for fast, reproducible analysis.
UNIT1 R1 is an open-source printed circuit board by svdrecbd, from the svdrecbd/NEMESIS repository on GitHub, published under the Apache-2.0 licence. It is a 4-layer board of 97 × 55 mm with 72 parts on 72 nets, routed with 374 tracks and 86 vias.
It is built around the RP2350A, W25Q128JVSIQ and 10103594-0001LF, with the IRF4905S, SM03B-SRSS-TB(LF)(SN) and SMBJ18CA among its other parts. Its parts include 32 capacitors, 16 resistors, 5 ICs, 4 diodes and 4 connectors. It belongs with the robots and motor control boards and the RP2350 boards of this library.
This directory contains the first electrically connected UNIT1 board design. It is a real KiCad hierarchy, not a wiring sketch. The RP2350A core comes from Raspberry Pi's official minimal reference; the second sheet adds the protected 12 V input, 5 V supply, DRV8461 motor stage, safe boot defaults, and the motor connector used by the firmware.
Status: R1-LAYOUT physical-design checkpoint; not released for fabrication. The PCB now has the full UNIT1 outline, mounting holes, barrel input, USB, RP2350A core, protected power stage, DRV8461, right-angle motor header, four copper layers, power/ground pours, and routed high-current motor/power paths. The unfinished logic fanout is intentionally left as ratsnest connections; no provisional crossing copper remains on the board.
The finished enclosure is one self-contained controller. It has exactly three normal field connections:
| Connection | UNIT1 endpoint | Purpose |
|---|---|---|
| One qualified 12 V, center-positive adapter | J10 barrel input | Powers the logic and motor stage |
| Existing stepper motor cable | J11 1x4 male header | Four driver outputs to the two motor windings |
| NEMESIS computer | Board USB receptacle | USB CDC control and UF2 firmware updates |
The legacy chain—adapter, external buck/Big Easy Driver, Arduino, breadboard, button/switch, and the wiring between them—is not part of UNIT1. With the adapter connected, UNIT1 supplies itself and drives the motor; the computer only sends commands and receives status over USB. USB power remains protected as a service/update source and cannot back-power the 12 V motor rail.
J10, J11, and the Micro-B USB receptacle are now placed on board edges. J10 uses the current-production Würth 694103107102 land pattern and vendor STEP model as a provisional mechanical match. That jack has a 1.3 mm inside-contact class, while third-party YU1204 listings commonly claim a 5.5 mm OD / 2.5 mm ID plug. That makes the present J10 likely incompatible, but the actual plugs still have to be gauged before a replacement is selected or released.
UNIT1_R1.kicad_sch — root RP2350A/USB/flash/reset schematic.UNIT1_MOTOR_POWER.kicad_sch — protected input, AP63205, DRV8461, and J11.UNIT1_R1.kicad_pcb — four-layer integrated UNIT1 physical-design checkpoint.UNIT1_R1_placement_preview.png — current top-side 3D placement render.UNIT1_R1_back_preview.png — back-side render; regenerate after identity or layout changes.UNIT1_R1_DRC.json — current full-board KiCad DRC result.UNIT1_R1_QA.md — fabrication, firmware, thermal, connector, and multi-week qualification gates.UNIT1_R1.kicad_pro — KiCad project settings.UNIT1_R1_schematic.pdf — rendered two-page review copy.UNIT1_R1_ERC.json — KiCad 10 ERC result.tools/generate_schematic.py — reproducible hierarchy generator.tools/build_pcb.py — reproducible outline, placement, zone, and critical-route builder.tools/check_release.py — fail-closed automated DRC/connectivity/identity gate.tools/check_netlist.py — asserts the 16 critical control, motor, and power nets.artwork/cell_geometry_lab_logo.webp — archived source artwork; deliberately not placed on the PCB.RASPBERRY_PI_REFERENCE_LICENSE.txt — upstream MIT license and disclaimer.J10 barrel tip
-> F10 2.5 A time-lag fuse
-> Q10 IRF4905S reverse-polarity stage + D10 VGS clamp
-> VM_RAW + D11 SMBJ18CA + C20/C21 bulk/high-frequency bypass
|-> U10 AP63205 5 V buck -> D21 --+
| +-> +5V_SYS -> U2 3.3 V LDO -> RP2350A
USB VBUS -------------------------> D20 --+
|
+-> U11 DRV8461 VM -> J11 pins A1, A2, B1, B2The Schottky source OR prevents the 12 V-derived supply from feeding the USB port and prevents USB from back-powering the buck. U11 VREF is grounded because the firmware enables the DRV8461 internal 3.3 V reference before motion.
| RP2350A GPIO | UNIT1 net | DRV8461 pin/function |
|---|---|---|
| 16 | DRV_SPI_MISO | 20 / SDO |
| 17 | DRV_SPI_CS_N | 18 / nSCS, 10 kOhm pull-up |
| 18 | DRV_SPI_SCK | 22 / SCLK |
| 19 | DRV_SPI_MOSI | 21 / SDI |
| 20 | DRV_STEP | 23 / STEP, 10 kOhm pull-down |
| 21 | DRV_DIR | 24 / DIR, 10 kOhm pull-down |
| 22 | DRV_ENABLE | 25 / ENABLE, 10 kOhm pull-down |
| 26 | DRV_SLEEP_N | 26 / nSLEEP, 10 kOhm pull-down |
| 27 | DRV_FAULT_N | 16 / nFAULT, 10 kOhm pull-up |
J11 is a board-mounted 1x4, 2.54 mm male header so the photographed one-piece 4-position Harwin-style female motor housing remains intact:
| J11 pin | Driver output | Intended winding label |
|---|---|---|
| 1 | AOUT1 | A1 / A+ |
| 2 | AOUT2 | A2 / A- |
| 3 | BOUT1 | B1 / B+ |
| 4 | BOUT2 | B2 / B- |
Confirm both coil pairs and the physical housing order with an ohmmeter before connection. Never insert or remove J11 with power applied.
KiCad 10.0.5 loads both pages, exports the netlist/PDF, and reports no new ERC violations from the UNIT1 motor/power sheet. The full hierarchy reports the same 135 items as the untouched Raspberry Pi reference: three reference-design ERC errors, 130 warnings for unavailable Raspberry Pi private library names (the symbols are embedded), and two off-grid warnings. The three inherited errors are two power-drive declarations and duplicate LDO output pins; none is introduced by the UNIT1 circuitry.
The exported netlist was also asserted for all nine MCU/DRV control nets, all
four motor outputs, VM_RAW, Q1_GATE, and +5V_SYS. Root and child sheets have
no reference-designator collisions.
The full R1-LAYOUT PCB DRC checkpoint has zero shorts, zero track crossings,
and zero clearance violations. It reports 17 unconnected items: one inherited
GPIO0 disconnect in the imported reference board and 16 deliberate UNIT1
ratsnest items covering the nine MCU/driver control paths, their boot-state
pull branches, and VCP/C40. The remaining non-connectivity DRC entries are
library/silkscreen cleanup, dangling ends created by those open routes, four
starved thermals, and one C44/L20 courtyard overlap. This is a clean routing
checkpoint, not an order-ready DRC result.
Schematic-parity mode at the preceding checkpoint reported 50 footprint identifier/value/field mismatches introduced by the physical-board import/generator. The generator now preserves library-qualified footprint IDs; the remaining field and mounting-hole parity items still require regeneration and review before release.
The back silkscreen identity is text-only and must read, exactly:
UNIT1 by The Laboratory of Cell Geometry
University of California, San Francisco
Designed & Manufactured in CaliforniaTo regenerate the sheets:
python3 -m venv .venv-hardware
.venv-hardware/bin/pip install -r tools/requirements.txt
.venv-hardware/bin/python tools/generate_schematic.py \
--symbol-dir /path/to/KiCad/10.0/symbols
kicad-cli sch erc --format json --severity-all \
--output UNIT1_R1_ERC.json UNIT1_R1.kicad_sch
kicad-cli sch export pdf --output UNIT1_R1_schematic.pdf UNIT1_R1.kicad_sch
.venv-hardware/bin/python tools/check_netlist.py --kicad-cli /path/to/kicad-cli
kicad-cli sch export netlist --format kicadxml \
--output /tmp/UNIT1_R1.xml UNIT1_R1.kicad_sch
/path/to/kicad-python tools/build_pcb.py \
--netlist /tmp/UNIT1_R1.xml --footprint-root /path/to/KiCad/footprints
kicad-cli pcb drc --refill-zones --save-board --format json \
--output UNIT1_R1_DRC.json UNIT1_R1.kicad_pcb
python3 tools/check_release.pycheck_release.py is expected to fail at the current R1-LAYOUT checkpoint. It
must not be bypassed to order a mission board; manual gates and qualification
evidence are tracked in UNIT1_R1_QA.md.
The rest of schematic capture and placement can continue now. These items must be resolved before ordering boards:
RP2350A Minimal KiCAD, R4/S1, 2026-07-03.| Qty | Value | Footprint | References |
|---|---|---|---|
| 11 | 100n | RPI_COMPILED:generic_capc1005x50 | C2, C8, C10, C11, C12, C13, C14, C15, C16, C17, C18 |
| 6 | 10k | R_0603_1608Metric | R30, R31, R32, R33, R34, R35 |
| 4 | M3 | MountingHole_3.2mm_M3 | MH1, MH2, MH3, MH4 |
| 3 | 10u | RPI_COMPILED:generic_capc2012x125 | C1, C5, C19 |
| 3 | 1k | RPI_COMPILED:generic_resc1005x35 | R2, R4, R6 |
| 2 | 0 | RPI_COMPILED:generic_resc1005x35 | R9, R10 |
| 2 | 100n | C_0603_1608Metric | C31, C43 |
| 2 | 100n 50V | C_0805_2012Metric | C21, C41 |
| 2 | 10n 50V | C_0805_2012Metric | C44, C45 |
| 2 | 15p | RPI_COMPILED:generic_capc1005x50 | C3, C4 |
| 2 | 22u 10V | C_1206_3216Metric | C32, C33 |
| 2 | 27 | RPI_COMPILED:generic_resc1005x35 | R7, R8 |
| 2 | 4.7u | RPI_COMPILED:generic_capc1005x50_wide | C6, C7 |
| 2 | 434133025816 | RPI_COMPILED:wurthelek_434133025816 | SW1, SW2 |
| 1 | 100k | R_0603_1608Metric | R20 |
| 1 | 100u 35V | CP_Radial_D8.0mm_P3.50mm | C46 |
| 1 | 10103594-0001LF | RPI_COMPILED:amphenol_10103594-0001lf | J1 |
| 1 | 10k | RPI_COMPILED:generic_resc1005x35 | R1 |
| 1 | 10u 35V | C_1206_3216Metric | C30 |
| 1 | 12 V VGS CLAMP | D_SOD-123 | D10 |
| 1 | 12MHz | RPI_COMPILED:generic_xtalcc320x250x80-4 | X1 |
| 1 | 1u 10V | C_0603_1608Metric | C42 |
| 1 | 1u 16V | C_0805_2012Metric | C40 |
| 1 | 2.5 A TIME-LAG | Fuse_1206_3216Metric_Pad1.42x1.75mm_HandSolder | F10 |
| 1 | 3.3u | RPI_COMPILED:abracon_aota-b201610s3r3-101-t | L1 |
| 1 | 33 | RPI_COMPILED:generic_resc1005x35 | R3 |
| 1 | 4.7u | RPI_COMPILED:generic_capc1005x50 | C9 |
| 1 | 4.7u >=2.7A | L_6.3x6.3_H3 | L20 |
| 1 | 470u 35V | CP_Radial_D10.0mm_P5.00mm | C20 |
| 1 | AP63205WU-7 | TSOT-23-6 | U10 |
| 1 | DRV8461SPWPR | HTSSOP-28-1EP_4.4x9.7mm_P0.65mm_EP2.75x6.2mm_ThermalVias | U11 |
| 1 | IRF4905S | TO-263-3_TabPin2 | Q10 |
| 1 | MOTOR — MALE DUPONT | PinHeader_1x04_P2.54mm_Horizontal | J11 |
| 1 | NCP1117ST33T3G | RPI_COMPILED:onsemi_ncp1117st33t3g | U2 |
| 1 | RP2350A | RPI_COMPILED:rpi_rp2350a_vias | U1 |
| 1 | SM03B-SRSS-TB(LF)(SN) | RPI_COMPILED:jst_sm03b-srss-tb-lf--sn- | J4 |
| 1 | SMBJ18CA | D_SMB | D11 |
| 1 | SS14 BUCK OR | D_SMA | D21 |
| 1 | SS14 USB OR | D_SMA | D20 |
| 1 | W25Q128JVSIQ | RPI_COMPILED:generic_soic127p790x195-8 | U3 |
| 1 | WURTH 694103107102 — VERIFY FIT | BarrelJack_Wuerth_694103107102_1.35x3.9mm | J10 |
It measures 97 × 55 mm and has 4 copper layers, 1.6 mm thick.
72 parts, built around the RP2350A, W25Q128JVSIQ, 10103594-0001LF and IRF4905S. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the svdrecbd/NEMESIS repository on GitHub, at the commit this page was made from: the board is firmware/unit1/UNIT1_firmware/hardware/kicad/UNIT1_R1/UNIT1_R1.kicad_pcb and its schematic firmware/unit1/UNIT1_firmware/hardware/kicad/UNIT1_R1/UNIT1_MOTOR_POWER.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Its repository publishes it under the Apache-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

Vandewaetere/gitea-kicad-viewer
View KiCad projects in Gitea: interactive schematic, PCB, 3D and BOM right in the file view. No external requests, works for private repos.

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