RP2350A

Q: Is there a KiCad symbol and footprint for the RP2350A?

Yes. The symbol is MCU_RaspberryPi:RP2350A and the footprint Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.4x3.4mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

Q: What package is the RP2350A?

QFN-60-EP(7x7), with 61 pins. Its footprint is drawn on this page.

Q: Where is the RP2350A datasheet?

Raspberry Pi publishes it: the Datasheet link on this page opens it.

Q: Where can I order the RP2350A?

JLCPCB lists it as part C42411118, with 3,460 in stock; the sellers' links on this page open their listings.

Q: What can replace the RP2350A?

Parts like it in the library: the RP2354A by Raspberry Pi. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Q: Which open-source boards use the RP2350A?

115 boards in 91 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Raspberry Pi

Power-on reset (POR)、Undervoltage detection (BOR/LVD/LVR/LVI)、Watchdog reset、Integrated LDO、True random number generator (TRNG)、Hardware ECC check QFN-60-EP(7x7) Microcontrollers (MCU/MPU/SOC) ROHS

Extended

Datasheetraspberry-pi/RP2350A

Category: Microcontrollers (MCU, MPU, SOC)
Package: QFN-60-EP(7x7)
Pins: 61

Overview

The RP2350A is a microcontroller made by Raspberry Pi in a QFN-60-EP(7x7) package with 61 pins. Power-on reset (POR)、Undervoltage detection (BOR/LVD/LVR/LVI)、Watchdog reset、Integrated LDO、True random number generator (TRNG)、Hardware ECC check QFN-60-EP(7x7) Microcontrollers (MCU/MPU/SOC) ROHS.

PCBKit's library has its KiCad symbol (MCU_RaspberryPi:RP2350A, from KiCad's library) and its footprint (Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.4x3.4mm, from KiCad's library), ready for a KiCad board. 3,460 are in stock at JLCPCB (part C42411118). 115 open-source boards in 91 repositories on GitHub use it.

Symbol

MCU_RaspberryPi:RP2350AFrom KiCad's library

Footprint

Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.4x3.4mmFrom KiCad's library

From the datasheet

Supply, least: 1.62 V · IOVDD, recommended operating min · p. 1337
Supply, most: 3.63 V · IOVDD, recommended operating max · p. 1337
Supply, least: 1.05 V · DVDD, recommended operating min · p. 1337
Supply, most: 1.16 V · DVDD, recommended operating max · p. 1337
Supply, least: 2.7 V · VREG_VIN, recommended operating min · p. 1337
Supply, most: 5.5 V · VREG_VIN, recommended operating max · p. 1337
Supply, least: 3.135 V · VREG_AVDD, recommended operating min · p. 1337
Takes working: 11.78 mA · sum of six external supplies, typical CoreMark single core at 150 MHz, 3.3 V, room temperature · p. 1341
Takes asleep: 57 µA · sum of six external supplies, typical P1.7, 3.3 V, room temperature · p. 1341
Junction to air (QFN-60): 40.54 K/W · junction to ambient, still air · p. 1322
Junction to air (QFN-60): 31.99 K/W · junction to ambient, 1 m/s forced air · p. 1322
Junction to air (QFN-60): 30.26 K/W · junction to ambient, 2 m/s forced air · p. 1322
Junction to board (QFN-60): 12.59 K/W · junction to board · p. 1322
Junction to case (QFN-60): 14.31 K/W · junction to case · p. 1322

What it is and has

Processors: Dual Cortex-M33 or Hazard3, 150 MHz · p. 13
SRAM: 520 kB, 10 independent banks · p. 13
OTP: 8 kB · p. 13
External memory interface: Up to 16 MB QSPI flash/PSRAM · p. 13
Additional external memory: 16 MB flash/PSRAM via optional second chip-select · p. 13
Core voltage regulator: On-chip switched-mode power supply · p. 13
Low power regulator mode: Low-quiescent-current LDO for sleep states · p. 13
PLL: 2 · p. 13
Boot security: Optional ROM-enforced boot signing, key fingerprint in OTP · p. 13
Boot decryption key storage: Protected OTP · p. 13
Bus security: Arm or RISC-V security/privilege filtering · p. 13
Security domains: Peripherals, GPIOs and DMA channels individually assignable · p. 13
Fault injection protection: Hardware mitigations · p. 13
SHA-256: Hardware accelerator · p. 13
UART: 2 · p. 13
SPI: 2 controllers · p. 13
I2C: 2 controllers · p. 13
PWM: 24 channels · p. 13
USB: USB 1.1 controller and PHY, host and device · p. 13
PIO: 12 state machines · p. 13
HSTX: 1 · p. 13
GPIO: 30 · p. 13
Analogue inputs: 4 · p. 13
Internal flash: None · p. 13
Package: QFN-60 · p. 13

Around it

res 27Ω: between USB_DP and USB D+; Series resistor required for USB operation. · p. 1329
crystal 12MHz: between XIN and XOUT; Crystal oscillator connection; alternatively drive XIN with a square wave and leave XOUT floating. · p. 1329

Specifications

237

Parameter	Conditions	As printed	Page
θJA (°C/W) - Still Air θJA	RP2350A, QFN-60, still air	typ 40.542 °C/W	1322
θJA (°C/W) - 1m/s Forced Air θJA	RP2350A, QFN-60, 1m/s forced air	typ 31.99 °C/W	1322
θJA (°C/W) - 2m/s Forced Air θJA	RP2350A, QFN-60, 2m/s forced air	typ 30.264 °C/W	1322
θJB (°C/W) θJB	RP2350A, QFN-60	typ 12.588 °C/W	1322
θJC (°C/W) θJC	RP2350A, QFN-60	typ 14.315 °C/W	1322
Core Supply (DVDD) Voltage DVDD		min -0.5 · max 1.21 V	1332
I/O Supply (IOVDD) & QSPI Supply (QSPI_IOVDD) Voltage IOVDD		min -0.5 · max 3.63 V	1332
Voltage at IO (Standard) VPIN		min -0.5 V	1332
Voltage at IO (FT) VPIN_FT	IOVDD=3.3V; IOVDD must be present	min -0.5 · max 5.5 V	1333
Voltage at IO (FT) VPIN_FT	IOVDD=2.5V	min -0.5 · max 4.2 V	1333
Voltage at IO (FT) VPIN_FT	IOVDD=1.8V	min -0.5 · max 3.63 V	1333
Voltage at IO (FT) VPIN_FT	IOVDD=0V	min -0.5 · max 3.63 V	1333
Human Body Model HBM	JEDEC JS-001-2012	max 2 kV	1333
Human Body Model Digital (FT) pins only HBM	Digital (FT) pins only; JEDEC JS-001-2012	max 4 kV	1333
Charged Device Model CDM	JESD22-C101E	max 500 V	1333
Case Temperature TC		min -40 · max 85 °C	1333
Pin Input Leakage Current IIN		max 1 uA	1333
Input Voltage High (Standard IO) VIH	IOVDD=2.5V	min 1.7 V	1333
Input Voltage High (Standard IO) VIH	IOVDD=3.3V	min 2 V	1333
Input Voltage High (FT) VIH	IOVDD=1.8V; IOVDD must be powered to tolerate inputs above 3.63V	max 3.63 V	1333
Input Voltage High (FT) VIH	IOVDD=3.3V; IOVDD must be powered to tolerate inputs above 3.63V	min 2 · max 5.5 V	1333
Input Voltage Low VIL	IOVDD=1.8V	min -0.3 V	1333
Input Voltage Low VIL	IOVDD=2.5V	min -0.3 · max 0.7 V	1333
Input Voltage Low VIL	IOVDD=3.3V	min -0.3 · max 0.8 V	1333
Input Hysteresis Voltage VHYS	IOVDD=2.5V; Schmitt Trigger enabled	min 0.2 V	1334
Input Hysteresis Voltage VHYS	IOVDD=3.3V; Schmitt Trigger enabled	min 0.2 V	1334
Output Voltage High VOH	IOVDD=1.8V; IOH = 2, 4, 8 or 12mA depending on setting	min 1.24 V	1334
Output Voltage High VOH	IOVDD=2.5V; IOH = 2, 4, 8 or 12mA depending on setting	min 1.78 V	1334
Output Voltage High VOH	IOVDD=3.3V; IOH = 2, 4, 8 or 12mA depending on setting	min 2.62 V	1334
Output Voltage Low VOL	IOVDD=1.8V; IOL = 2, 4, 8 or 12mA depending on setting	min 0 · max 0.3 V	1334
Output Voltage Low VOL	IOVDD=2.5V; IOL = 2, 4, 8 or 12mA depending on setting	min 0 · max 0.4 V	1334
Output Voltage Low VOL	IOVDD=3.3V; IOL = 2, 4, 8 or 12mA depending on setting	min 0 · max 0.5 V	1334
Pull-Up Resistance RPU	IOVDD=1.8V	min 32 · max 106 kΩ	1334
Pull-Up Resistance RPU	IOVDD=2.5V	min 42 · max 123 kΩ	1334
Pull-Up Resistance RPU	IOVDD=3.3V	min 32 · max 86 kΩ	1334
Pull-Down Resistance RPD	IOVDD=1.8V	min 35 · max 189 kΩ	1334
Pull-Down Resistance RPD	IOVDD=2.5V	min 49 · max 180 kΩ	1334
Pull-Down Resistance RPD	IOVDD=3.3V	min 36 · max 113 kΩ	1334
Maximum Total IOVDD current IIOVDD_MAX	Sum of all current being sourced by GPIO pins	max 100 mA	1334
Maximum Total QSPI_IOVDD current IQSPI_IOVDD_MAX	Sum of all current being sourced by QSPI pins	max 20 mA	1334
Maximum Total VSS current due to GPIO (IOVSS) IIOVSS_MAX	Sum of all current being sunk into GPIO pins	max 100 mA	1334
Maximum Total VSS current due to QSPI (QSPI_IOVSS) IQSPI_IOVSS_MAX	Sum of all current being sunk into QSPI pins	max 20 mA	1334
Pin Input Leakage Current IIN		max 1 uA	1334
Single Ended Input Voltage High VIHSE		min 2 V	1334
Single Ended Input Voltage Low VILSE		max 0.8 V	1334
Differential Input Voltage High VIHDIFF		min 0.2 V	1334
Differential Input Voltage Low VILDIFF		max -0.2 V	1335
Output Voltage High VOH		min 2.8 V	1335
Output Voltage Low VOL		min 0 · max 0.3 V	1335
Pull-Up Resistance - RPU2 RPU2		min 0.873 · max 1.548 kΩ	1335
Pull-Up Resistance - RPU1&2 RPU1&2		min 1.398 · max 3.063 kΩ	1335
Pull-Down Resistance RPD		min 14.25 · max 15.75 kΩ	1335
ADC Input Voltage Range VPIN_ADC		min 0 V	1335
Effective Number of Bits ENOB		min 9 · typ 9.5 bits	1335
Resolved Bits		max 12 bits	1335
ADC Input Impedance RIN_ADC		min 100 kΩ	1335
Input Frequency fosc	Restrictions from PLLs and USB/UART bootloaders apply	min 1 · typ 12 · max 50 MHz	1335
Input Voltage Low VIL	Square Wave input. XIN only. XOUT floating	min 0 V	1335
SWCLK Input Frequency fSWCLK		min 0 · typ 10 · max 50 MHz	1336
IOVDD IOVDD	Digital IO; adjust GPIO VOLTAGE_SELECT if IOVDD <2.5V	min 1.62 · max 3.63 V	1337
QSPI_IOVDD (RP2350 only) QSPI_IOVDD	RP2350A; Digital IO; adjust GPIO VOLTAGE_SELECT if IOVDD <2.5V	min 1.62 · max 3.63 V	1337
DVDD DVDD	Digital core; short term transients within +/-100mV	min 1.05 · typ 1.1 · max 1.16 V	1337
VREG_VIN VREG_VIN	Voltage regulator	min 2.7 · typ 3.3 · max 5.5 V	1337
VREG_AVDD VREG_AVDD	Voltage regulator	min 3.135 · typ 3.3 · max 3.63 V	1337
USB_OTP_VDD USB_OTP_VDD	USB PHY & OTP	min 3.135 · typ 3.3 · max 3.63 V	1338
ADC_AVDD ADC_AVDD	ADC; performance compromised below 2.97V	min 1.62 · typ 3.3 · max 3.63 V	1338
VOUT (normal mode) VOUT	regulated output voltage range (normal mode)	min 0.55 · typ 1.1 · max 3.3 V	1338
VOUT (low power mode) VOUT	regulated output voltage range (low power mode)	min 0.55 · typ 1.1 · max 1.3 V	1338
ΔVOUT (normal mode) ΔVOUT	voltage deviation from programmed value (normal mode)	min -3 · max 3 % of selected output voltage	1338
ΔVOUT (low power mode) ΔVOUT	voltage deviation from programmed value (low power mode)	min -9 · max 9 % of selected output voltage	1338
IMAX (normal mode) IMAX	output current (normal mode)	max 200 mA	1338
IMAX (low power mode) IMAX	output current (low power mode)	max 1 mA	1338
ILIMIT (normal mode startup) ILIMIT	current limit (normal mode startup)	typ 240 · max 300 mA	1338
ILIMIT (normal mode) ILIMIT	current limit (normal mode)	min 260 · typ 500 · max 800 mA	1338
ILIMIT (low power mode) ILIMIT	current limit (low power mode)	min 5 · max 25 mA	1338
VOUT_OKTH.ASSERT VOUT_OKTH.ASSERT	VOUT_OK assertion threshold	min 87 · typ 90 · max 93 % of selected output voltage	1338
VOUT_OKTH.DEASSERT VOUT_OKTH.DEASSERT	VOUT_OK de-assertion threshold	min 84 · typ 87 · max 90 % of selected output voltage	1339
fsw fsw	switching frequency	typ 3 MHz	1339
Efficiency (VOUT=1.1V)	Iload=10mA, VREG_VIN=2.7V	typ 74 %	1339
Efficiency (VOUT=1.1V)	Iload=10mA, VREG_VIN=3.3V	typ 70 %	1339
Efficiency (VOUT=1.1V)	Iload=10mA, VREG_VIN=5.5V	typ 59 %	1339
Efficiency (VOUT=1.1V)	Iload=100mA, VREG_VIN=2.7V	typ 70 %	1339
Efficiency (VOUT=1.1V)	Iload=100mA, VREG_VIN=3.3V	typ 72 %	1339
Efficiency (VOUT=1.1V)	Iload=100mA, VREG_VIN=5.5V	typ 72 %	1339
Efficiency (VOUT=1.1V)	Iload=200mA, VREG_VIN=2.7V	typ 70 %	1339
Efficiency (VOUT=1.1V)	Iload=200mA, VREG_VIN=3.3V	typ 59 %	1339
Efficiency (VOUT=1.1V)	Iload=200mA, VREG_VIN=5.5V	typ 63 %	1339
DMA	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 2.6 uA/MHz	1340
I2C0	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 3 uA/MHz	1340
I2C1	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 3.6 uA/MHz	1340
IO + Pads	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 24.5 uA/MHz	1340
PWM	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 9.9 uA/MHz	1340
SIO	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 2 uA/MHz	1340
SHA256	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 0.1 uA/MHz	1340
SPI0	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 1.7 uA/MHz	1340
SPI1	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 1.4 uA/MHz	1340
Timer 0	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 0.8 uA/MHz	1340
Timer 1	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 0.6 uA/MHz	1340
TRNG	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 0.8 uA/MHz	1340
UART0	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 2.6 uA/MHz	1340
UART1	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 3.6 uA/MHz	1340
Watchdog	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 1.1 uA/MHz	1340
XIP	Increase in DVDD current when peripheral clocks are enabled; default clocks	typ 37.6 uA/MHz	1340
ADC	Absolute DVDD current consumption; standard clocks	typ 0.14 mA	1340
USBCTRL	Absolute DVDD current consumption; standard clocks	typ 1.25 mA	1340
VREG_VIN	P1.0; 3.3V supplies, room temperature	typ 128 uA	1341
VREG_AVDD	P1.0; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.0; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.0; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.0; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.0; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.0; 3.3V supplies, room temperature	typ 548 uW	1341
VREG_VIN	P1.1; 3.3V supplies, room temperature	typ 77 uA	1341
VREG_AVDD	P1.1; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.1; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.1; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.1; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.1; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.1; 3.3V supplies, room temperature	typ 380 uW	1341
VREG_VIN	P1.2; 3.3V supplies, room temperature	typ 79 uA	1341
VREG_AVDD	P1.2; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.2; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.2; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.2; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.2; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.2; 3.3V supplies, room temperature	typ 380 uW	1341
VREG_VIN	P1.3; 3.3V supplies, room temperature	typ 26 uA	1341
VREG_AVDD	P1.3; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.3; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.3; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.3; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.3; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.3; 3.3V supplies, room temperature	typ 204 uW	1341
VREG_VIN	P1.4; 3.3V supplies, room temperature	typ 120 uA	1341
VREG_AVDD	P1.4; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.4; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.4; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.4; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.4; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.4; 3.3V supplies, room temperature	typ 520 uW	1341
VREG_VIN	P1.5; 3.3V supplies, room temperature	typ 67 uA	1341
VREG_AVDD	P1.5; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.5; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.5; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.5; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.5; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.5; 3.3V supplies, room temperature	typ 345 uW	1341
VREG_VIN	P1.6; 3.3V supplies, room temperature	typ 68 uA	1341
VREG_AVDD	P1.6; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.6; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.6; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.6; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.6; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.6; 3.3V supplies, room temperature	typ 350 uW	1341
VREG_VIN	P1.7; 3.3V supplies, room temperature	typ 19 uA	1341
VREG_AVDD	P1.7; 3.3V supplies, room temperature	typ 0.5 uA	1341
IOVDD	P1.7; 3.3V supplies, room temperature	typ 11 uA	1341
QSPI_IOVDD	P1.7; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	P1.7; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	P1.7; 3.3V supplies, room temperature	typ 3.5 uA	1341
Total Power	P1.7; 3.3V supplies, room temperature	typ 188 uW	1341
VREG_VIN	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 40 uA	1341
VREG_AVDD	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 187 uA	1341
IOVDD	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 69 uA	1341
QSPI_IOVDD	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 22 uA	1341
ADC_IOVDD	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 1 uA	1341
USB_OTP_VDD	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 35 uA	1341
Total Power	RUN=low; 3.3V supplies, room temperature; regulator in normal switching mode	typ 1170 uW	1341
VREG_VIN	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 6530 uA	1341
VREG_AVDD	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 220 uA	1341
IOVDD	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 437 uA	1341
QSPI_IOVDD	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 375 uA	1341
Total Power	USB Boot mode, Bus Idle (average); 3.3V supplies, room temperature	typ 25 mW	1341
USB_OTP_VDD	USB Boot mode, During Boot (peak); 3.3V supplies, room temperature	typ 6050 uA	1341
USB_OTP_VDD	USB Boot mode, During UF2 write (average); 3.3V supplies, room temperature	typ 1280 uA	1341
VREG_VIN	hello_serial; 3.3V supplies, room temperature	typ 14690 uA	1341
VREG_AVDD	hello_serial; 3.3V supplies, room temperature	typ 216 uA	1341
IOVDD	hello_serial; 3.3V supplies, room temperature	typ 506 uA	1341
QSPI_IOVDD	hello_serial; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	hello_serial; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	hello_serial; 3.3V supplies, room temperature	typ 62 uA	1341
Total Power	hello_serial; 3.3V supplies, room temperature	typ 51.1 mW	1341
VREG_VIN	hello_usb; 3.3V supplies, room temperature	typ 14700 uA	1341
VREG_AVDD	hello_usb; 3.3V supplies, room temperature	typ 216 uA	1341
IOVDD	hello_usb; 3.3V supplies, room temperature	typ 453 uA	1341
QSPI_IOVDD	hello_usb; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	hello_usb; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	hello_usb; 3.3V supplies, room temperature	typ 570 uA	1341
Total Power	hello_usb; 3.3V supplies, room temperature	typ 52.7 mW	1341
VREG_VIN	hello_adc; 3.3V supplies, room temperature	typ 14680 uA	1341
VREG_AVDD	hello_adc; 3.3V supplies, room temperature	typ 216 uA	1341
IOVDD	hello_adc; 3.3V supplies, room temperature	typ 506 uA	1341
QSPI_IOVDD	hello_adc; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	hello_adc; 3.3V supplies, room temperature	typ 142 uA	1341
USB_OTP_VDD	hello_adc; 3.3V supplies, room temperature	typ 62 uA	1341
Total Power	hello_adc; 3.3V supplies, room temperature	typ 51.6 mW	1341
VREG_VIN	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 11000 uA	1341
VREG_AVDD	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 212 uA	1341
IOVDD	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 455 uA	1341
QSPI_IOVDD	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 22 uA	1341
ADC_IOVDD	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 1 uA	1341
USB_OTP_VDD	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 90 uA	1341
Total Power	CoreMark benchmark, Single core @150MHz; 3.3V supplies, room temperature	typ 38.7 mW	1341
Voltage at IO (Standard) VPIN	Maximum: IOVDD + 0.5 V	min -0.5 V	1332
Human Body Model HBM	All pins unless otherwise stated	max 2 kV	1333
Human Body Model Digital (FT) pins only HBM	Digital (FT) pins only	max 4 kV	1333
Charged Device Model CDM		max 500 V	1333
Input Voltage High (Standard IO) VIH	IOVDD=2.5V; maximum IOVDD + 0.3	min 1.7 V	1333
Input Voltage High (Standard IO) VIH	IOVDD=3.3V; maximum IOVDD + 0.3	min 2 V	1333
Input Voltage High (FT) VIH	IOVDD=1.8V; minimum 0.65 * IOVDD	max 3.63 V	1333
Input Voltage High (FT) VIH	IOVDD=2.5V; IOVDD must be powered to tolerate input voltages above 3.63V	min 1.7 · max 4.2 V	1333
Input Voltage High (FT) VIH	IOVDD=3.3V; IOVDD must be powered to tolerate input voltages above 3.63V	min 2 · max 5.5 V	1333
Input Voltage Low VIL	IOVDD=1.8V; maximum 0.35 * IOVDD	min -0.3 V	1333
Output Voltage High VOH	IOVDD=1.8V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD	min 1.24 V	1334
Output Voltage High VOH	IOVDD=2.5V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD	min 1.78 V	1334
Output Voltage High VOH	IOVDD=3.3V; IOH = 2, 4, 8 or 12mA depending on setting; maximum IOVDD	min 2.62 V	1334
ADC_AVDD ADC_AVDD	ADC; ADC performance will be compromised at voltages below 2.97V	min 1.62 · typ 3.3 · max 3.63 V	1338
DMA	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 2.6 uA/MHz	1340
I2C0	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 3 uA/MHz	1340
I2C1	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 3.6 uA/MHz	1340
IO + Pads	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 24.5 uA/MHz	1340
PWM	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 9.9 uA/MHz	1340
SIO	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 2 uA/MHz	1340
SHA256	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 0.1 uA/MHz	1340
SPI0	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 1.7 uA/MHz	1340
SPI1	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 1.4 uA/MHz	1340
Timer 0	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 0.8 uA/MHz	1340
Timer 1	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 0.6 uA/MHz	1340
TRNG	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 0.8 uA/MHz	1340
UART0	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 2.6 uA/MHz	1340
UART1	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 3.6 uA/MHz	1340
Watchdog	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 1.1 uA/MHz	1340
XIP	Increase in DVDD current when peripheral clocks are enabled; default clock settings	typ 37.6 uA/MHz	1340
ADC	Absolute DVDD current consumption at standard clock settings	typ 0.14 mA	1340
USBCTRL	Absolute DVDD current consumption at standard clock settings	typ 1.25 mA	1340

Pins, by the datasheet

1 IOVDD: Digital IO supply. · p. 15
2 GPIO0: Fault tolerant user IO; pull-down at reset. · p. 1329
3 GPIO1: Fault tolerant user IO; pull-down at reset. · p. 1329
4 GPIO2: Fault tolerant user IO; pull-down at reset. · p. 1329
5 GPIO3: Fault tolerant user IO; pull-down at reset. · p. 1329
6 DVDD: Core supply. · p. 1332
7 GPIO4: Fault tolerant user IO; pull-down at reset. · p. 1329
8 GPIO5: Fault tolerant user IO; pull-down at reset. · p. 1329
9 GPIO6: Fault tolerant user IO; pull-down at reset. · p. 1329
10 GPIO7: Fault tolerant user IO; pull-down at reset. · p. 1329
11 IOVDD: IO supply. · p. 1332
12 GPIO8: Fault tolerant user IO; pull-down at reset. · p. 1329
13 GPIO9: Fault tolerant user IO; pull-down at reset. · p. 1329
14 GPIO10: Fault tolerant user IO; pull-down at reset. · p. 1329
15 GPIO11: Fault tolerant user IO; pull-down at reset. · p. 1329
16 GPIO12: Fault tolerant user IO; pull-down at reset. · p. 1329
17 GPIO13: Fault tolerant user IO; pull-down at reset. · p. 1329
18 GPIO14: Fault tolerant user IO; pull-down at reset. · p. 1329
19 GPIO15: Fault tolerant user IO; pull-down at reset. · p. 1329
20 IOVDD: IO supply. · p. 1332
21 XIN: Crystal oscillator; may alternatively be driven by a square wave. · p. 1331
22 XOUT: Crystal oscillator. · p. 1331
23 DVDD: Core supply. · p. 1332
24 SWCLK: Fault tolerant Serial Wire Debug clock; pull-up at reset. · p. 1331
25 SWDIO: Fault tolerant Serial Wire Debug data; pull-up at reset. · p. 1331
26 RUN: Fault tolerant chip enable / reset_n; pull-up at reset. · p. 1331
27 GPIO16: Fault tolerant user IO; pull-down at reset. · p. 1330
28 GPIO17: Fault tolerant user IO; pull-down at reset. · p. 1330
29 GPIO18: Fault tolerant user IO; pull-down at reset. · p. 1330
30 IOVDD: IO supply. · p. 1332
31 GPIO19: Fault tolerant user IO; pull-down at reset. · p. 1330
32 GPIO20: Fault tolerant user IO; pull-down at reset. · p. 1330
33 GPIO21: Fault tolerant user IO; pull-down at reset. · p. 1330
34 GPIO22: Fault tolerant user IO; pull-down at reset. · p. 1330
35 GPIO23: Fault tolerant user IO; pull-down at reset. · p. 1330
36 GPIO24: Fault tolerant user IO; pull-down at reset. · p. 1330
37 GPIO25: Fault tolerant user IO; pull-down at reset. · p. 1330
38 IOVDD: IO supply. · p. 1332
39 DVDD: Core supply. · p. 1332
40 GPIO26_ADC0: User IO or ADC input; pull-down at reset. · p. 1330
41 GPIO27_ADC1: User IO or ADC input; pull-down at reset. · p. 1330
42 GPIO28_ADC2: User IO or ADC input; pull-down at reset. · p. 1330
43 GPIO29_ADC3: User IO or ADC input; pull-down at reset. · p. 1330
44 ADC_AVDD: ADC supply. · p. 1332
45 IOVDD: IO supply. · p. 1332
46 VREG_AVDD: Voltage regulator analogue supply. · p. 1332
47 VREG_PGND: Voltage regulator ground. · p. 1332
48 VREG_LX: Voltage regulator switching output; connect to inductor. · p. 1332
49 VREG_VIN: Voltage regulator input supply. · p. 1332
50 VREG_FB: Voltage regulator feedback input. · p. 1332
51 USB_DM: USB Data -ve; requires a 27Ω series resistor for USB operation. · p. 1332
52 USB_DP: USB Data +ve; requires a 27Ω series resistor for USB operation. · p. 1331
53 USB_OTP_VDD: USB & OTP supply. · p. 1332
54 QSPI_IOVDD: QSPI IO supply. · p. 1332
55 QSPI_SD3: QSPI data; pull-up at reset. · p. 1331
56 QSPI_SCLK: QSPI clock; pull-down at reset. · p. 1331
57 QSPI_SD0: QSPI data; pull-down at reset. · p. 1331
58 QSPI_SD2: QSPI data; pull-up at reset. · p. 1331
59 QSPI_SD1: QSPI data; pull-down at reset. · p. 1331
60 QSPI_SS: QSPI chip select / USB BOOTSEL; pull-up at reset. · p. 1331
EP GND: Ground connection via central exposed pad. · p. 1332
- GND: Ground connection via central exposed pad. · p. 1332

Ordering codes, by the datasheet

RP2350A: QFN-60 · No internal flash; 30 GPIO; 4 analogue inputs. · p. 13
RP2350B: QFN-80 · No internal flash; 48 GPIO; 8 analogue inputs. · p. 13
RP2354A: QFN-60 · 2 MB internal flash; 30 GPIO; 4 analogue inputs. · p. 13
RP2354B: QFN-80 · 2 MB internal flash; 48 GPIO; 8 analogue inputs. · p. 13

Parameters

CPU Core: ARM Cortex-M33
CPU Maximum Speed: 150MHz
Core Size: 32 Bit
Current - Supply: 11.78mA
Features: Undervoltage detection (BOR/LVD/LVR/LVI)
RAM Size: 520KB
Standby Current: 57uA
Thermal Resistance(Junction to Ambient): 40.54℃/W
Thermal Resistance(Junction to Board): 12.59℃/W
Thermal Resistance(Junction to Case): 14.31℃/W
Voltage - Supply: 1.05V~5.5V

Order codes

RP2350ALCSC C42411118

Pinout

The pins of the RP2350A
Pin	Name	Type
1	IOVDD	Power in
2	GPIO0	Input/output
3	GPIO1	Input/output
4	GPIO2	Input/output
5	GPIO3	Input/output
6	DVDD	Power in
7	GPIO4	Input/output
8	GPIO5	Input/output
9	GPIO6	Input/output
10	GPIO7	Input/output
11	IOVDD	Passive
12	GPIO8	Input/output
13	GPIO9	Input/output
14	GPIO10	Input/output
15	GPIO11	Input/output
16	GPIO12	Input/output
17	GPIO13	Input/output
18	GPIO14	Input/output
19	GPIO15	Input/output
20	IOVDD	Passive
21	XIN	Input
22	XOUT	Output
23	DVDD	Passive
24	SWCLK	Input
25	SWDIO	Input/output
26	RUN	Input
27	GPIO16	Input/output
28	GPIO17	Input/output
29	GPIO18	Input/output
30	IOVDD	Passive
31	GPIO19	Input/output
32	GPIO20	Input/output
33	GPIO21	Input/output
34	GPIO22	Input/output
35	GPIO23	Input/output
36	GPIO24	Input/output
37	GPIO25	Input/output
38	IOVDD	Passive
39	DVDD	Passive
40	GPIO26/ADC0	Input/output
41	GPIO27/ADC1	Input/output
42	GPIO28/ADC2	Input/output
43	GPIO29/ADC3	Input/output
44	ADC_AVDD	Power in
45	IOVDD	Passive
46	VREG_AVDD	Power in
47	VREG_PGND	Power in
48	VREG_LX	Power out
49	VREG_VIN	Power in
50	VREG_FB	Passive
51	USB_DM	Input/output
52	USB_DP	Input/output
53	USB_OTP_VDD	Power in
54	QSPI_IOVDD	Power in
55	QSPI_SD3	Input/output
56	QSPI_SCLK	Output
57	QSPI_SD0	Input/output
58	QSPI_SD2	Input/output
59	QSPI_SD1	Input/output
60	QSPI_SS	Output
61	GND	Power in

Open-source boards using it

All 115

2 layers50 × 70 mm
Lcdtap rp2350
shapoco/lcdtap
A tool for mirroring or capturing I2C/SPI LCD displays
100 parts85
2 layers54 × 85.6 mm
Board43
smartbank-inc/Board43
Board43 is an RP2350A-based microcontroller development board. Flash PicoRuby or your favorite firmware and start hacking.
583 parts30
2 layers96.8 × 91.4 mm
Inkbadge
cheyao/inkbadge
Undercity eink PCB badges controlled by a rp2350
98 parts22
2 layers30.5 × 48.3 mm
Rp2350a testing
74th/rp2040-dev-board
治具には、中心から縦、横それぞれ 0.05 インチ単位で 0.200.50 インチ（1.27mm 単位で 5.08mm から 12.70mm）離れたとこにピンヘッダの固定用の穴が空いています。
46 parts21MIT
4 layers22 × 22 mm
CycloMod
gsteiert/CycloMod
Cyclone 10LP MicroMod Processor Board
72 parts20CC0-1.0
6 layers70 × 70 mm
Rp2350-decoder
mikesmitty/rp24-dcc-decoder
DIY DCC decoder for model railroad locomotives in an E24 form factor, powered by an RP2350 (Raspberry Pi Pico 2)
543 parts12
2 layers21 × 58 mm
PicoAlt
profdc9/PicoAlt2
An alternative Pi Pico 2 (RP2350) type board you can have made yourself.
42 parts11
4 layers40 × 40 mm
Enc encoder
ROAR-QUTRC/perseus-v3
The code base for the QUT Robotics Club ROAR teams rover Perseus starting 2026
87 parts10

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Questions

Is there a KiCad symbol and footprint for the RP2350A?

Yes. The symbol is MCU_RaspberryPi:RP2350A and the footprint Package_DFN_QFN:QFN-60-1EP_7x7mm_P0.4mm_EP3.4x3.4mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the RP2350A?

QFN-60-EP(7x7), with 61 pins. Its footprint is drawn on this page.

Where is the RP2350A datasheet?

Raspberry Pi publishes it: the Datasheet link on this page opens it.

Where can I order the RP2350A?

JLCPCB lists it as part C42411118, with 3,460 in stock; the sellers' links on this page open their listings.

What can replace the RP2350A?

Parts like it in the library: the RP2354A by Raspberry Pi. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the RP2350A?

115 boards in 91 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

RP2354A
QFN-60(7x7)150MHz 32 Bit ARM Cortex-M33 Built-in+External Power-on reset (POR)、Undervoltage detection (BOR/LVD/LVR/LVI)、Watchdog reset、Built-in general-purpose timer、Integrated LDO、Calendar function、True random number generator (TRNG)、Hardware ECC check、Independent watchdog (IWDG) QFN-60(7x7) Microcontrollers (MCU/MPU/SOC) ROHSRaspberry PiMicrocontrollers (MCU/MPU/SOC)