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4 layers69 × 68 mmTsal latching integrated, the printed circuit board in 3D

Tsal latching integrated

sufst/pcb19

Monorepo for all schematics and PCB designs

Size
69 × 68 mm
Copper layers
4
Thickness
1.6 mm
Parts
85
Nets
64
Pads
277
Tracks, vias
429, 62
Pours
14
Routed
Yes
KiCad
KiCad 8.0 (file 20240108)
Created
4 Oct 2022
Updated
6 Aug 2026

Overview

Tsal latching integrated is an open-source printed circuit board by sufst, from the sufst/pcb repository on GitHub, published under the GPL-3.0 licence. It is a 4-layer board of 69 × 68 mm with 85 parts on 64 nets, routed with 429 tracks and 62 vias.

It is built around the XP262N7002TR-G, SIS413DN-TP and BAT54W, with the DMP3056L-7 among its other parts. Its parts include 38 resistors, 13 transistors, 12 capacitors, 8 diodes and 3 ICs.

Main components

4

README

README.md

PCBs

About

Central repository of all schematics and PCB design files.

FolderProjectProject Code
ailAccumulator Indicator Light Logicail
ail-ledAccumulator Indicator Light Ledail-led
batakBatak Game (non-car)batak
break-lightRear Break Lightbreak-light
bspdBrake System Plausibility Devicebspd
can-nodeVoltage Reader and Broadcastercan-node
curr-ampCurrent Sensor Amplifiercurr-amp
dashDashboarddash
dischargeDischarge Relay Breakoutdischarge
hv-senseHigh Voltage Sensehvs
latchingLatch Circuitlatching
loom*Loom Designloom
lvbmsLow Voltage Battery Management Systemlvbms
prechargePrecharge Controllerprecharge
segmentSegmentsegment
telemetryOn-Car Telemetrytelemetry
test-rigPCB Test / Demo Rigtest
top-level*Full Car Schematic
trcTSAC Relay Controllertrc
tsalTractive System Active Lighttsal
vcuVehicle Control Unitvcu

We design our PCBs in KiCad (version 8+).

*Moved to https://github.com/sufst/loom

Version Control for KiCad Projects

Why?

  • Revert individual changes.
  • Document development history via commits and GitHub issues.
  • Easily view previous versions of designs.
  • Manage shared library of components.

Files

Files that should be in this repo, under version control:

  • Project files (.kicad_pro).
  • Schematic files (.kicad_sch).
  • PCB files (.kicad_pcb).
  • Custom footprints (.kicad_mod).
  • Custom symbols (.kicad_sym).
  • Footprint library tables (fp-lib-table).
  • Symbol library tables (sym-lib-table).
  • 3D models of components (.step files).
  • Simulation code (e.g. .asc files from LTSpice).

Files that should never be in here:

  • Exports such as BOMs, gerbers, netlists, renders, etc.
  • Local project settings (.kicad_prl).
  • Project backups (.zip files generated in <project name>-backups, .bak .bck -bak files).
  • Cache files (fp-info-cache).

The .gitignore should prevent the addition of files we don't want to keep in here, but before you commit make sure to do a quick check of what is actually being added.

Shared Resources

The common folder is used for resources which can be shared across multiple projects. This includes:

  • Images (images subdirectory).
  • 3D models (step subdirectory).
  • Custom symbols (sufst-lib.kicad_sym).
  • Custom footprints (sufst-lib.pretty).
  • SUFST standard sheet layout (sheet-layout.kicad_wks).

Note: Since projects were previously in their own individual repos, many designs still have their own libraries, step files, etc. These will gradually be migrated to the SUFST library.

Library Paths

When you configure the library paths for a project (sym-lib-table and fp-lib-table data), make sure to always use a path relative to the project with the ${KIPRJMOD} substitution.

  • Correct: ${KIPRJMOD}/../common/sufst-lib.kicad_sym
  • Incorrect: /Users/<your name>/Documents/sufst/pcb/common/sufst-lib.kicad_sym

If an absolute path is used, when someone else opens the project that path will not exist and the library paths will not be valid. -lib-table files should never contain an absolute path.

Git Limitations

It is not possible to resolve merge conflicts within individual design files, which is an unfortunate limitation of using git with KiCad. While KiCad files are in a text format, they aren't really designed to be edited manually. It is therefore essential that only one person is editing a particular file in a project at a time (including the shared library). Once someone starts working on a file, until it is merged into the main branch nobody else can edit that file. A good way to get round this is to use the "hierarchical sheets" feature to divide schematics into multiple files (if it can be done in a logical way).

Releases

Release Files

When a PCB is fabricated, a new 'release' for the given project should be created and stored within this repo in the releases/<PROJECT NAME> folder. This folder should contain the latest version (and ONLY the latest version) of the following files:

  1. Exported gerbers and drill files in a ZIP archive called fabrication.zip.
  2. Schematic sheets as a PDF (Schematic.pdf).
  3. Layout as a PDF in colour, with border and title block (Layout.pdf).
  4. HTML iBOM created using the "Interactive HTML BOM Plugin" (ibom.html).

Additionally, a file called info (no extension) should be created (if it doesn't already exist) containing release information in the following format:

txt
version: <VERSION NUMBER>
date: <RELEASE DATE>
fabrication: <COMPANY>

Version numbers should be in the format v1.0.1 and dates should be in the format YYYY-MM-DD. For example:

txt
version: v1.0.1
date: 2023-01-23
fabrication: JLCPCB

The release folder for a project should then have the following structure and file names:

txt
<PROJECT NAME>
├── Layout.pdf
├── Schematic.pdf
├── fabrication.zip
├── ibom.html
└── info

When creating a new release, make sure to overwrite/replace all the existing files.

Release Tag

The release commit should then be tagged with the following command:

sh
git tag <PROJECT CODE>-<VERSION_NUMBER>

Tagging should be done after merging to main! Example command:

sh
git tag segment-v1.0.1

To push tags to GitHub:

sh
git push --tags

Parts

85
QtyValueFootprintReferences
2010kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR1, R3, R4, R5, R10, R11, R12, R14, R17, R22, R24, R26, R28, R33, R35, R37 +4
8100nCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolderC1, C2, C3, C4, C6, C7, C10, C11
8XP262N7002TR-GPackage_TO_SOT_SMD:SOT-23Q1, Q2, Q5, Q8, Q9, Q10, Q11, Q13
51kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR32, R39, R40, R41, R42
4M3MountingHole:MountingHole_3.2mm_M3H1, H2, H3, H4
4SiS413DNTPackage_SO:Vishay_PowerPAK_1212-8_SingleQ3, Q4, Q6, Q7
33k3Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR13, R18, R21
3BAT54WPackage_TO_SOT_SMD:SOT-323_SC-70D1, D2, D6
3Conn_02x06Connector_Molex:Molex_Micro-Fit_3.0_43045-1200_2x06_P3.00mm_HorizontalJ1, J2, J3
3LEDLED_SMD:LED_0805_2012Metric_Pad1.15x1.40mm_HandSolderD3, D4, D5
2100Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR27, R29
2100kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR34, R36
210uCapacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolderC8, C9
240106Package_SO:SOIC-14_3.9x8.7mm_P1.27mmU1, U3
2G5Q-1EU DC12SUFST:Relay_TemplateK1, K2
2SS14+Diode_SMD:D_SMAD7, D8
1100uCapacitor_THT:CP_Radial_D5.0mm_P2.00mmC5
1100uCapacitor_THT:CP_Radial_D6.3mm_P2.50mmC12
1150kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR30
1220RResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR20
12k2Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR2
14013Package_SO:SOIC-14_3.9x8.7mm_P1.27mmU2
147Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR38
1470Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR31
1470kPotentiometer_THT:Potentiometer_Bourns_3296W_VerticalRV1
147kResistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolderR16
1DMP3056L-7Package_TO_SOT_SMD:SOT-23Q12
1LOGOSUFST:sufst-textG***

Questions

How big is the Tsal latching integrated PCB?

It measures 69 × 68 mm and has 4 copper layers, 1.6 mm thick.

What parts does the Tsal latching integrated use?

85 parts, built around the XP262N7002TR-G, SIS413DN-TP, BAT54W and DMP3056L-7. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Tsal latching integrated KiCad files?

From the sufst/pcb repository on GitHub, at the commit this page was made from: the board is tsal-latching-integrated/tsal-latching-integrated.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Tsal latching integrated design in my own project?

Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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