

Tsal latching integrated
Monorepo for all schematics and PCB designs
- Size
- 69 × 68 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 85
- Nets
- 64
- Pads
- 277
- Tracks, vias
- 429, 62
- Pours
- 14
- Routed
- Yes
- KiCad
- KiCad 8.0 (file 20240108)
- Created
- 4 Oct 2022
- Updated
- 6 Aug 2026
Overview
Tsal latching integrated is an open-source printed circuit board by sufst, from the sufst/pcb repository on GitHub, published under the GPL-3.0 licence. It is a 4-layer board of 69 × 68 mm with 85 parts on 64 nets, routed with 429 tracks and 62 vias.
It is built around the XP262N7002TR-G, SIS413DN-TP and BAT54W, with the DMP3056L-7 among its other parts. Its parts include 38 resistors, 13 transistors, 12 capacitors, 8 diodes and 3 ICs.
Main components
4XP262N7002TR-G
SOT-23MOSFETsTorex SemiconductorSIS413DN-TP
PDFN-8(3x3)-55℃~+150℃ 1 P-Channel 1.5V 3.448nF 30V 30nC 38W 421pF 508pF 50A 9mΩ@10V PDFN-8(3x3) MOSFETs ROHSTECH PUBLICMOSFETsBAT54W
SOD-123Schottky DiodeshongjiachengDMP3056L-7
SOT-23-55℃~+150℃ 1 P-Channel 1.38W 11.8nC@10V 2.1V 30V 4.3A 70mΩ@4.5V P-Channel SOT-23 MOSFETs ROHSDiodes IncorporatedMOSFETs
README
README.mdPCBs
About
Central repository of all schematics and PCB design files.
| Folder | Project | Project Code |
|---|---|---|
| ail | Accumulator Indicator Light Logic | ail |
| ail-led | Accumulator Indicator Light Led | ail-led |
| batak | Batak Game (non-car) | batak |
| break-light | Rear Break Light | break-light |
| bspd | Brake System Plausibility Device | bspd |
| can-node | Voltage Reader and Broadcaster | can-node |
| curr-amp | Current Sensor Amplifier | curr-amp |
| dash | Dashboard | dash |
| discharge | Discharge Relay Breakout | discharge |
| hv-sense | High Voltage Sense | hvs |
| latching | Latch Circuit | latching |
| loom* | Loom Design | loom |
| lvbms | Low Voltage Battery Management System | lvbms |
| precharge | Precharge Controller | precharge |
| segment | Segment | segment |
| telemetry | On-Car Telemetry | telemetry |
| test-rig | PCB Test / Demo Rig | test |
| top-level* | Full Car Schematic | |
| trc | TSAC Relay Controller | trc |
| tsal | Tractive System Active Light | tsal |
| vcu | Vehicle Control Unit | vcu |
We design our PCBs in KiCad (version 8+).
*Moved to https://github.com/sufst/loom
Version Control for KiCad Projects
Why?
- Revert individual changes.
- Document development history via commits and GitHub issues.
- Easily view previous versions of designs.
- Manage shared library of components.
Files
Files that should be in this repo, under version control:
- Project files (
.kicad_pro). - Schematic files (
.kicad_sch). - PCB files (
.kicad_pcb). - Custom footprints (
.kicad_mod). - Custom symbols (
.kicad_sym). - Footprint library tables (
fp-lib-table). - Symbol library tables (
sym-lib-table). - 3D models of components (
.stepfiles). - Simulation code (e.g.
.ascfiles from LTSpice).
Files that should never be in here:
- Exports such as BOMs, gerbers, netlists, renders, etc.
- Local project settings (
.kicad_prl). - Project backups (.zip files generated in
<project name>-backups,.bak.bck-bakfiles). - Cache files (
fp-info-cache).
The .gitignore should prevent the addition of files we don't want to keep in here, but before you commit make sure to do a quick check of what is actually being added.
Shared Resources
The common folder is used for resources which can be shared across multiple projects. This includes:
- Images (
imagessubdirectory). - 3D models (
stepsubdirectory). - Custom symbols (
sufst-lib.kicad_sym). - Custom footprints (
sufst-lib.pretty). - SUFST standard sheet layout (
sheet-layout.kicad_wks).
Note: Since projects were previously in their own individual repos, many designs still have their own libraries, step files, etc. These will gradually be migrated to the SUFST library.
Library Paths
When you configure the library paths for a project (sym-lib-table and fp-lib-table data), make sure to always use a path relative to the project with the ${KIPRJMOD} substitution.
- Correct:
${KIPRJMOD}/../common/sufst-lib.kicad_sym - Incorrect:
/Users/<your name>/Documents/sufst/pcb/common/sufst-lib.kicad_sym
If an absolute path is used, when someone else opens the project that path will not exist and the library paths will not be valid. -lib-table files should never contain an absolute path.
Git Limitations
It is not possible to resolve merge conflicts within individual design files, which is an unfortunate limitation of using git with KiCad. While KiCad files are in a text format, they aren't really designed to be edited manually. It is therefore essential that only one person is editing a particular file in a project at a time (including the shared library). Once someone starts working on a file, until it is merged into the main branch nobody else can edit that file. A good way to get round this is to use the "hierarchical sheets" feature to divide schematics into multiple files (if it can be done in a logical way).
Releases
Release Files
When a PCB is fabricated, a new 'release' for the given project should be
created and stored within this repo in the releases/<PROJECT NAME> folder.
This folder should contain the latest version (and ONLY the latest version) of
the following files:
- Exported gerbers and drill files in a ZIP archive called
fabrication.zip. - Schematic sheets as a PDF (
Schematic.pdf). - Layout as a PDF in colour, with border and title block (
Layout.pdf). - HTML iBOM created using the "Interactive HTML BOM Plugin" (
ibom.html).
Additionally, a file called info (no extension) should be created (if it
doesn't already exist) containing release information in the following format:
version: <VERSION NUMBER>
date: <RELEASE DATE>
fabrication: <COMPANY>Version numbers should be in the format v1.0.1 and dates should be in the
format YYYY-MM-DD. For example:
version: v1.0.1
date: 2023-01-23
fabrication: JLCPCBThe release folder for a project should then have the following structure and file names:
<PROJECT NAME>
├── Layout.pdf
├── Schematic.pdf
├── fabrication.zip
├── ibom.html
└── infoWhen creating a new release, make sure to overwrite/replace all the existing files.
Release Tag
The release commit should then be tagged with the following command:
git tag <PROJECT CODE>-<VERSION_NUMBER>Tagging should be done after merging to main! Example command:
git tag segment-v1.0.1To push tags to GitHub:
git push --tagsParts
85| Qty | Value | Footprint | References |
|---|---|---|---|
| 20 | 10k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R1, R3, R4, R5, R10, R11, R12, R14, R17, R22, R24, R26, R28, R33, R35, R37 +4 |
| 8 | 100n | Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder | C1, C2, C3, C4, C6, C7, C10, C11 |
| 8 | XP262N7002TR-G | Package_TO_SOT_SMD:SOT-23 | Q1, Q2, Q5, Q8, Q9, Q10, Q11, Q13 |
| 5 | 1k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R32, R39, R40, R41, R42 |
| 4 | M3 | MountingHole:MountingHole_3.2mm_M3 | H1, H2, H3, H4 |
| 4 | SiS413DNT | Package_SO:Vishay_PowerPAK_1212-8_Single | Q3, Q4, Q6, Q7 |
| 3 | 3k3 | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R13, R18, R21 |
| 3 | BAT54W | Package_TO_SOT_SMD:SOT-323_SC-70 | D1, D2, D6 |
| 3 | Conn_02x06 | Connector_Molex:Molex_Micro-Fit_3.0_43045-1200_2x06_P3.00mm_Horizontal | J1, J2, J3 |
| 3 | LED | LED_SMD:LED_0805_2012Metric_Pad1.15x1.40mm_HandSolder | D3, D4, D5 |
| 2 | 100 | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R27, R29 |
| 2 | 100k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R34, R36 |
| 2 | 10u | Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder | C8, C9 |
| 2 | 40106 | Package_SO:SOIC-14_3.9x8.7mm_P1.27mm | U1, U3 |
| 2 | G5Q-1EU DC12 | SUFST:Relay_Template | K1, K2 |
| 2 | SS14+ | Diode_SMD:D_SMA | D7, D8 |
| 1 | 100u | Capacitor_THT:CP_Radial_D5.0mm_P2.00mm | C5 |
| 1 | 100u | Capacitor_THT:CP_Radial_D6.3mm_P2.50mm | C12 |
| 1 | 150k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R30 |
| 1 | 220R | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R20 |
| 1 | 2k2 | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R2 |
| 1 | 4013 | Package_SO:SOIC-14_3.9x8.7mm_P1.27mm | U2 |
| 1 | 47 | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R38 |
| 1 | 470 | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R31 |
| 1 | 470k | Potentiometer_THT:Potentiometer_Bourns_3296W_Vertical | RV1 |
| 1 | 47k | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R16 |
| 1 | DMP3056L-7 | Package_TO_SOT_SMD:SOT-23 | Q12 |
| 1 | LOGO | SUFST:sufst-text | G*** |
Questions
How big is the Tsal latching integrated PCB?
It measures 69 × 68 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Tsal latching integrated use?
85 parts, built around the XP262N7002TR-G, SIS413DN-TP, BAT54W and DMP3056L-7. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Tsal latching integrated KiCad files?
From the sufst/pcb repository on GitHub, at the commit this page was made from: the board is tsal-latching-integrated/tsal-latching-integrated.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Can I use the Tsal latching integrated design in my own project?
Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).
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