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2 layers314.9 × 65 mmPCB - VOLTAGE TAPS, the printed circuit board in 3D

PCB - VOLTAGE TAPS

sufst/pcb19

Monorepo for all schematics and PCB designs

Size
314.9 × 65 mm
Copper layers
2
Thickness
1.6 mm
Parts
32
Nets
13
Pads
55
Tracks, vias
68, 0
Routed
Yes
KiCad
KiCad 7 (file 20221018)
Created
4 Oct 2022
Updated
6 Aug 2026

Overview

PCB - VOLTAGE TAPS is an open-source printed circuit board by sufst, from the sufst/pcb repository on GitHub, published under the GPL-3.0 licence. It is a 2-layer board of 314.9 × 65 mm with 32 parts on 13 nets, routed with 68 tracks and 0 vias.

README

README.md

PCBs

About

Central repository of all schematics and PCB design files.

FolderProjectProject Code
ailAccumulator Indicator Light Logicail
ail-ledAccumulator Indicator Light Ledail-led
batakBatak Game (non-car)batak
break-lightRear Break Lightbreak-light
bspdBrake System Plausibility Devicebspd
can-nodeVoltage Reader and Broadcastercan-node
curr-ampCurrent Sensor Amplifiercurr-amp
dashDashboarddash
dischargeDischarge Relay Breakoutdischarge
hv-senseHigh Voltage Sensehvs
latchingLatch Circuitlatching
loom*Loom Designloom
lvbmsLow Voltage Battery Management Systemlvbms
prechargePrecharge Controllerprecharge
segmentSegmentsegment
telemetryOn-Car Telemetrytelemetry
test-rigPCB Test / Demo Rigtest
top-level*Full Car Schematic
trcTSAC Relay Controllertrc
tsalTractive System Active Lighttsal
vcuVehicle Control Unitvcu

We design our PCBs in KiCad (version 8+).

*Moved to https://github.com/sufst/loom

Version Control for KiCad Projects

Why?

  • Revert individual changes.
  • Document development history via commits and GitHub issues.
  • Easily view previous versions of designs.
  • Manage shared library of components.

Files

Files that should be in this repo, under version control:

  • Project files (.kicad_pro).
  • Schematic files (.kicad_sch).
  • PCB files (.kicad_pcb).
  • Custom footprints (.kicad_mod).
  • Custom symbols (.kicad_sym).
  • Footprint library tables (fp-lib-table).
  • Symbol library tables (sym-lib-table).
  • 3D models of components (.step files).
  • Simulation code (e.g. .asc files from LTSpice).

Files that should never be in here:

  • Exports such as BOMs, gerbers, netlists, renders, etc.
  • Local project settings (.kicad_prl).
  • Project backups (.zip files generated in <project name>-backups, .bak .bck -bak files).
  • Cache files (fp-info-cache).

The .gitignore should prevent the addition of files we don't want to keep in here, but before you commit make sure to do a quick check of what is actually being added.

Shared Resources

The common folder is used for resources which can be shared across multiple projects. This includes:

  • Images (images subdirectory).
  • 3D models (step subdirectory).
  • Custom symbols (sufst-lib.kicad_sym).
  • Custom footprints (sufst-lib.pretty).
  • SUFST standard sheet layout (sheet-layout.kicad_wks).

Note: Since projects were previously in their own individual repos, many designs still have their own libraries, step files, etc. These will gradually be migrated to the SUFST library.

Library Paths

When you configure the library paths for a project (sym-lib-table and fp-lib-table data), make sure to always use a path relative to the project with the ${KIPRJMOD} substitution.

  • Correct: ${KIPRJMOD}/../common/sufst-lib.kicad_sym
  • Incorrect: /Users/<your name>/Documents/sufst/pcb/common/sufst-lib.kicad_sym

If an absolute path is used, when someone else opens the project that path will not exist and the library paths will not be valid. -lib-table files should never contain an absolute path.

Git Limitations

It is not possible to resolve merge conflicts within individual design files, which is an unfortunate limitation of using git with KiCad. While KiCad files are in a text format, they aren't really designed to be edited manually. It is therefore essential that only one person is editing a particular file in a project at a time (including the shared library). Once someone starts working on a file, until it is merged into the main branch nobody else can edit that file. A good way to get round this is to use the "hierarchical sheets" feature to divide schematics into multiple files (if it can be done in a logical way).

Releases

Release Files

When a PCB is fabricated, a new 'release' for the given project should be created and stored within this repo in the releases/<PROJECT NAME> folder. This folder should contain the latest version (and ONLY the latest version) of the following files:

  1. Exported gerbers and drill files in a ZIP archive called fabrication.zip.
  2. Schematic sheets as a PDF (Schematic.pdf).
  3. Layout as a PDF in colour, with border and title block (Layout.pdf).
  4. HTML iBOM created using the "Interactive HTML BOM Plugin" (ibom.html).

Additionally, a file called info (no extension) should be created (if it doesn't already exist) containing release information in the following format:

txt
version: <VERSION NUMBER>
date: <RELEASE DATE>
fabrication: <COMPANY>

Version numbers should be in the format v1.0.1 and dates should be in the format YYYY-MM-DD. For example:

txt
version: v1.0.1
date: 2023-01-23
fabrication: JLCPCB

The release folder for a project should then have the following structure and file names:

txt
<PROJECT NAME>
├── Layout.pdf
├── Schematic.pdf
├── fabrication.zip
├── ibom.html
└── info

When creating a new release, make sure to overwrite/replace all the existing files.

Release Tag

The release commit should then be tagged with the following command:

sh
git tag <PROJECT CODE>-<VERSION_NUMBER>

Tagging should be done after merging to main! Example command:

sh
git tag segment-v1.0.1

To push tags to GitHub:

sh
git push --tags

Parts

32
QtyValueFootprintReferences
3MountingHoleSUFST:Segment_Thermistor_TyrapH1, H2, H3
1LOGOSUFST:StagG***
1LOGOSUFST:SUFSTG***
1VTAP_IN_1SUFST:Segment_Voltage_Tap_PositiveTP1
1VTAP_IN_10SUFST:Segment_Voltage_TapTP10
1VTAP_IN_11SUFST:Segment_Voltage_TapTP11
1VTAP_IN_12SUFST:Segment_Voltage_TapTP12
1VTAP_IN_13SUFST:Segment_Voltage_Tap_NegativeTP25
1VTAP_IN_2SUFST:Segment_Voltage_TapTP2
1VTAP_IN_3SUFST:Segment_Voltage_TapTP3
1VTAP_IN_4SUFST:Segment_Voltage_TapTP4
1VTAP_IN_5SUFST:Segment_Voltage_TapTP5
1VTAP_IN_6SUFST:Segment_Voltage_TapTP6
1VTAP_IN_7SUFST:Segment_Voltage_TapTP7
1VTAP_IN_8SUFST:Segment_Voltage_TapTP8
1VTAP_IN_9SUFST:Segment_Voltage_TapTP9
1VTAP_OUT_1SUFST:55A_24AWG_SolderTP13
1VTAP_OUT_10SUFST:55A_24AWG_SolderTP22
1VTAP_OUT_11SUFST:55A_24AWG_SolderTP23
1VTAP_OUT_12SUFST:55A_24AWG_SolderTP24
1VTAP_OUT_13SUFST:55A_24AWG_SolderTP26
1VTAP_OUT_2SUFST:55A_24AWG_SolderTP14
1VTAP_OUT_3SUFST:55A_24AWG_SolderTP15
1VTAP_OUT_4SUFST:55A_24AWG_SolderTP16
1VTAP_OUT_5SUFST:55A_24AWG_SolderTP17
1VTAP_OUT_6SUFST:55A_24AWG_SolderTP18
1VTAP_OUT_7SUFST:55A_24AWG_SolderTP19
1VTAP_OUT_8SUFST:55A_24AWG_SolderTP20
1VTAP_OUT_9SUFST:55A_24AWG_SolderTP21

The 31 most common of 32 parts.

Questions

How big is the PCB - VOLTAGE TAPS PCB?

It measures 314.9 × 65 mm and has 2 copper layers, 1.6 mm thick.

What parts does the PCB - VOLTAGE TAPS use?

32 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the PCB - VOLTAGE TAPS KiCad files?

From the sufst/pcb repository on GitHub, at the commit this page was made from: the board is PCB - VOLTAGE TAPS/PCB - VOLTAGE TAPS.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the PCB - VOLTAGE TAPS design in my own project?

Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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