
SF2000
jbilander/SF2000
Spitfire 2000, A low-end 42 MHz Accelerator with IDE and 4/8 MB fast RAM for the Amiga 2000 co-pro slot (or A500 through an adapter).

A small adapter-board that connects 12-bit RGB, 14 MHz CLK, PIXELSW and SYNC-signals on Denise to a FPGA-board via a 5V-tolerant buffer.
Denise to FPGA is an open-source printed circuit board by jbilander, from the jbilander/Denise_to_FPGA repository on GitHub, published under the CC-BY-SA-4.0 licence. It is a 4-layer board of 97 × 26.9 mm with 21 parts on 89 nets, routed with 397 tracks and 55 vias.
It is built around the 74LVC162244ADL, 74LVC1G57GV and LM1117-3.3. Its parts include 8 capacitors, 4 ICs, 3 connectors and 1 resistor. It belongs with the fPGA and programmable logic boards and the FPGA and CPLD boards of this library.
A small adapter-board that connects 12-bit RGB, 14 MHz CLK, PIXELSW and SYNC-signals on Denise to a FPGA-board via a 5V-tolerant buffer.
A synchronous 14 MHz clock is generated from C7M XOR CDAC by using a 74LVC1G86-chip. This will be fed into the FPGA's PLL.
Board is two layers.
WORK IN PROGRESS, NOT FULLY TESTED YET!
| Designator | Name/Value | Package | Notes |
|---|---|---|---|
| U1 | Voltage Regulator 3.3V, LM1117-3.3 or AMS1117-3.3 | SOT-223 | 3.3V 1A Low Drop-Out (LDO) Voltage regulator. |
| U2,U3 | Bus Transceiver 74LVC245A | TSSOP-20 | 74LVC245APW-T |
| U4 | XOR Gate 74LVC1G86 | SOT-353 | 74LVC1G86 |
| U5 | 48 pcs TH socket pins | 100 Pcs | IC Leads Receptacle, Length 9.7 mm gold or nickel plated. 100 pcs 300 pcs 1000 pcs 1000 pcs |
| C1,C2 | Capacitor 10uF | 1206 | Caps for Voltage Regulator |
| C3-C6 | Capacitor 0.1uF = 100nF | 0805 | Decoupling caps |
| R1 | 22 or 33 Ω Resistor | 0805 | 22 or 33 Ω series resistor to avoid reflections on the 14 MHz CLK |
| J1 | CDAC/CSYNC Two-Pin Header 2.54mm pitch | 2.54mm pitch | Connect a fly-lead here for old Rev. 3 A500 Motherboard that doesn't have these signals at the Denise socket. |
| J2 | VSYNC/HSYNC Two-Pin Header 2.54mm pitch | 2.54mm pitch | Connect a fly-lead here with connection to the Horizontal and Vertical sync on DB23-backside. |
| J3 | FPC connector, Right Angle, bottom contact | 0.5mm pitch, 40 positions | TE Connectivity 4-1734592-0 or 40p here |
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
| Qty | Value | Footprint | References |
|---|---|---|---|
| 5 | 0.1uF | DENISE_to_FPGA:C_0805_2012Metric_Pad1.15x1.4mm_HandSolder | C4, C5, C6, C7, C8 |
| 2 | 10uF | Capacitor_SMD:C_1206_3216Metric_Pad1.42x1.75mm_HandSolder | C1, C2 |
| 2 | 330 | Resistor_SMD:R_Array_Convex_4x0603 | RN1, RN2 |
| 2 | Conn_01x02 | Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Horizontal | J1, J2 |
| 1 | 1uF | Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder | C3 |
| 1 | 33 Ω | Resistor_SMD:R_0805_2012Metric_Pad1.20x1.40mm_HandSolder | R1 |
| 1 | 74LVC162244A | Package_SO:TSSOP-48_6.1x12.5mm_P0.5mm | U2 |
| 1 | 74LVC1G57GV | Package_SO:TSOP-6_1.65x3.05mm_P0.95mm | U3 |
| 1 | Conn_01x40 | Connector_FFC-FPC:Hirose_FH12-40S-0.5SH_1x40-1MP_P0.50mm_Horizontal | J3 |
| 1 | Denise_MB_PinHeader | DENISE_to_FPGA:DIP-48_W15.24mm_Socket_LongPads | U4 |
| 1 | LM1117-3.3 | Package_TO_SOT_SMD:SOT-223 | U1 |
The 18 most common of 21 parts.

jbilander/SF2000
Spitfire 2000, A low-end 42 MHz Accelerator with IDE and 4/8 MB fast RAM for the Amiga 2000 co-pro slot (or A500 through an adapter).

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It measures 97 × 26.9 mm and has 4 copper layers, 1.6 mm thick.
21 parts, built around the 74LVC162244ADL, 74LVC1G57GV and LM1117-3.3. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the jbilander/Denise_to_FPGA repository on GitHub, at the commit this page was made from: the board is KiCad/DENISE_to_FPGA.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository publishes it under the CC-BY-SA-4.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).