
Denise to FPGA
jbilander/Denise_to_FPGA
A small adapter-board that connects 12-bit RGB, 14 MHz CLK, PIXELSW and SYNC-signals on Denise to a FPGA-board via a 5V-tolerant buffer.

Spitfire 2000, A low-end 42 MHz Accelerator with IDE and 4/8 MB fast RAM for the Amiga 2000 co-pro slot (or A500 through an adapter).
SF2000 is an open-source printed circuit board by jbilander, from the jbilander/SF2000 repository on GitHub, published under the CC-BY-SA-4.0 licence. It is a 4-layer board of 111.5 × 83.9 mm with 160 parts on 444 nets, routed with 4,276 tracks and 621 vias.
It is built around the 10M02SCU324C8G, RP2354A and ESP32-C5-WROOM-1U-N8R8, with the W25Q16JVSNIQ, 74LVC8T245PW,118-JSM and SN74CBT16211DL among its other parts. Its parts include 72 capacitors, 27 resistors, 17 ICs, 16 connectors and 2 crystals. It belongs with the ESP32, RP2350, RISC-V and FPGA and CPLD boards of this library.
Spitfire 2000, A low-end 42 MHz Amiga Accelerator based on the Motorola 68SEC000 CPU
This is WORK IN PROGRESS, a DIY hobby project. If you are going to make and sell boards you are also the one doing the customer support.
Revision 3A is brand new and has not been tested yet.
IMPORTANT Please do not build Revision 2B. We have found problems with the bus isolation on that revision which cause SRAM corruption. The Rev. 2B and Rev. 1B bills of material further down are kept for reference only.
The firmware for this board is in a separate repository available here:
https://github.com/jbilander/SF2000-FW
Revision 3A
Full schematic: SF2000_rev3a_schematic.pdf
***
Rev. 3A replaces the four asynchronous SRAMs with a single SDRAM, swaps the Efinix Trion for an Intel/Altera MAX 10, drops the on-board IDE interface, and adds an ESP32-C5 module and an RP2354A. Values and packages below are taken straight from the KiCad netlist.
| Designator | Name/Value | Package | Notes |
|---|---|---|---|
| U1 | Voltage Regulator 3.3V, LM1117-3.3 or AMS1117-3.3 | SOT-223 | 3.3V 1A Low Drop-Out (LDO) Linear Voltage Regulator, main 3V3 rail LM111733QDCYRQ1 is the automotive-qualified LM1117-3.3 in SOT-223-4; any ordinary LM1117-3.3 in SOT-223 does the same job, and AMS1117-3.3 from AliExpress is a cheap alternative |
| U2 | Voltage Regulator 4.3V, ABLIC S-1132B43-M5T1U or TPS73643DBVR | SOT-23-5 | 4.3V LDO, the 4V3 supply rail for the CBT FET bus switches U4,U5,U6 S-1132B43-M5T1U |
| U3 | Voltage Regulator 3.3V, TLV75533PDBVR | SOT-23-5 | 3.3V 500mA LDO, separate 3V3_C5 rail for the ESP32-C5 module so its Wi-Fi bursts stay off the FPGA rail TLV75533PDBVR |
| U4,U5 | Digital Bus Switch 24-Bit FET, SN74CBT16211CDGGR or SN74CBT16811CDGGR | TSSOP-56 | FET level-shifter, Amiga +5V bus <-> 3V3 SN74CBT16211CDGGR (Mouser's own part number drops the trailing R, but it is the cut-tape CDGGR) |
| U6 | Digital Bus Switch 10-Bit FET, SN74CBT3244PW | TSSOP-20 | FET level-shifter for the remaining control lines SN74CBT3244PW |
| U7 | Bus Transceiver 16-Bit, SN74LVC16245ADGGR | TSSOP-48 | Buffers the D0-D15 data bus, direction and output-enable driven by the FPGA (DATA_DIR, OE_D_HIGH, OE_D_LOW) SN74LVC16245ADGGR |
| U8 | Intel/Altera MAX 10 FPGA, 10M04SCU324C8G | BGA-324, 15x15mm, 0.8mm pitch | 4000 LE, internal configuration flash and UFM. It has to be the S single-supply variant - there is no 1.2V core rail on this board. The symbol and footprint in KiCad are drawn as a 10M02 so the design can be downsized to a 10M02SCU324 later if it fits; the firmware is developed for the 10M04 10M04SCU324C8G / 10M02SCU324C8G |
| U9 | W25Q16JVSNIQ 16 Mbit SPI NOR Flash memory | SOIC-8_3.9x4.9mm_P1.27mm (150-mil Narrow JEDEC SOIC) | W25Q16JVSNIQ or AT25SF161B-SSHD-T |
| U10 | Motorola CPU MC68SEC000AA20 20MHz | QFP-64_14x14mm_Pitch0.8mm | MC68SEC000AA20 |
| U11 | SDRAM 8Mx16 (128 Mbit), IM1216SDBABG-6I or AS4C8M16SA-6BINTR | TFBGA-54, 8x8mm, 0.8mm pitch | Replaces the four SRAMs of Rev. 2B. 128 Mbit is 16 MB, which is the whole address space the MC68SEC000 can reach, so there is nothing to gain from a bigger part. The footprint is routed for all 13 address lines, so a 256 Mbit 16Mx16 part (AS4C16M16SA-6BIN) drops straight in as well should a large shadow RAM ever want one - unlikely, but the option costs nothing. On the 128 Mbit parts ball F9 (A12) is a no-connect, so the controller's row-address width has to match whichever density is fitted. On the Alliance part the -6BINTR suffix is cut tape and -6BIN is the tray version of the same device, which costs noticeably more IM1216SDBABG-6I / AS4C8M16SA-6BINTR |
| U12 | 74HCT2G14GV,125 Dual Schmitt Trigger Inverter | TSOP-6 / SOT457 / SC-74 | Drives the SD_LED header J9 and the /SD_ACTIVE pin J10 at +5V 74HCT2G14GV,125 |
| U13 | ESP32-C5-WROOM-1U-N8R8 | Module, 18 x 25.5mm, U.FL antenna connector | The -1U variant uses an external antenna, so no PCB antenna keep-out is needed under or beside the module. If you fit the PCB-antenna -1 variant instead, the module has to be moved so its antenna end hangs over the board edge ESP32-C5-WROOM-1U-N8R8 / ESP32-C5-WROOM-1-N8R8 |
| U14 | Level shifter 74LVC8T245PW,118 | TSSOP-24 | Clockport data bus CP_D0-CP_D7. 3V3 on the A side, +5V on the B side, direction and enable from the FPGA 74LVC8T245PW,118 |
| U15 | Level shifter 74LVC8T245PW,118 | TSSOP-24 | Clockport address and control (CP_A2-CP_A5, /CS, /IORD, /IOWR). +5V on the A side, 3V3 on the B side, DIR and /OE tied low so it always drives 3V3 -> +5V 74LVC8T245PW,118 |
| U16 | Raspberry Pi RP2354A | QFN-60, 7x7mm, 0.4mm pitch | MCU with 2 MB stacked flash. SPI slave to the FPGA (SS_RP2354, IRQ_RP2354) plus a UART link to the ESP32-C5 RP2354A (SC1511-A4) |
| U17 | 74LVC1G57GV Configurable Multiple-Function Gate | TSOP-6 / SOT457 / SC-88A | Wired as XNOR with A and B tied together: CLK7M = CCK XNOR CCKQ (replaces the SN74LVC2G86DCUR XOR of Rev. 2B). This is how the 7 MHz is generated on every supported machine - the real 7M is not present on the co-pro slot of the early German A2000, nor on A500 Rev 3 and Rev 5, but CCK and CCKQ always are 74LVC1G57GV,125 |
| J1 | Goldfingers on PCB, 86-pin | ENIG | Order PCB with Goldfingers, ENIG and 45 degrees chamfered edge (or chamfer the edge yourself with a file) |
| J2 | CFGIN-header, Two-Pin Header | 2.54mm (1 x 2) | Put a jumper shunt here to activate autoconfig, or a CONFIGOUT-wire from another device into pin 2. Pin 2 is pulled up to +5V by R21 |
| J3 | JTAG-header | Dual row 2.54mm (2 x 5) Pin Male Header | |
| J4 | JP-header JP2, JP3 | 2.54mm (2 x 2) Pin Male Header | JP2 = Generate E-CLK (if the internal 68k is removed from the socket), JP3 = MapROM |
| J5 | SWD pads, SWCLK / GND / SWDIO | 2.54mm (1 x 3) | Serial Wire Debug for U16 (RP2354A) |
| J6 | ESP32 UART0, TX0 / RX0 | 2.54mm (1 x 2) Pin Male Header | Console and flashing header for U13 |
| J7 | VCC/GND Two-Pin Header | 2.54mm (2 x 1) | VIN +5V used when programming the FPGA standalone (card not installed in the Amiga). Be careful with orientation, check polarity BEFORE plugging-in a phone charger or similar here |
| J8 | GCT MEM2055-00-190-01-A Micro SD Card Socket | 9-pin push-pull micro-SD socket | Wired for 4-bit SDIO as well as 1-bit SPI: SD_CS=DAT3, SD_MOSI=CMD, SD_MISO=DAT0, SD_D1=DAT1, SD_D2=DAT2 |
| J9 | SD_LED header, Two-Pin Header | 2.54mm (2 x 1) | Driven by U12 inverter buffer when /SD_CS is being asserted. Connect here to drive an external HDD-LED |
| J10 | SD_ACTIVE low signal, Right angle Single-Pin Header | 0.64 mm square pin angled | Driven by U12 inverter buffer when /SD_CS is being asserted. Connect from here to a LED-board (Active low +5V-signal) |
| J11 | RP2354A UART0, TX0 / RX0 | 2.54mm (1 x 2) Pin Male Header | Console header for U16 |
| J12 | CLOCKPORT-header | 2.00mm 22-Pin (2x11) Pin Male Header | Caution: This header is +5V levels. Be careful with orientation |
| J13 | JP-header JP1 | 2.54mm (2 x 1) Pin Male Header | 7 MHz / Turbo selector |
| J14 | USB-C Receptacle USB 2.0, HRO TYPE-C-31-M-12 | 16-pin SMD | Native USB for the ESP32-C5 (U13) |
| J15 | SPI-header: CS0, PROG_DET, SCK, MISO, MOSI, GND | 2.54mm (1 x 6) Pin Male Header | External SPI access to U9. PROG_DET tells the FPGA that a programmer is attached so it releases the bus |
| J16 | USB-C Receptacle USB 2.0, HRO TYPE-C-31-M-12 | 16-pin SMD | Native USB for the RP2354A (U16), UF2 / BOOTSEL |
| S1 | 4-way DIP switch, TDB04H0SB1R | SMD, 1.27mm pitch | Autoconfig fast-RAM size, RAMSZ0-RAMSZ3. Pulled up by RN1, so all switches OFF, or the switch not fitted at all, means 8 MB |
| X1 | Crystal Oscillator 20 MHz | Oscillator 5.0 x 3.2mm, 4-pad | Do not populate. Every internal clock is derived from the 7 MHz reconstructed by U17, through the FPGA PLL. X1 is kept in the design in case a free-running clock is needed later; it lands on a dedicated clock input (CLK0p) through R3. Leave the pads empty until then |
| Y1 | Crystal 12 MHz, ABM8-272-T3 | 3.2 x 2.5mm, 4-pad | CL = 10 pF, +/-30 ppm. With C49/C50 = 15 pF and R12 = 1k this is the RP2350/RP2354 reference oscillator circuit ABM8-272-T3 |
| L1 | Inductor 3.3uH, AOTA AB201610S3R3101T | 2.0 x 1.6mm SMD shielded power inductor | Switching inductor for the RP2354A internal core buck regulator (VREG_LX) |
| BT1,BT2 | Tactile push button | 3 x 4 x 2mm SMD, 2-pin | BT1 = BOOT (pulls BOOTSEL low through R13), BT2 = RESET (pulls RUN low) for U16 |
| BT3,BT4 | Tactile push button | 3 x 4 x 2mm SMD, 2-pin | BT3 = BOOT (IO28 strap), BT4 = EN/RESET for U13 |
| R1 | 22 Ω Resistor | 0603 | Series damping on CLK_SDRAM, straight off the FPGA PLL output pin |
| R2 | 33 Ω Resistor | 0603 | Series damping on the 7 MHz generated by U17, into the FPGA clock input |
| R3 | 33 Ω Resistor | 0603 | Series damping on OSC_CLK from X1 (only relevant if X1 is fitted) |
| R4 | 33 Ω Resistor | 0603 | Series damping on CLKCPU from the FPGA to U10 |
| R5 | 33 Ω Resistor | 0603 | Series damping on SPI MOSI |
| R6 | 33 Ω Resistor | 0603 | Series damping on SPI SCLK |
| R7 | 33 Ω Resistor | 0603 | Series damping on SD_CLK to the micro SD card |
| R8 | 33 Ω Resistor | 0603 | RC filter into the RP2354A VREG_AVDD analog supply, together with C9 |
| R9,R10 | 27 Ω Resistor | 0603 | USB series resistors for D+ / D- on J16 |
| R11 | 330 Ω Resistor | 0603 | Series resistor for the SD_LED header J9, adjust to your LED and preferred brightness |
| R12 | 1k Ω Resistor | 0603 | Series resistor on XOUT of Y1 (RP2354A reference circuit) |
| R13 | 1k Ω Resistor | 0603 | Series resistor between BOOTSEL and the BOOT button BT1 |
| R14 | 4.7k Ω Resistor | 0603 | Pull-up for RUN on U16, with C44 as the reset delay |
| R15,R16 | 5.1k Ω Resistor | 0603 | USB-C CC1 / CC2 pull-downs for J16 |
| R17,R18 | 5.1k Ω Resistor | 0603 | USB-C CC1 / CC2 pull-downs for J14 |
| R19 | 10k Ω Resistor | 0603 | Pull-up for JTAG TDI to 3V3 |
| R20 | 10k Ω Resistor | 0603 | Pull-down for JTAG TCK |
| R21 | 10k Ω Resistor | 0603 | Pull-up for /CFGIN to +5V (J2 pin 2) |
| R22 | 10k Ω Resistor | 0603 | Pull-up for ESP32_RTS |
| R23 | 10k Ω Resistor | 0603 | Pull-down for PROG_DET |
| R24 | 10k Ω Resistor | 0603 | Pull-up for the ESP32-C5 EN pin, forms an RC reset delay with C46 |
| R25 | 10k Ω Resistor | 0603 | Pull-up for CP_D_OE on the 3V3 side |
| R26,R27 | 10k Ω Resistor | 0603 | Pull-ups for JP2 and JP3 |
| RN1 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups for RAMSZ0-RAMSZ3 (S1) CAY16-103J4LF |
| RN2 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups for JP1, TMS, CONF_DONE and nSTATUS |
| RN3 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups for ESP32_CTS, nCONFIG, SD_D2 and SD_CS |
| RN4 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups for SD_CD, SD_D1, SD_MISO and SD_MOSI |
| RN5 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups for CP_IOWR, CP_IORD, CP_CS (3V3 side) and SS_W25Q16 |
| RN6 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | Pull-ups to +5V for RST, CP_RTC_CS, CP_RTC_DS and CP_INT6 on the clockport |
| C1 | Polarized Electrolytic Capacitor 100uF | CP_Elec_6.3x7.7 mm | Wurth SMD WCAP-AS5H 100uF |
| C2 | Polarized Electrolytic Capacitor 22uF | CP_Elec_5x5.8 mm | Wurth SMD WCAP-AS5H 22uF |
| C3-C8 | Ceramic Capacitor 10uF | 1206 | Bulk on the 3V3, 4V3, 3V3_C5 and clockport +5V rails |
| C9-C11 | Ceramic Capacitor 4.7uF | 1206 | RP2354A supplies and core buck output |
| C12 | Ceramic Capacitor 0.47uF = 470nF | 1206 | |
| C13 | Ceramic Capacitor 0.22uF = 220nF | 1206 | Local reservoir at the ESP32-C5 3V3 pin |
| C14-C19 | Ceramic Capacitor 0.1uF = 100nF | 0805 | |
| C20-C46 | Ceramic Capacitor 0.1uF = 100nF | 0603 | Decoupling |
| C47,C48 | Ceramic Capacitor 0.01uF = 10nF | 0603 | |
| C49,C50 | Ceramic Capacitor 15pF | 0603 | Load capacitors for Y1 |
| C51-C72 | Ceramic Capacitor 0.1uF = 100nF | 0402 | The cluster on the underside directly beneath U8 and U11 |
Four layer stackup. The top and bottom layers carry the signal routing with a GND pour filling the gaps,
the second layer is a solid GND plane and the third layer is a 3.3V plane.
Top layer, and the GND plane on inner layer 1:
The 3.3V plane on inner layer 2, and the bottom layer:
| Designator | Name/Value | Package | Notes |
|---|---|---|---|
| U1 | Voltage Regulator 3.3V, LM1117-3.3 or AMS1117-3.3 | SOT-223 | 3.3V 1A Low Drop-Out (LDO) Linear Voltage regulator |
| U2 | Voltage Regulator 4.3V, ABLIC S-1132B43-M5T1U or TPS73643DBVR | SOT-23-5 | 4.3V LDO Linear Voltage Regulator S-1132B43-M5T1U |
| U3 | Voltage Regulator 1.2V, TLV73312PDBVR | SOT-23-5 | 1.2V LDO Linear Voltage Regulator TLV73312PDBVR |
| U4,U5,U6 | Digital Bus Switch ICs 24-Bit FET, SN74CBT16211CDGGR or SN74CBT16811CDGGR | TSSOP-56 | FET Level-shifter SN74CBT16211CDGGR or SN74CBT16811CDGGR |
| U7 | Dual XOR gate SN74LVC2G86DCUR | VSSOP-8_2.3x2mm_P0.5mm | Generates 7 MHz CLK from ~(CCK XOR CCKQ) SN74LVC2G86DCUR |
| U8 | Efinix Trion T8 FPGA T8Q144C3 | LQFP-144_20x20mm_P0.5mm | FPGA - Field Programmable Gate Array, 7384 LE, 97 I/O T8Q144C3 |
| U9 | W25Q16JVSNIQ 16 Mbit SPI NOR Flash memory | SOIC-8_3.9x4.9mm_P1.27mm (150-mil Narrow JEDEC SOIC) | W25Q16JVSNIQ or AT25SF161B-SSHD-T |
| U10 | Motorola CPU MC68SEC000AA20 20MHz | QFP-64_14x14mm_Pitch0.8mm | MC68SEC000AA20 |
| U11 | SST39LF802C-55-4C-EKE or SST39LF800A-55-4C-EKE | TSOP-I-48_18.4x12mm_P0.5mm | NOR Flash 3.0 to 3.6V 8Mbit Multi-Purpose Flash (for Kickstart) S39LF802C554CEKE S39LF800A554CEKE |
| U12 | 74AHCT14PW, Six Channel Schmitt Trigger Inverter | TSSOP-14_4.4x5mm_P0.65mm | 74AHCT14PW,118 or SN74AHCT14PWR |
| U13 | NOR Flash SST39LF040-55-4C-NHE-T | PLCC-32 | NOR Flash 3.0 to 3.6V SST39LF040554CN (or 39LF020, 39LF010) |
| U14,U15 | SRAM ISSI IS61WV20488FBLL-10TLI | TSOP-44 | First 4 MB SRAM High-Speed, Async, 2Mbx8, 10ns, 2.4v-3.6v, 44 Pin TSOP II, RoHS IS61WV20488FBLL-10TLI |
| U16,U17 | SRAM ISSI IS61WV20488FBLL-10TLI | TSOP-44 | Second 4 MB (Optional) --"-- |
| J1 | Goldfingers on PCB | ENIG | Order PCB with Goldfingers, ENIG and 45 degrees chamfered edge (or chamfer the edge yourself with a file) |
| J2 | CFGIN-header Two-Pin Header | 2.54mm pitch | Put a Jumper shunt here to activate autoconfig, or a CONFIGOUT-wire from other device to the right (pin 2) in this header. |
| J3 | JTAG-header | Dual row 2.54mm (2 x 5) Pin Male Header | |
| J4 | JP-header JP2 | 2.00mm (2 x 1) Pin Male Header | Generate E-CLK (if internal 68k is removed from socket) |
| J5 | JP-header JP3 | 2.00mm (2 x 1) Pin Male Header | Rom overlay jumper |
| J6 | JP-header JP4 | 2.00mm (2 x 1) Pin Male Header | 4/8 MB SRAM Config |
| J7 | VCC/GND Two-Pin Header | 2.54mm pitch | VIN +5V used when programming FPGA standalone (card not installed in the Amiga). Be careful with orientation, check polarity BEFORE plugging-in a phone charger or similar here. |
| J8 | Sunrom Micro SD Card Holder | 9-pin Micro SD card slot connector | Sunrom Micro-SD card holder |
| J9 | SD_LED header, Two-Pin Header | 2.54mm pitch | Driven by U12 inverter buffer when /SD_CS is being asserted. Connect to here in order to drive an external HDD-LED |
| J10 | SD_ACTIVE low signal, Right angle Single-Pin Header | 0.64 mm square pin angled | Driven by U12 inverter buffer when /SD_CS is being asserted. Connect to here in order to drive a LED-board (Active low +5V-signal) |
| J11 | Rom-bank selector | 2.00mm (2 x 1) Pin Male Header | Select first or second bank, address line A15 (pin 3) on U13 (SST39LF040) |
| J12 | CLOCKPORT-header | 2.00mm 22-Pin (2x11) Pin Male Header | Caution: This header is +5V levels. Be careful with orientation. |
| J13 | JP-header JP1 | 2.54mm (2 x 1) Pin Male Header | 7 MHz / Turbo selector |
| X1 | Crystal Oscillator 20 MHz | Oscillator_7.0x5.0mm | |
| R1 | 33 Ω Resistor | 0805 | Damping resistor for 20 MHz clock-signal coming from X1 oscillator |
| R2 | 33 Ω Resistor | 0805 | Damping resistor for 7 MHz clock-signal coming from U7 (SN74LVC2G86DCUR) |
| R3 | 33 Ω Resistor | 0805 | Damping resistor for CLKCPU clock-signal coming from FPGA pin 33 |
| R4 | ~220 Ω Resistor | 0805 | Series resistor for SD_LED header J9, adjust R-value to your type of LED and preferred brightness |
| R5 | 10k Ω Resistor | 0805 | Pull-up resistor for /FLASH_OE to 3V3 |
| R6 | 10k Ω Resistor | 0805 | Pull-up resistor for JP2 to 3V3 |
| R7 | 10k Ω Resistor | 0805 | Pull-up resistor for /CFGIN to 5V |
| R8 | 100k Ω Resistor | 0805 | Pull-up resistor for CRESET_N to 3V3 |
| RN1-RN6 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | CAY16-103J4LF |
| C1 | Polarized Electrolytic Capacitor 100uF | CP_Elec_6.3x7.7 mm | Wurth SMD WCAP-AS5H 100uF |
| C2 | Polarized Electrolytic Capacitor 22uF | CP_Elec_5x5.8 mm | Wurth SMD WCAP-AS5H 22uF |
| C3-C7 | Ceramic Capacitor 10uF | 1206 | |
| C8 | Ceramic Capacitor 2.2uF | 1206 | |
| C9 | Ceramic Capacitor 0.47uF = 470 nF | 1206 | |
| C10-C39 | Ceramic Capacitor 0.1uF = 100nF | 0805 | |
| C40-C54 | Capacitor 0.01uF = 10nF | 0805 |
| Designator | Name/Value | Package | Notes |
|---|---|---|---|
| U1 | Voltage Regulator 3.3V, LM1117-3.3 or AMS1117-3.3 | SOT-223 | 3.3V 1A Low Drop-Out (LDO) Voltage regulator. https://www.aliexpress.com/item/32869037691.html |
| U2 | Voltage Regulator 4.3V, TPS73643DBVR or ABLIC S-1200B43-M5T1U or MIC5205YM5-TR ADJ (with R1,R2 and C7 populated) | SOT-23-5 | 4.3V LDO Voltage Regulator * TPS73643DBVR * S-1132B43-M5T1U * MIC5205YM5-TR (Adjustable, populate R1,R2,C7) |
| U3 | Inverter Schmitt Trigger 74LVC2G14GV,125 | TSOP-6/SOT457/SC-74 | * LVC2G14GV125 |
| U4,U5,U6 | Digital Bus Switch ICs 24-Bit FET, SN74CBT16211ADGGR | TSSOP-56 | FET Level-shifter * SN74CBT16211ADGGR * SN74CBT16811CDGG |
| U7 | XNOR gate w/ Schmitt Trigger SN74AUP1T87DCKR | TSSOP-5/SC-70-5/SOT-353-1 | Generates 7 MHz CLK from CCK XNOR CCKQ * SN74AUP1T87DCKR |
| U8 | Gowin FPGA GW1N-UV9LQ144C6/I5 | LQFP-144 | FPGA - Field Programmable Gate Array, 8640 LE, 120 I/O * GW1N-UV9LQ144C6/I5 |
| U9 | Motorola CPU MC68SEC000AA20 | QFP-64 | MPU 32-bit 20MHz Contact Eriond to buy a NOS CPU for a reasonable price |
| U10,U11 | SRAM ISSI IS61WV20488FBLL-10TLI | TSOP-44 | First 4 MB SRAM High-Speed, Async, 2Mbx8, 10ns, 2.4v-3.6v, 44 Pin TSOP II, RoHS * 61W20488FBLL10TI |
| U12,U13 | SRAM ISSI IS61WV20488FBLL-10TLI | TSOP-44 | Second 4 MB (Optional) --"-- |
| U14 | NOR Flash SST39LF040-55-4C-NHE-T | PLCC-32 | NOR Flash 3.0 to 3.6V (For Oktagon/Oktapus. IDE-driver) * SST39LF040554CN (or 39LF020, 39LF010) |
| U15 | SST39LF802C-55-4C-EKE | TSOP-48 | NOR Flash 3.0 to 3.6V 8Mbit Multi-Purpose Flash (for Kickstart) * S39LF802C554CEKE |
| U16,U17,U18 | Bus Transceiver 74LVC245APW,118 | TSSOP-20 | * 74LVC245APW-T |
| J1 | Goldfingers on PCB | ENIG | Order PCB with Goldfingers, ENIG and 45 degrees chamfered edge (or chamfer the edge yourself) |
| J2 | JTAG-header | Dual row 2.54mm (2 x 5) Pin Male Header Strip | ![]() |
| J3 | JP-header JP2,JP3,JP4 | Dual row 2.00mm (2 x 3) Pin Male Header Strip | Turbo speed selector |
| J4 | JP-header JP5 | 2.00mm (2 x 1) Pin Male Header | Generate E-CLK (if internal 68k is removed from socket) |
| J5 | IDE/ATA-header | 2.00mm 44-Pin (2x22 Pin) Straight Male Shrouded PCB Box header IDC Socket | For A2000: * Shrouded header For A500 internal mount a right angled female header can be used (2x25 and cut down to 2x22): * Right Angle Female Connector |
| J6 | Sunrom Micro SD Card Holder | 9-pin Micro SD card slot connector | * Sunrom Micro-SD card holder |
| J7 | VCC/GND Two-Pin Header 2.54mm pitch | 2.54mm pitch | VIN +5V used when programming FPGA standalone (card not installed in the Amiga). Be careful with orientation, check polarity BEFORE plugging-in a phone charger or similar here. |
| J8 | JP-header JP6 | 2.00mm (2 x 1) Pin Male Header | 4/8 MB SRAM Config |
| J9,J10 | JP-header JP7,JP8 | 2.00mm (2 x 2) Pin Male Header | JP7 Autoboot IDE OFF/ON Selector, JP8 Oktagon/Oktapus. IDE-driver Selector |
| J11 | LED Two-Pin Header 2.54mm pitch | 2.54mm pitch | Driven by U3 inverter buffer when /Active on IDE is being asserted. Connect to here to drive an external HDD-LED |
| J12 | /Active signal, Single-Pin Header 2.54mm | 2.54mm pitch | /Active signal from IDE. Connect from here to a * LED-board |
| J13 | Pmod Type 2A (SPI) Female header, 12-Pin (2x6) | 2.54mm pitch | For connecting SPI peripherals. * Right-Angled (A2000) or * Straight (A500) to not interfere with RGBtoHDMI-adapter inside A500 |
| R1 | 1.2k Ω Resistor | 0805 | Feedback resistor, Only populate if U2 is of ADJ-ustable type (e.g. MIC5205YM5-TR) |
| R2 | 3k Ω Resistor | 0805 | Feedback resistor, Only populate if U2 is of ADJ-ustable type (e.g. MIC5205YM5-TR) |
| R3 | 10k Ω Resistor | 0805 | Pull-up resistor for /CFGIN (5V-side) |
| R4 | 10k Ω Resistor | 0805 | Pull-up resistor in RC-debounce circuit |
| R5 | 10k Ω Resistor | 0805 | Series resistor in RC-debounce circuit |
| R6 | ~220 Ω Resistor | 0805, 200 mW | Series resistor for IDE-LED header J11, adjust R-value to your type of LED and preferred brightness |
| R7 | 1k Ω Resistor | 0805 | Pull-down resistor for IDE_IRQ |
| R8 | 4.7k Ω Resistor | 0805 | Pull-up resistor for IDE_IORDY |
| R9 | 10k Ω Resistor | 0805 | Pull-up resistor for JP6 |
| R10 | 1k Ω Resistor | 0805 | Pull-down resistor for MODE0 (Gowin FPGA boot/configure from embFlash) |
| R11 | 1k Ω Resistor | 0805 | Pull-down resistor for MODE1 (Gowin FPGA boot/configure from embFlash) |
| R12 | 10k Ω Resistor | 0805 | Pull-up resistor for RECONFIG_N (Gowin FPGA) and /SPI_CS (in J13 Pmod-header) |
| R13 | 10k Ω Resistor | 0805 | Pull-up resistor for /ACTIVE (IDE) |
| RN1-RN2,RN5 | Resistor pack 10k Ω (CAY16-103J4LF) | 1206 | * CAY16-103J4LF Pull-up resistors. |
| RN3-RN4 | Resistor pack 10k Ω (CAY16-103J4LF) or 4.7k (CAY16-4701F4LF) | 1206 | * CAY16-4701F4LF Pull-up resistors for SD0-SD3,SD_CD,SD_CMD,JP7,JP8 |
| C1-C2 | Capacitor 10uF | 1206 | |
| C3 | Capacitor 0.1uF = 100nF | 0805 | |
| C4 | Polarized Capacitor 100uF | CP_Elec_6.3x7.7 | * Wurth SMD WCAP-AS5H 100uF |
| C5 | Polarized Capacitor 22uF | CP_Elec_5x5.8 | * Wurth SMD WCAP-AS5H 22uF |
| C6 | Capacitor 10uF to 0.22uF | 1206 | Check datasheet for U2 what is suitable here. |
| C7 | Capacitor 0.33uF = 330nF | 1206 | (Not needed if U2 is TPS73643DBVR, check your U2-datasheet) |
| C8 | Capacitor 10uF | 1206 | |
| C9-C25 | Capacitor 0.1uF = 100nF | 0805 | C24 capacitor in RC-debounce circuit |
| C26-C27 | Capacitor 10uF | 1206 | |
| C28-C46 | Capacitor 0.01uF = 10nF | 0805 |
A SF2000 shared shopping cart with most of the stuff in the list, no 3V3-regulator though and not all birdseed (passives): https://www.mouser.com/ProjectManager/ProjectDetail.aspx?AccessID=fdb374e26b
The FPGA used in this Accelerator board, please note it has to be the Voltage UV version because of 3.3V is being used for all VCC/VCCIO on the Accelerator:
***
### MC68SEC000
The SF2000 is based on the MC68SEC000 CPU
https://www.nxp.com/docs/en/product-brief/MC68SEC000.pdf
You can contact Eriond, https://github.com/eriond (over at A314 or Retro Tinkering or SUGA (Swedish User Group Amiga) discord) to buy a NOS MC68SEC000 at a reasonable price.
Internal A500 installation with this adapter:
https://github.com/jbilander/A500_Edge_Expansion_adapter
External A500 installation with this adapter:
https://github.com/jbilander/POC86
***
Follow the dots to get the correct orientation of the chips when soldering, don't rely on the silkscreen text.
You can solder the 3V3 LDO and the FPGA first and then check that you can communicate via JTAG programming a simple LED-blink example or similar. +5V you can take from a USB phone-charger or similar, check polarity before you plug it in.
Make sure you populate the 4V3 LDO like this if you are using TPS73643DBVR or ABLIC S-1200B43-M5T1U, populating R1,R2,C7 is only for a ADJ-regulator to achieve 4V3.
For A2000 and ribbon cable use you can solder a 44 pin IDE-header like this:
Some MC68SEC000 can be overclocked to 42 MHz and running with only one wait state for the IDE/ATA interface we can reach really good performance:
Flashing a ROM (in this case 3.1.4) to the FlashROM chip U15 (using LIV2's excellent sfflash-tool) and closing JP9 even better performance can be achieved:
Demo video:
https://drive.google.com/file/d/1dCBK24LUC5VLB2dshrW_5n82D2emHB5-/view?usp=sharing
But for running more stable a few wait states can be added to the IDE/ATA,
https://github.com/jbilander/SF2000-FW/blob/main/rtl/ata.v#L56
resulting in a bit slower IDE:
JTAG-header description:
Happy Hackin'
This work is licensed under a Creative Commons Attribution-ShareAlike 4.0 International License.
| Qty | Value | Footprint | References |
|---|---|---|---|
| 27 | 0.1uF | Capacitor_SMD:C_0603_1608Metric_Pad1.08x0.95mm_HandSolder | C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C33, C34, C35 +11 |
| 22 | 0.1uF | Capacitor_SMD:C_0402_1005Metric_Pad0.74x0.62mm_HandSolder | C51, C52, C53, C54, C55, C56, C57, C58, C59, C60, C61, C62, C63, C64, C65, C66 +6 |
| 9 | 10k | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R19, R20, R21, R22, R23, R24, R25, R26, R27 |
| 7 | 33 | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R2, R3, R4, R5, R6, R7, R8 |
| 6 | 10k_Pack04 | SF2000:RESCAF80P320X160X60-8N | RN1, RN2, RN3, RN4, RN5, RN6 |
| 5 | 0.1uF | Capacitor_SMD:C_0805_2012Metric_Pad1.15x1.40mm_HandSolder | C14, C15, C16, C17, C18 |
| 5 | 10uF | Capacitor_SMD:C_1206_3216Metric_Pad1.42x1.75mm_HandSolder | C3, C4, C5, C7, C8 |
| 4 | 5k1 | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R15, R16, R17, R18 |
| 4 | BT_Push | SF2000:Sunrom_Tactile_Switch_3x4x2mm_SMD_2-Pin | BT1, BT2, BT3, BT4 |
| 3 | 4.7uF | Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder | C9, C10, C11 |
| 3 | Conn_01x02 | Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical | J2, J6, J11 |
| 3 | Conn_02x01 | Connector_PinHeader_2.54mm:PinHeader_2x01_P2.54mm_Vertical | J7, J9, J13 |
| 2 | 0.01uF | Capacitor_SMD:C_0603_1608Metric_Pad1.08x0.95mm_HandSolder | C47, C48 |
| 2 | 15pF | Capacitor_SMD:C_0603_1608Metric_Pad1.08x0.95mm_HandSolder | C49, C50 |
| 2 | 1k | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R12, R13 |
| 2 | 27 | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R9, R10 |
| 2 | 74LVC8T245PW,118 | Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm | U14, U15 |
| 2 | SN74CBT16211 | Package_SO:TSSOP-56_6.1x14mm_P0.5mm | U4, U5 |
| 2 | USB_C_Receptacle_USB2.0 | Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12 | J14, J16 |
| 1 | 0.1uF | Capacitor_SMD:C_0805_2012Metric_Pad1.18x1.45mm_HandSolder | C19 |
| 1 | 0.22uF | Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder | C13 |
| 1 | 0.47uF | Capacitor_SMD:C_1206_3216Metric_Pad1.42x1.75mm_HandSolder | C12 |
| 1 | 100uF | Capacitor_SMD:CP_Elec_6.3x7.7 | C1 |
| 1 | 10M02SCU324C8G | Package_BGA:BGA-324_15.0x15.0mm_Layout18x18_P0.8mm_Ball0.5mm_Pad0.4mm_NSMD | U8 |
| 1 | 10uF | Capacitor_SMD:C_1206_3216Metric_Pad1.33x1.80mm_HandSolder | C6 |
| 1 | 22 | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R1 |
| 1 | 22uF | Capacitor_SMD:CP_Elec_5x5.8 | C2 |
| 1 | 3.3uH | SF2000:AOTAB201610S3R3101T | L1 |
| 1 | 330 | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R11 |
| 1 | 4.7k | Resistor_SMD:R_0603_1608Metric_Pad0.98x0.95mm_HandSolder | R14 |
| 1 | 68000D | SF2000:QFP-64_14x14mm_Pitch0.8mm | U10 |
| 1 | 74HCT2G14GV,125 | Package_SO:TSOP-6_1.65x3.05mm_P0.95mm | U12 |
| 1 | 74LVC1G57GV | Package_SO:TSOP-6_1.65x3.05mm_P0.95mm | U17 |
| 1 | ABLIC S-1132B43-M5T1U | Package_TO_SOT_SMD:SOT-23-5 | U2 |
| 1 | ABM8-272-T3 | Crystal:Crystal_SMD_Abracon_ABM8G-4Pin_3.2x2.5mm | Y1 |
| 1 | AS4C16M16SA-6BIN | SF2000:BGA54C80P9X9_800X800X120 | U11 |
| 1 | Conn_01x01 | Connector_PinHeader_2.54mm:PinHeader_1x01_P2.54mm_Horizontal | J10 |
| 1 | Conn_01x03 | Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical | J5 |
| 1 | Conn_01x06 | Connector_PinHeader_2.54mm:PinHeader_1x06_P2.54mm_Vertical | J15 |
| 1 | Conn_02x02_Odd_Even | Connector_PinHeader_2.54mm:PinHeader_2x02_P2.54mm_Vertical | J4 |
| 1 | Conn_02x05_Odd_Even | Connector_PinHeader_2.54mm:PinHeader_2x05_P2.54mm_Vertical | J3 |
| 1 | Conn_02x11_Odd_Even | Connector_PinHeader_2.00mm:PinHeader_2x11_P2.00mm_Vertical | J12 |
| 1 | Conn_2Rows-86Pins_even_odd | SF2000:A500_86pin_Edge_Connector | J1 |
| 1 | ESP32-C5-WROOM-1U-N8R8 | SF2000:ESP32C5WROOM1UN8R8 | U13 |
| 1 | LM1117-3.3 | Package_TO_SOT_SMD:SOT-223 | U1 |
| 1 | LOGO | SF2000:Parachute | G*** |
| 1 | LOGO | SF2000:Spitfire2 | G*** |
| 1 | LOGO | SF2000:Falcon | G*** |
| 1 | LOGO | SF2000:Wings | G*** |
| 1 | LOGO | SF2000:Eagle | G*** |
| 1 | LOGO | SF2000:Fokker_plane | G*** |
| 1 | LOGO | SF2000:Spitfire | G*** |
| 1 | LOGO | SF2000:Hot-Air-Balloon | G*** |
| 1 | Micro_SD_Card_Socket | SF2000:GCT-MEM2055-00-190-01-A | J8 |
| 1 | Oscillator_5.0x3.2mm | Oscillator:Oscillator_SMD_SeikoEpson_SG8002LB-4Pin_5.0x3.2mm | X1 |
| 1 | RP2354A | SF2000:SC150913A4 | U16 |
| 1 | SN74CBT3244PW | Package_SO:TSSOP-20_4.4x6.5mm_P0.65mm | U6 |
| 1 | SN74LVC16245ADGGR | Package_SO:TSSOP-48_6.1x12.5mm_P0.5mm | U7 |
| 1 | TDB04H0SB1R | SF2000:TDB04H0SB1 | S1 |
| 1 | TLV75533PDBVR | Package_TO_SOT_SMD:SOT-23-5_HandSoldering | U3 |
| 1 | W25Q16JVSNIQ | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U9 |
The 154 most common of 160 parts.
It measures 111.5 × 83.9 mm and has 4 copper layers, 1.6 mm thick.
160 parts, built around the 10M02SCU324C8G, RP2354A, ESP32-C5-WROOM-1U-N8R8 and W25Q16JVSNIQ. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the jbilander/SF2000 repository on GitHub, at the commit this page was made from: the board is KiCad/SF2000.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Its repository publishes it under the CC-BY-SA-4.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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