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2 layers48 × 36 mmFault strapping pin, the printed circuit board in 3D

Fault strapping pin

hash066/siliconsmith

Agents that design hardware, and prove it. Prompt-first workstation (Matter, Board, Silicon) on Nemotron + Nebius Token Factory and Sandboxes. Open-source pip package, CLI and MCP server. Live demo, no sign-up.

Size
48 × 36 mm
Copper layers
2
Thickness
1.6 mm
Parts
21
Nets
13
Pads
132
Tracks, vias
180, 81
Pours
6
Routed
Yes
KiCad
KiCad 7 (file 20221018)
Created
21 Oct 2026
Updated
30 Oct 2026

Overview

Fault strapping pin is an open-source printed circuit board by hash066, from the hash066/siliconsmith repository on GitHub, published under the Apache-2.0 licence. It is a 2-layer board of 48 × 36 mm with 21 parts on 13 nets, routed with 180 tracks and 81 vias.

Its parts include 7 resistors, 6 capacitors, 4 ICs, 2 connectors and 1 diode. It belongs with the ESP32 boards of this library.

README

README.md

Hardwright

Agents that design hardware, and prove it.

Hardwright demo: type a prompt, get a checked heat sink, a routed board and a proven CPU instruction

Click the animation to watch the full demo video on YouTube.

Try it, no sign-up · Watch the demo · Use it from your agent · Feedback on Nebius · Model comparison

License Nemotron Nebius MCP pip

Hardwright is a workstation for people who make hardware: describe a heat sink, a sensor board or a slow loop in plain words, and a Nemotron agent builds it. Every claim it makes has to pass a checker it cannot argue with, so you get a part, a board or an instruction you can open in a real tool, plus the evidence for it. It also ships as an open-source Python package, command-line tool and MCP server so any coding agent can use the same checkers.

Built for the Nebius x NVIDIA Global AI Hackathon (Coding and Agentic Engineering) · Apache-2.0

bash
pip install "hardwright[matter] @ git+https://github.com/hash066/siliconsmith#subdirectory=engine"
claude mcp add hardwright -- hardwright mcp        # or: codex mcp add ... / Cursor / VS Code (see /connect)
hardwright board check --template fault_gpio12_vs_gpio14     # exit 1: the firmware uses a boot-strapping pin

Three workbenches, one idea

The idea: an AI may say what it likes, but it may only claim what a deterministic verifier returned. Each workbench ends in something you can open in a real tool, and each result carries the tool, the version and the verdict behind it.

WorkbenchYou sayYou getVerified by
Board"A battery ESP32 sensor board with a BME280 and USB-C charging; check it against its firmware."A routed 2-layer KiCad board you can zoom, a schematic, a report card, Gerbers, KiCad file, BOM, pick-and-place. The wrong pin is marked on the pad.Five netlist checks (B1 to B5: well formed, electrical rules, bus rules, firmware pins vs netlist and boot-strapping hazards, battery estimate), KiCad 7 design-rule check, the autorouter's completion
Matter"A heat sink for a 5 W chip, 40 mm square, under 70 C."A 3D part coloured by temperature, a printable STL, and a side-by-side with plain fins that use the same materialA finite-volume solver validated on analytic cases, an independent finite-element solver, printability rules, equal-material baselines (M1 to M5)
Silicon"Make this loop faster with a custom RISC-V instruction."A new instruction written live: Verilog, C intrinsic, rewritten kernel, a circuit view of the hardware, a waveform on real operand pairs, a before/after loopVerilator lint, 1,000,000 test vectors, a Yosys SAT proof for every possible input, whole-program output check, cycle count and area

Around them: a chat agent (Nemotron 3 Ultra, Super and Nano on Nebius Token Factory, with native tool calling) that performs actions in the app and reports what it spent; projects (each workbench is a folder of projects with its own chat and settings); a Workflow tab that shows every project as connected steps with their real status; a Verified-by ledger on every Proof tab; one-click zip of a project; and $0.50 of demo credit per visitor from a $25 pool.

See it

MatterBoard
Matter: a real thermal solverBoard: placed, routed and checked
Board, catching a mistakeSilicon
The checker catches GPIO12 vs GPIO14Silicon: a proven RISC-V instruction

What is real

Everything below ran for real and is reproducible; numbers are from the run logs and the test suites.

  • Board. The three example boards (clean, wiring fault, strapping-pin fault) route fully with 0 KiCad errors (15 silkscreen warnings), 48 × 36 mm. Boards for any design are made on request in a Token Factory Sandbox that has KiCad, Java and Freerouting: a custom design routed in 107 s with 0 errors, measured on the public site. Placement is deterministic code (not a model), so a board is reproducible. Pin tables are cross-checked against KiCad's own symbol library. The checker is tested against a catalogue of 8 injected wiring faults.
  • Silicon, live. A real run on the public site: Nemotron Ultra proposes, Super implements, a Sandbox proves it. TinyMaix int8 dot product: 3.32× fewer cycles for +4.8% area (another run 2.69×), about 2 minutes and $0.04 of model tokens; ChaCha20: 1.14×. The recorded 20-minute full searches (with clock-speed estimates) reached 4.04× cycles / 3.76× wall-clock on TinyMaix (pull request).
  • Matter. Gains over an equal-material plain-fin plate are small and we say so: +0.1 to +0.5 K in the recorded evaluations, and the app will show a loss ("1.3 K hotter than plain fins") rather than hide it.
  • Tests. Engine 640 passed (14 skipped), web 339 passed, axe accessibility 0 violations, layout shift 0.03, strict first-time-user pass in docs/EVALUATION.md.

Honest limits

  • The board check is netlist level. It does not prove a board works; the routed board is not fabricated or tested electrically. Part facts are author-curated, each with a citation_checked flag. 2 layers, 0.2 mm tracks, 0.15 mm clearance.
  • Matter is 2D steady state with stated constants: not CFD, not a measurement. "Validated" means agreement with analytic cases, nothing more.
  • A live Silicon run skips clock-speed (place and route) so it reports cycles and area, not wall-clock; the recorded searches do include it. The FPGA rung (L6) was not run on a board. Software calls the instruction through inline assembly, not a compiler backend.
  • The agent can be wrong: its answers are checked against the verifiers and say so when a check fails. Rate limits and the shared credit pool are per server instance.
  • Run-to-run variance is real and published: TinyMaix wall-clock across our runs ranged 3.17× to 3.86×.

Use it from your coding agent

The hardwright package (in engine/, Apache-2.0) is offline and free: no model, no network, no API key. Every check answers pass, fail or unknown; only pass is a claim.

python
import hardwright as hw
hw.board_check(template="fault_gpio12_vs_gpio14")["passed"]                       # False (B4)
hw.board_fix_pin(template="fault_gpio12_vs_gpio14", function="wake_btn", pin="GPIO14")["passed"]   # True
hw.matter_simulate(power_w=5, stl_path="heat-sink.stl")["peak_c"]

MCP tools: board_templates, board_get_template, board_check, board_fix_pin, board_parts, matter_simulate. Verified with the official MCP Python client. Setup lines for Claude Code, Codex, Cursor, VS Code and Claude Desktop: hardwright mcp --setup or https://siliconsmith.vercel.app/connect.

How it is built

The big picture

mermaid
flowchart LR
    you([You]) --> web["Next.js app<br/>Vercel"]
    agentx([Claude Code · Cursor · Codex]) -- MCP --> pkg
    term([Terminal]) -- CLI --> pkg
    pkg["hardwright package<br/>offline CLI + MCP server"] --> chk
    web -- "/api proxy" --> api["Python API host<br/>FastAPI on Vercel"]
    api --> chk["Deterministic checkers<br/>board B1 to B5 · Matter solvers · evidence ids"]
    web -- "chat agent" --> nem
    api --> nem["Nemotron on Nebius Token Factory<br/>Ultra · Super · Nano · tool calling"]
    api --> sbx
    subgraph sbx ["Token Factory Sandboxes"]
        base["siliconsmith-base<br/>Verilator · Yosys · RISC-V GCC"]
        kicad["siliconsmith-kicad<br/>KiCad 7 · Java · Freerouting"]
    end
    classDef box fill:#101827,stroke:#3d63d9,color:#fff;
    class web,api,chk,nem,pkg box;

The evidence rule: a model can only claim what a checker returned

mermaid
sequenceDiagram
    autonumber
    actor U as You
    participant A as Nemotron agent
    participant C as Checker (no model)
    participant G as Post-check
    U->>A: Is this board OK to send to fab?
    A->>C: board_check(template)
    C-->>A: pass / fail / unknown + evidence ids
    A->>G: Draft answer with its claims
    G-->>G: Every claim needs an evidence id. Invented commands or runs are flagged
    G-->>U: Answer citing board:fault_gpio12_vs_gpio14#B4
    Note over C,U: Only a pass counts as a claim. Unknown never does.

Silicon: from a prompt to a proven instruction

mermaid
flowchart TD
    p["Prompt: make this loop faster"] --> u["Nemotron Ultra<br/>proposes one custom RISC-V instruction"]
    u --> s["Nemotron Super<br/>writes the Verilog, the C intrinsic, the rewritten kernel"]
    s --> l1["Lint"]
    subgraph box ["Token Factory Sandbox"]
        l1 --> l2["One million test vectors"] --> l3["Formal proof (Yosys SAT) for every input"] --> l4["Whole-program output match"] --> l5["Cycles and area"]
    end
    l5 --> ok["Verified instruction:<br/>RTL, intrinsic, report, evidence ids"]
    l1 -. fail .-> n["Nemotron Nano<br/>triages the log"]
    l2 -. fail .-> n
    l3 -. counterexample .-> n
    l4 -. fail .-> n
    n --> r["Super repairs"] --> l1

Components

  • Nemotron. Ultra is the architect (proposals, diagnosis), Super the engineer (Verilog, C, repairs, the independent spec), Nano triages. Every call is logged with tokens and cost; a chat turn costs about $0.003 to $0.02, a live Silicon run $0.04 to $0.07.
  • Token Factory Sandboxes. Everything model-written (Verilog, C) runs only inside a Sandbox: the live Silicon run, and the routing of every generated board. The full search runs each candidate from its parent's checkpoint image (21 Sandbox runs, up to 8 at once, in the headline run).
  • The evidence rule. A claim in the UI carries an evidence id (part:esp32.gpio12.strapping, board:fault_gpio12_vs_gpio14#B4, run:...). The agent's answers are post-checked: an invented command or a claimed run that did not happen is flagged.
  • Library. evidence/ holds three verified instructions that anyone can re-check with no model: siliconsmith verify-entry dot4-tinymaix.
  • Model choice. A small head-to-head against seven other models on the same endpoint is in docs/MODEL_COMPARISON.md, including where Nemotron is not the best.

Run it locally

Requirements: Python 3.11+, Node 22, and for the full pipelines Linux or WSL2.

bash
pip install -e "engine[matter,dev]"            # the checkers, CLI and MCP server
pytest engine/tests/test_hardwright_pkg.py      # package, CLI and MCP tests (no toolchain needed)
cd web && npm install && npm run dev            # the app; the hosted API is used unless LOCAL_PYTHON_API is set

# the full engine (Silicon search, KiCad layout) needs the toolchain:
sudo bash scripts/setup-toolchain.sh            # Verilator, Yosys, nextpnr, RISC-V GCC
pip install -e "engine[all]" && cp .env.example .env.local     # NEBIUS_API_KEY, NEBIUS_PROJECT_ID
siliconsmith accelerate w1 --backend contree    # the full Silicon search, every candidate in a Token Factory Sandbox
python -m siliconsmith.board.layout.build_sandbox_image         # build the KiCad Sandbox image (once)

Deploy notes, the Sandbox image recipes and every gotcha we hit are in docs/HANDOFF_LATEST.md and docs/feedback.md.

Repository layout

text
engine/hardwright/          the open-source package: Python API, CLI, MCP server
engine/siliconsmith/        board/ (checker, layout, Sandbox routing), matter/ (solver), live/ (live Silicon), search, ladder, backends
engine/tests/               640 tests          engine/scripts/    build_boards.py (precomputes the template boards)
web/                        the app (Next.js)  web/public/boards/ the routed template boards
workloads/ hw/ firmware/    real kernels (TinyMaix, Monocypher), PicoRV32 SoC, runtime
evidence/                   verified instructions (re-checkable without a model)
docs/                       EVALUATION.md (strict evaluation), HANDOFF_LATEST.md, plans, feedback.md, video.md, devpost.md

Related work, and what is new here

Commercial custom-instruction flows (Andes, Cadence Tensilica) build the processor after a human decides the instruction; research agents (CHIA, LACE) implement a described extension; AI circuit-design tools (Flux Copilot and others) generate a design without a verifier that can refuse it. Hardwright puts a deterministic verifier between the model and every claim, across chips (formal proof), boards (KiCad rules plus firmware-versus-datasheet checks) and matter (two independent solvers), and ends each in a file you can open elsewhere.

Licenses

Apache-2.0. Vendored or adapted code keeps its license: PicoRV32 (ISC), TinyMaix (Apache-2.0), Monocypher (BSD-2-Clause or CC0-1.0), KiCad footprints and symbols (CC-BY-SA 4.0 with the library exception) and Freerouting (GPL-3.0, used only as a separate program inside the Sandbox image, never linked or redistributed here).

Parts

21
QtyValueFootprintReferences
310uCapacitor_SMD:C_0603_1608MetricC101, C102, C103
24.7kResistor_SMD:R_0603_1608MetricR1, R2
24u7Capacitor_SMD:C_0603_1608MetricC105, C106
25.1kResistor_SMD:R_0603_1608MetricR5, R6
1100nCapacitor_SMD:C_0603_1608MetricC104
110kResistor_SMD:R_0603_1608MetricR3
12kResistor_SMD:R_0603_1608MetricR7
1330Resistor_SMD:R_0603_1608MetricR4
1BME280-class humidity/pressure/temperature sensorPackage_LGA:Bosch_LGA-8_2.5x2.5mm_P0.65mm_ClockwisePinNumberingU3
1ESP32-WROOM-32-class moduleRF_Module:ESP32-WROOM-32U1
1Generic 3.3 V LDO (reference class, author-defined values)Package_TO_SOT_SMD:SOT-23U2
1LED (placeholder)LED_SMD:LED_0603_1608MetricD1
1Li-ion cell connector (placeholder)Connector_JST:JST_PH_B2B-PH-K_1x02_P2.00mm_VerticalJ2
1MCP73831-class single-cell Li-ion charger (SOT-23-5)Package_TO_SOT_SMD:SOT-23-5U5
1Push button (placeholder)Button_Switch_SMD:SW_SPST_TL3342SW1
1USB-C receptacle, power only (placeholder)Connector_USB:USB_C_Receptacle_HRO_TYPE-C-31-M-12J1

Questions

How big is the Fault strapping pin PCB?

It measures 48 × 36 mm and has 2 copper layers, 1.6 mm thick.

What parts does the Fault strapping pin use?

21 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.

Where can I download the Fault strapping pin KiCad files?

From the hash066/siliconsmith repository on GitHub, at the commit this page was made from: the board is web/public/boards/fault_strapping_pin/routed.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.

Can I use the Fault strapping pin design in my own project?

Its repository publishes it under the Apache-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).

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