Splitflap driver

KiCad Routing Tools

A fast Rust-accelerated A* autorouter for KiCad PCB files. Compatible with KiCad 9 and KiCad 10. Available as both a KiCad Plugin with full GUI and a Command-Line Interface for scripting and automation.

📊 Project metrics — installs, downloads and traffic, updated daily.

Free and MIT-licensed. Donations cover the ~$500/month of cloud compute and AI development behind it.
Also via GitHub Sponsors or PayPal — see Support.

Contents

• Support — donate via Ko-fi, GitHub Sponsors or PayPal
• Features
• Quick Start
• KiCad Plugin — GUI, the AI Drive tab (routing and placement), installation
• Command-Line Interface — routing, planes, verification
• Documentation — full guide for every feature
• Project Structure & Module Overview
• Performance
• Command Reference — options per tool (full list: --help / configuration.md)
• Project metrics — installs, downloads and traffic
• Requirements · Limitations · Contributing · License

Support

KiCadRoutingTools is free and MIT-licensed, and it stays that way — there is no paid tier, no feature held back, and nothing in this repository is paywalled.

Donations go to what it costs to build and maintain it: about $500/month of cloud computing and AI-assisted development.

The compute is not incidental. Every change to the router is A/B-tested by replaying a corpus of real open-source boards on rented cores and grading each one for DRC violations and unconnected nets, and the ~770-file test suite fans out the same way. It is what stops a change that helps one board from quietly breaking ten others.

• ☕ Donate on Ko-fi — card or PayPal, no account needed.
• GitHub Sponsors — one-time or monthly, billed with any other projects you sponsor.
• Prefer PayPal directly? paypal.me/DrAndyHaas (the sender needs a PayPal account).

A donation buys no priority support and unlocks no features. If you would rather contribute something worth more than money, route one of your own boards and file an issue for whatever breaks — see Contributing.

Features

Fast, grid-based A* routing with a native Rust core (~10× faster than pure Python): octilinear (H/V/45°) multi-layer routing with automatic vias, and batch routing with incremental obstacle caching. Highlights below link to the full deep-dive docs.

Core routing

• Rust-accelerated A* pathfinding, multi-layer with automatic via insertion
• Rip-up and reroute — progressive N+1 blocker analysis, ripped-corridor avoidance
• Net ordering strategies — MPS (crossing-aware), inside-out, original, or bus-first, with MPS layer swaps
• Stub layer switching, vertical track alignment, turn-cost straightening
• Board-edge (Edge.Cuts arcs/cutouts), keep-out rule areas, and auto BGA exclusion zones — see Configuration
• Direction-aware stub / BGA / track proximity penalties

Differential pairs — see Differential Pairs

• Pose-based A* with a Dubins heuristic and adaptive setback angles for orientation-aware centerlines
• Bare-pad, multi-point (3+ terminals), and hybrid (coupled middle + single-ended legs) routing
• Automatic polarity resolution (opt-in pad swaps), U-turn prevention, GND return-via placement
• Electrically-short legs auto-defer to single-ended; per-layer impedance-controlled widths

Power & planes — see Plane Routing and Power Nets

• Wider power-net routing with automatic neck-down at fine-pitch pads
• Plane pours (pads are welded by the route step, #562) and plane layers several nets share (split round spines routed on the layer) with resistance / max-current reporting
• Disconnected-plane-region repair (region joins + pad taps) and GND return-via placement

Signal integrity

• Length matching — trombone meanders, auto DQ/DQS grouping, via-barrel aware
• Time matching — propagation delay, microstrip vs stripline
• Bus routing, plus guide corridors and keep-out zones drawn on a User layer

Placement, fanout & optimization

• Placement by function: parts sorted into functional groups, one objective annealed (place_simple.py) over 12 seeds (6 started scattered, 6 with each group gathered), and a fast route (route.py --quick 2) of the 6 the objective rates best to keep the best (/plan-pcb-placement)
• The design brief — state what the board is FOR, in a sibling the toolchain reads: which connectors are user-facing, which edge each belongs on and where along it
• Parts under other parts — part heights read off the 3D models, so a low part may stand under a module or shield can where it fits; a card in its socket (M.2) or a module on a stacking connector is declared in the brief and moves with its connector, admitting only parts known to fit under it
• Floorplan intent, graded — declare where parts belong and check the board against it, so "the render looks fine" stops being a verdict
• BGA / QFN fanout with decoupling-cap placement cleanup, Hungarian target-swap, and schematic sync

Cleanup & verification — see Utilities

• Post-route copper cleanup reconciled against the connectivity model (no orphaned or ripped-and-not-restored copper), with gap-snap connectors
• KiCad-oracle reconnect — routes the exact links KiCad's own DRC reports as unconnected
• Checkers for DRC, connectivity, orphan stubs, copper hygiene (check_weird.py), and pad geometry

Interfaces

• Full KiCad plugin GUI (KiCad 9 & 10) and a scriptable CLI
• AI assistance — an AI Drive tab that plans an entire routing workflow or places a board by function, per-field "Ask AI" helpers, and datasheet-driven power / high-speed / diff-pair analysis
• Board rendering — fast geometry PNG renderer (route_render.py), placement stills (render_placement.py), a board's power components (render_power.py), and movies of a routing run (route_movie.py, made for every stress run) and of a placement, or the placement skill's whole flow through to the full route (place_movie.py)
• Routing plans as files — save/load a whole routing chain as JSON: build one from a recorded command chain (make_plan.py), run it headless through the real plugin (run_plan.py), or load it in the GUI

Quick Start

1. Get the Code

# Clone with git
git clone https://github.com/drandyhaas/KiCadRoutingTools.git
cd KiCadRoutingTools

Or download the ZIP and extract it.

Commands here use python3. On Windows, use py -3 (or python) if python3 is not found.

2. Install the Rust Router

python3 build_router.py

By default this downloads a prebuilt binary for your OS from the project's GitHub Releases — no Rust toolchain required. Prebuilts are published for:

• Linux x86_64
• macOS arm64 (Apple Silicon)
• macOS x86_64 (Intel)
• Windows x86_64

If a prebuilt isn't available for your platform (e.g. Linux arm64) or the download fails, the script falls back to building locally with cargo.

Building from source (optional)

If you'd rather build locally — or you're on a platform without a prebuilt — install Rust from rustup.rs:

# macOS / Linux
curl --proto '=https' --tlsv1.2 -sSf https://sh.rustup.rs | sh

# Windows: Download and run rustup-init.exe from https://rustup.rs/

After installation, restart your terminal or run source ~/.cargo/env, then:

python3 build_router.py --from-source     # build locally instead of downloading
python3 build_router.py --tag v0.15.0     # download a specific release
python3 build_router.py --clean           # remove all build artifacts

3. Choose Your Interface

Option A: KiCad Plugin (Recommended for interactive use)

# Install the plugin
python3 install_plugin.py

# Then in KiCad: Tools → External Plugins → KiCadRoutingTools

Option B: Claude Code (AI-assisted routing)

Use Claude Code to analyze your PCB and generate a routing plan:

> /plan-pcb-routing kicad_files/my_board.kicad_pcb

Claude will:

• Analyze your board structure and identify components needing fanout (BGA/QFN/PGA)
• Detect differential pairs and DDR signals requiring length matching
• Identify power/ground nets and recommend plane vs trace routing
• Assess signal speeds and recommend GND return via placement
• Generate a step-by-step routing plan with explanations
• Run the commands and verify results

Other useful skills:

> /find-high-speed-nets kicad_files/my_board.kicad_pcb       # Identify high-speed nets via datasheet lookup
> /analyze-power-nets kicad_files/my_board.kicad_pcb         # Identify power nets and track widths
> /identify-diff-pairs kicad_files/my_board.kicad_pcb        # Find diff pairs by pin function, recommend gap/impedance
> /recommend-stackup kicad_files/my_board.kicad_pcb          # Stackup advice for impedance/time-matching accuracy
> /recommend-plane-mappings kicad_files/my_board.kicad_pcb   # Which nets get planes, on which layers
> /diagnose-routing-failures my_board.kicad_pcb /tmp/route_output.txt  # Root-cause failed routes, get a retry command
> /review-routed-board my_board_routed.kicad_pcb             # Post-route QA: DRC, connectivity, length match, GND vias
> /plan-pcb-placement full kicad_files/my_board.kicad_pcb    # Group, place 12 seeds, fast-route the 6 cheapest, keep the best, route end to end

See Claude Skills for what each skill does and how they fit together.

All of these are also available inside KiCad without leaving the plugin - see AI assistance in the plugin below. The plugin can run the analysis and routing skills through opencode instead of Claude Code (issue #503) - a Backend dropdown on the AI Drive tab selects the agent CLI, and opencode's provider/model strings open the door to other model providers. The placement runs need Claude Code, because they write files and opencode's analysis agent may not. The skills' output contracts are tuned on Claude models; smaller models may follow them less reliably.

Option C: Manual Command Line (For scripting and automation)

# Optionally place the board first, by its functional groups (see py_placer/placement/README.md)
python3 py_placer/place_simple.py my_board.kicad_pcb placed.kicad_pcb --groups groups.json --intent intent.json

# Pour the planes FIRST (#562): the fanout's plane-drop vias then land on
# real fill, and the route step welds plane pads into it.
python3 py_router/route_planes.py my_board.kicad_pcb poured.kicad_pcb --nets GND --plane-layers B.Cu

# Fan out a BGA, then tidy decoupling caps off the new vias (issue #130)
python3 py_router/bga_fanout.py poured.kicad_pcb -c U1 -o fanned.kicad_pcb --clearance 0.1
python3 py_placer/place_fanout_clearance.py fanned.kicad_pcb capclean.kicad_pcb --clearance 0.1

# Route differential pairs (the output is positional: route_diff's -o is --ordering)
python3 py_router/route_diff.py capclean.kicad_pcb diffed.kicad_pcb --nets "*lvds*"

# Route ALL remaining nets, plane nets included (their widths via --power-nets).
# This step ends with the in-run plane finalize that completes the planes.
python3 py_router/route.py diffed.kicad_pcb routed.kicad_pcb --nets "*" \
    --power-nets GND --power-nets-widths 0.3

KiCad Plugin

The plugin provides a full graphical interface for all routing features, running directly within KiCad 9 or 10.

AI assistance (AI Drive tab)

With Claude Code or opencode installed, the routing dialog gains AI assistance throughout (the plugin spawns the selected agent CLI headless, streams a live transcript, and fills GUI controls from the results). The Backend dropdown on the AI Drive tab picks the CLI: Claude Code runs Anthropic models; opencode takes provider/model strings for many providers (including its built-in free tier), with opencode auth login adding provider accounts. Both discover the same .claude/skills/; opencode runs them under a read-only pcb-analysis agent defined in opencode.json (the equivalent of the Claude run's read-only tool allowlist). Neither grants a dedicated write tool, though both grant Bash, so neither is a sandbox — the allowlist states intent, and --allowedTools auto-approves rather than restricts. Both can dispatch a subagent, so an analysis skill can hand its close-out to an independent verifier (#552): the Claude allowlist grants the dispatch tool per run, and the pcb-analysis agent grants opencode's task tool in opencode.json. A caller asking opencode for a tool set naming Write/Edit is refused rather than silently downgraded.

The tab has two sub-tabs:

• Routing - Plan Routing runs /plan-pcb-routing: the plan fills the parameter fields across the tabs and appears as a checkable step list, which Run Selected Steps executes sequentially in-process on the live board with per-step status marks. Review Routed Board and Diagnose Routing Failures give post-route QA and failure root-causing. Backend, model, and effort selectors control every AI run and persist with the dialog settings (model/effort remembered per backend).
• Placement - Place (AI) and Place + Route (AI) run /plan-pcb-placement place / full headless into a krt_placement/ folder beside the board. The tab shows the seed candidates with a preview, a status line read from the run's milestone ledger, and at the end REPORT.md; Apply Result to Board moves the open board's parts to the result's poses and locks (and, after Place + Route, its routed copper). These two need Claude Code. Beautify Labels (no AI) tidies the reference-designator silkscreen (py_placer/beautify_labels.py).
• Save / Load a plan - Save… writes the generated step list to a JSON file; Load… reads one back and runs it with no Claude call — handy for replaying a workflow that worked on another board. A recorded command chain converts to a loadable plan too (python3 py_router/make_plan.py <run dir>; see Plans from the command line).
• Per-field "Ask AI" buttons - power nets/widths (Route tab), stackup check (Layers), differential-pair verification by pin function (Differential tab), net-to-plane layer mappings and GND return via distance (Planes tab).

The full button-to-skill map is in Claude Skills - Plugin GUI Integration. Datasheet-based skills use web lookups and take a few minutes; every run shows a live transcript with cancel.

Installation

Three ways to install:

A. KiCad Plugin and Content Manager (PCM) — the recommended path for end users, and it needs no extra repository URL: the package has been in the official KiCad repository (the one KiCad ships with, gitlab.com/kicad/addons) since v0.15.6. Open the PCM from the KiCad main window, leave the repository dropdown on KiCad official repository, go to the Plugins tab, search for routing, select KiCad Routing Tools and click Install, then Apply Changes at the bottom. If it is not listed, the PCM is serving a cached catalogue — press Refresh and look again. Versions are published with status testing rather than stable, which the PCM shows in the Status column but does not hide or block; kicad_version is a minimum, so the 9.0 entry installs on KiCad 10 as well. On first launch, the plugin checks the Python packages listed in requirements.txt (numpy, scipy, shapely, and the optional Pillow, without which only board renders and the placement preview are off) and offers a one-click pip install for any that are missing or too old into KiCad's Python. Do not assume KiCad supplies them: what it bundles varies by version and platform, and KiCad 10 on macOS ships no numpy at all. The check reports the version and the file path the running interpreter imports — KiCad's Python is often not the one pip show numpy answers for in a terminal.

B. PCM "Install from File…" using the release zip — for a release newer than the one the official catalogue currently carries, for a pinned older version, or for an offline machine. Each GitHub Release ships a ready-to-install PCM package zip named KiCadRoutingTools-<version>.zip (a single cross-platform archive bundling the prebuilt Rust binaries for all platforms — not the auto-generated "Source code (zip)"). To install it:

1. From the Release's Assets, download KiCadRoutingTools-<version>.zip (e.g. KiCadRoutingTools-0.15.13.zip).
2. In KiCad, open Plugin and Content Manager from the main window.
3. Click Install from File… (bottom of the PCM dialog) and select the downloaded zip.
4. Click Apply Pending Changes, then restart KiCad if prompted.

The plugin appears under Tools → External Plugins in the PCB Editor. The same first-launch scipy/shapely dependency check described in (A) applies. This path keeps the plugin manageable from the PCM (you can update or uninstall it there), unlike the manual install below.

C. Manual install from source — for development or for using the CLI tools as well:

# Install the plugin (copies to KiCad plugins directory)
python3 install_plugin.py

# For development: create symlink instead of copying
python3 install_plugin.py --symlink

# Remove the plugin
python3 install_plugin.py --uninstall

# Skip installing the Python dependencies
python3 install_plugin.py --no-deps

The installer installs into every KiCad version it finds (version directories and install roots are discovered, not taken from a fixed list), under:

• macOS: ~/Documents/KiCad/<version>/3rdparty/plugins/
• Linux: ~/.local/share/kicad/<version>/3rdparty/plugins/
• Windows: ~/Documents/KiCad/<version>/3rdparty/plugins/

The installer also installs requirements.txt into KiCad's Python with pip, and skips pip when that Python already has everything. On Linux, KiCad runs the system Python, which Debian 12+, Ubuntu 23.04+, Fedora 38+ and Arch mark as externally managed (PEP 668) so pip refuses to install into it; there the installer runs no pip and prints the apt / dnf / pacman command for whatever is missing, plus the explicit --break-system-packages override for a package your distribution does not carry.

If you previously installed this plugin through the Plugin & Content Manager, that copy sits next to the local install and would shadow it on sys.path (causing stale-code errors). The installer detects any such PCM copy and moves it aside to <kicad-base>/disabled_pcm_plugins/<version>/, leaving it recoverable. Pass --keep-pcm to skip this.

Releasing a new version (maintainers)

The full release flow — version bump, GitHub Release, and the merge request to the official KiCad PCM repository — is documented step by step in docs/release-pipeline.md.

Short version:

1. Bump VERSION and the versions[] entry in metadata.json (and rust_router/Cargo.toml only when the Rust crate changed); python3 check_release_version.py --tag vX.Y.Z checks they agree.
2. git tag v0.15.6 && git push --tags — CI builds all 4 platform binaries, packages a single KiCadRoutingTools-<ver>.zip (the PCM validator rejects duplicate version strings, so we ship one cross-platform zip), patches metadata.json with real sha256/size values, and attaches everything to the GitHub Release.
3. Append the new version to the metadata file in your fork of gitlab.com/kicad/addons/metadata and open an MR. See the docs page for the exact commands.

To build a zip locally for testing:

python3 package_pcm.py --binary-dir ./path/to/release/artifacts

Usage

1. Open KiCad (9.0 or later)
2. Open a PCB in Pcbnew
3. (Optional) Select one or more nets in the PCB editor first — for example by clicking tracks/pads, or right-clicking a track and choosing Select → All Tracks in Net. Any nets you have selected are automatically pre-checked for routing when the plugin opens.
4. Go to Tools → External Plugins → KiCadRoutingTools
5. Configure routing parameters and select (or adjust) the nets to route
6. Click Route to run the router

Plugin Tabs

Route Tab:

• Net selection with filtering and component filtering
• Nets selected in the PCB editor before opening the plugin are pre-checked automatically (also applies to the Fanout, Planes, and Differential tabs)
• Option to separate nets by net class (organizes into tabs per class)
• Track width, clearance, via size/drill from net class or manual override; impedance; the fab tier, escalation policy and clearance ceiling (the CLI's --fab-tier, --escalation, --clearance-ceiling)
• Layer selection with per-layer cost multipliers
• Options: stub layer swaps, copper text moving, teardrops, DRC-settings fix, power net widths and neck-down, no-BGA zones, smoothing
• Guide corridor - draw a polyline on a User layer (e.g. User.1) and tick "Follow User-layer guide path" to route the selected nets along it (waypoints, avoiding obstacles, packed non-overlapping)
• Keepout zones - draw one or more closed polygons on a User layer (e.g. User.2) and tick "Keep out of User-layer polygon(s)" to keep routed tracks out of those areas (hard keepout, all routed nets)
• Clear guide/keepout layers - optional "Clear guide layer after routing" / "Clear keepout layer after routing" checkboxes (unchecked by default) delete the drawn guide/keepout graphics from their User layer after a successful route, so you can draw fresh ones for the next run

Advanced options Tab:

• Swappable nets configuration for target swap optimization
• Routing parameters: iterations, heuristic weight, rip-up, probe iterations
• MPS ordering options, direction control, length matching
• Proximity settings: BGA, stub, track, via proximity costs
• Debug options

Differential Tab:

• Differential pair selection with filtering
• Pair width and gap, differential impedance, turning radius, setback angle configuration
• Options: polarity fix, GND vias, intra-pair length matching, AC-coupled end-to-end matching
• Ask AI confirms pairs by pin function

Fanout Tab:

• BGA fanout with exit margin, escape direction, differential pair support, and plane-net ball drops
• Escape method: auto (channel router, under-pad retry), channel, under-pad for dense fully-populated BGAs (issue #122), or dog-bone — see BGA Fanout
• "Optimize decoupling cap placement" option (off by default) — after fanout, nudges decoupling caps off foreign-net fanout vias and toward same-net balls — see Decap Clearance Repair
• QFN fanout with extension length, escape layer, and an under-pad (via-drop) escape
• Net selection for fanout operations

Planes Tab (pour creation only since #562 — plane repair runs inside every route, and the route step welds plane pads into the pour):

• Net-to-layer assignment for power/ground planes (Ask AI recommends one)
• Create the pours (plus thermal via arrays under exposed pads, optional thermal-relief connections)
• Area via stitching, a board-edge via fence, and GND return via placement near signal vias
• Via size/drill, zone clearance configuration

AI Drive Tab — see AI assistance above:

• Routing sub-tab: plan a routing chain with /plan-pcb-routing and run its steps; review and diagnose; save/load plans
• Placement sub-tab: place (and route) the board with /plan-pcb-placement; Beautify Labels

Log Tab:

• Real-time routing output display
• Color-coded messages (errors, warnings, success)

About Tab:

• Version information and credits
• Window transparency, Validate PCB Data (the pcbnew-built board model against the file parser's, reported in the Log tab) and Reset All Settings to Defaults

General Features:

• Settings persistence (parameters and selections preserved between sessions)
• Cancel button to stop routing operations mid-progress
• Results applied directly to the open PCB in KiCad

Command-Line Interface

Net Pattern Syntax

All --nets options support fnmatch-style wildcards and exclusion patterns:

Notes:

• Exclusion patterns (starting with !) remove matching nets from the result
• Order matters: include patterns add nets, exclude patterns remove them
• Nets starting with "unconnected-" are automatically excluded
• Use quotes around patterns with special characters

Route Nets

# Route all nets (default) - outputs to input_routed.kicad_pcb
python3 py_router/route.py kicad_files/input.kicad_pcb

# Route all nets, overwrite input file
python3 py_router/route.py kicad_files/input.kicad_pcb --overwrite

# Route all nets to a specific output file
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb

# Route specific nets (using --nets option)
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets "Net-(U2A-DATA_0)" "Net-(U2A-DATA_1)"

# Route with wildcard patterns
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets "Net-(U2A-DATA_*)"

# Route all nets on a component (auto-excludes GND/VCC/VDD/unconnected)
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --component U1

# Route specific patterns on a component (no auto-exclusion)
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets "/DDAT*" --component U1

# Route ALL nets on a component including power (use "*" pattern)
python3 py_router/route.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets "*" --component U1

Create Power/Ground Planes

# Pour a GND zone on B.Cu (outputs to input_routed.kicad_pcb). The pour places no
# per-pad taps: the route step that follows welds the plane pads into it (#562)
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --nets GND --plane-layers B.Cu

# Create GND zone, overwrite input file
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --overwrite --nets GND --plane-layers B.Cu

# Create GND zone to specific output file
python3 py_router/route_planes.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb --nets GND --plane-layers B.Cu

# Create multiple planes at once (each net paired with corresponding plane layer)
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --nets GND +3.3V --plane-layers In1.Cu In2.Cu

# VCC plane; --via-size/--via-drill size this step's own vias (thermal arrays, stitching)
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --nets VCC --plane-layers In2.Cu --via-size 0.5 --via-drill 0.4

# Multiple nets sharing one layer, split round spines routed on it (use | separator)
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --nets GND "VA19|VA11" --plane-layers In4.Cu In5.Cu

# Dry run to see what would be placed
python3 py_router/route_planes.py kicad_files/input.kicad_pcb --nets GND --plane-layers B.Cu --dry-run

GND return vias (--add-gnd-vias) and area stitching (--stitch-vias, --stitch-edge-fence) go in a re-run of the same pour after routing, so they place around the finished signals, and a return via needs GND poured on two layers — see Plane Routing.

Repair Disconnected Plane Regions

Since #562 you normally do not run this step. Every route.py run finishes with an in-run plane finalize that applies this same engine (pad taps + region joins), the plane-copper cleanup, and a KiCad-oracle completion check — so a pours-first chain repairs its planes automatically. KICAD_PLANE_FINALIZE=0 is the kill switch. The finalize runs even when the route step finds nothing else to route (#1112), so a chain should end on route.py, never on this script. Use the standalone script below for a board routed OUTSIDE that chain (e.g. hand-edited copper); its track and via default to the board's Default net class, not to the sizes a chain routed at, so pass --track-width / --via-size / --via-drill if they differ.

After creating power planes, regions may become split by vias and traces from other nets. Use repair_planes.py to reconnect them:

# Auto-detect all zones in PCB and repair disconnected regions (outputs to input_routed.kicad_pcb)
python3 py_router/repair_planes.py kicad_files/input.kicad_pcb

# Auto-detect all zones, overwrite input
python3 py_router/repair_planes.py kicad_files/input.kicad_pcb --overwrite

# Auto-detect all zones to specific output file
python3 py_router/repair_planes.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb

# Specific nets and layers
python3 py_router/repair_planes.py kicad_files/input.kicad_pcb --nets GND --plane-layers B.Cu

# Customize track width and clearance
python3 py_router/repair_planes.py kicad_files/input.kicad_pcb kicad_files/output.kicad_pcb \
    --track-width 0.5 --clearance 0.2

Review a Placement

Placement deltas are invisible in a board file; render them instead.

# what moved, and did it help? (ghosts at the seed poses, arrows, metrics caption)
python3 py_tools/render_placement.py placed.kicad_pcb --before seed.kicad_pcb -o delta.png

# zoom to one placement block; same block names as route.py --group
python3 py_tools/render_placement.py board.kicad_pcb --list-groups --group-by sheet
python3 py_tools/render_placement.py board.kicad_pcb --zoom-group sheet:58d913ec --per-side -o out/

# everything a placement author reads, in one artifact: escape lanes, groups, and
# lock advice (which parts should NOT move) -- locks nothing, writes no board
python3 py_tools/board_brief.py board.kicad_pcb

Toggles for --borders / --labels / --ratsnest / --arrows / --ghosts; --per-side gives F and B panels rather than one flattened projection. The render is triage, and so are the caption's crossings / hpwl: a placement is judged by routing it.

Verify Results

# Check for DRC violations. With no -c, grades at the Default net-class clearance
# the routing steps wrote into the sibling .kicad_pro (the clearance the board was
# routed to), plus the board's .kicad_dru layer rules; falls back to 0.2mm if
# there's no project. Pass -c to override.
python3 py_router/check_drc.py kicad_files/output.kicad_pcb

# Cross-check with KiCad's own DRC engine (requires KiCad; --refill-zones avoids
# bogus zone-clearance errors from stale pours - see tests/README.md for details)
kicad-cli pcb drc --refill-zones --format json -o drc.json kicad_files/output.kicad_pcb

# ...because a routed board ships zone OUTLINES with no filled_polygon, so an
# unrefilled grade reports plane opens that are not real (#910). To ship a
# board that already carries its fills, add --write-fill to the route step, or:
python3 py_tools/fill_for_delivery.py kicad_files/output.kicad_pcb -o delivered.kicad_pcb

# Check connectivity (detects unrouted nets, broken routes, and T-junctions)
python3 py_router/check_connected.py kicad_files/output.kicad_pcb

# Check connectivity for specific nets
python3 py_router/check_connected.py kicad_files/output.kicad_pcb --nets "*DATA*"

# Check connectivity for all nets on a component
python3 py_router/check_connected.py kicad_files/output.kicad_pcb --component U1

See Utilities for every checker and its options, and python3 krt_registry.py for every runnable tool in the clone with its purpose.

Power Net Analysis

Use the /analyze-power-nets skill to identify power nets and get track width recommendations:

# Ask the AI to analyze your board with datasheet lookup
/analyze-power-nets kicad_files/my_board.kicad_pcb

The skill:

1. Auto-classifies obvious components (resistors, capacitors, inductors, etc.)
2. Uses WebSearch to look up datasheets for unknown components (ICs, connectors, transistors)
3. Classifies each component's role (power source, current sink, pass-through, shunt)
4. Traces power paths from sinks to sources
5. Generates ready-to-use --power-nets configurations

See Power Net Analysis for detailed documentation.

High-Speed Net Analysis

Use the /find-high-speed-nets skill to identify high-speed nets and get GND return via recommendations:

# Ask the AI to analyze signal speeds with datasheet lookup
/find-high-speed-nets kicad_files/my_board.kicad_pcb

The skill:

1. Pre-classifies nets by name patterns (DDR, USB, SPI, CLK, etc.)
2. Pre-classifies components by footprint (FPGA, DDR, PHY, etc.)
3. Uses WebSearch to look up datasheets for ICs and extract max clock rates and rise times
4. Traces high-speed signals through series passives (termination resistors, AC coupling caps)
5. Generates a speed classification (ultra-high/high/medium/low) with recommended --gnd-via-distance

The /plan-pcb-routing skill includes a lightweight version of this analysis (net name and footprint pattern matching only, no datasheet lookup) and automatically includes a GND return via step when GND planes are present. Run /find-high-speed-nets first for more accurate recommendations based on actual component specifications.

Integration Tests

# Run full integration test (fanout + routing + checks)
python3 tests/test_fanout_and_route.py --all

# Quick mode for faster testing
python3 tests/test_fanout_and_route.py --all --quick

# The whole suite (~770 files, about 40 minutes on one machine when last measured)
python3 tests/run_all.py

See tests/README.md for detailed documentation of all test scripts.

Documentation

Project Structure

KiCadRoutingTools/
├── py_router/                # Routing engine + CLI entry points (~130 modules)
│   ├── route.py                  # Main CLI - single-ended routing (ends with the in-run plane finalize, #562)
│   ├── route_diff.py             # Main CLI - differential pair routing
│   ├── route_planes.py           # Main CLI - power/ground plane pours
│   ├── repair_planes.py          # Standalone utility - repair disconnected plane regions (the chain step is absorbed into route.py's finalize, #562)
│   ├── route_render.py           # PNG still of a board from its geometry
│   ├── route_movie.py            # Movie of a routing run, step by step (route_trace.py records the router's events)
│   ├── make_plan.py              # Recorded command chain -> GUI routing plan (plan.json)
│   ├── run_plan.py               # Run a GUI routing plan headless, through the real plugin dialog
│   ├── autoplan.py               # Build a routing chain from the board itself and run it, no agent
│   ├── add_rule_area.py          # Write a copper keep-out rule area onto a board
│   ├── plane_io.py               # Plane I/O utilities (zone extraction, output writing)
│   ├── plane_obstacle_builder.py # Obstacle map building for plane via placement
│   ├── plane_blocker_detection.py # Blocker detection and rip-up for plane vias
│   ├── plane_zone_geometry.py    # Voronoi cells for a shared plane layer's split
│   ├── plane_split_raster.py     # Raster finishing of a shared plane layer's split
│   ├── plane_resistance.py       # Plane resistance and current capacity calculations
│   ├── plane_region_connector.py # Detect and route between disconnected plane regions
│   ├── routing_config.py         # GridRouteConfig, GridCoord, DiffPairNet classes
│   ├── routing_defaults.py       # Default routing parameter values
│   ├── routing_state.py          # RoutingState class - tracks routing progress
│   ├── routing_common.py         # Shared utilities for route.py and route_diff.py
│   ├── obstacle_map.py           # Obstacle map building functions

Module Overview

One-line summaries below (all of these modules live in py_router/); the Python API documentation has full per-module references (signatures, dataclass fields, gotchas) with runnable examples.

Core Routing

Routing Loops

Net Analysis

Key functions in net_queries.py:

• identify_power_nets(pcb, patterns, widths) - Pattern-based power net detection for --power-nets CLI option
• compute_mps_net_ordering(pcb, net_ids) - MPS algorithm for optimal net ordering
• find_differential_pairs(pcb, patterns) - Detect P/N pairs from net names (suffix-style aware: +/- nets only pair with each other, never with _P/_N nets sharing the same base name)

Key functions in py_tools/analyze_power_paths.py (used by /analyze-power-nets skill):

• analyze_pcb(filepath) - Load PCB and extract components for analysis
• get_components_needing_analysis(components) - Get components requiring AI classification
• classify_component(components, ref, role, current_rating_ma, notes, supply_nets) - Set component classification (supply_nets names the rails of a part whose pads carry no pintype and whose nets are not rail-named)
• trace_power_paths(pcb, components) - Trace each load upstream (regulators entered output to input only) to the source feeding it
• get_power_net_recommendations(pcb, components, paths) - Get recommended track widths (a sink's rating is charged once per net; a source's rating is a limit, never a load)

Optimization

Recovery, Planes and Post-Route

I/O and Utilities

Performance

Integration test results (tests/test_fanout_and_route.py), as measured when this table was written in January 2026; the router has changed a great deal since, so read them as orders of magnitude:

Rust acceleration provided a ~10x speedup over the original pure-Python A*.

Command Reference

Every tool prints its full option list with --help, and docs/configuration.md is the single source of truth for the flags — defaults, guidance, and which tool each applies to. The tool-specific guides go deeper on their area:

# Full option list for any tool
python3 py_router/route.py --help

# A typical chain (#562 pours-first): pour, then diff pairs, then ONE route
# over ALL nets -- plane nets INCLUDED. The pour places no taps; the route
# step welds plane pads into the fill and its in-run finalize completes them,
# so do NOT exclude the plane nets here.
python3 py_router/route_planes.py board.kicad_pcb board.kicad_pcb --nets GND --plane-layers B.Cu
python3 py_router/route_diff.py board.kicad_pcb -O --nets "*_P" "*_N" --diff-pair-gap 0.15
python3 py_router/route.py board.kicad_pcb -O --nets "*" --power-nets GND --power-nets-widths 0.3

The shared option groups — geometry, power-net widths, algorithm/strategy, proximity penalties, length/time matching, post-route DRC settings, and debug layers — apply across the routing CLIs and are documented in full in Configuration.

Requirements

• Python 3.9+ (the router is built abi3-py39 whether it is downloaded or built from source, so building locally does not lower the floor — on 3.8 the module compiles and then fails to load with symbol not found ... _PyCMethod_New)
• numpy 1.22 or newer (pip3 install "numpy>=1.22") — below 1.22 the stack fails with errors that name neither numpy nor this tool: scipy's "A NumPy version

  =1.22.4 ... is required" and TypeError: 'numpy._DTypeMeta' object is not subscriptable

• scipy (pip3 install scipy) - used for optimal target assignment and Voronoi partitioning
• shapely 2.0 or newer (pip3 install "shapely>=2.0") - polygon operations: multi-net plane layers, the placement courtyard reader
• Pillow (optional, pip3 install Pillow; 10.1+ for full-size caption fonts) - board renders and the placement preview; without it only rendering is off
• pip3 install -r requirements.txt installs all of the above
• Rust toolchain — only needed if you build the router from source (python3 build_router.py --from-source); not required when using the prebuilt binary

Limitations

• No push-and-shove (routes around obstacles, doesn't move them)
• No blind or buried vias
• No coarse grid assignment before detailed routing to plan overall topology
• Area-scoped design rules only as keep-outs: a .kicad_dru rule conditioned on a rule area is honoured as a (net-filtered) disallow keep-out, and per-layer clearance rules are honoured, but an area-scoped clearance or width rule is reported as not honoured

Contributing

The most valuable contribution is routing a board we haven't seen: run /plan-pcb-routing on your own design (or any open-hardware board), grade the result with check_drc.py + check_connected.py, and file an issue for anything that breaks — ideally with a pointer to the board file. Fixes and pull requests for open issues are just as welcome. See CONTRIBUTING.md for the full guide.

License

MIT License