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TPL7407LD on a board, in 3D

TPL7407LD

Texas Instruments

-40℃~+150℃ 1.4V 10nA 10uA 30V 500mA 500nA 5pF MOS Seven channels SOIC-16 Relay / Coil Drivers ROHS

Extended
Category
Gate Drivers
Package
SOIC-16
Pins
16

Overview

The TPL7407LD is a gate Driver made by Texas Instruments in a SOIC-16 package with 16 pins. -40℃~+150℃ 1.4V 10nA 10uA 30V 500mA 500nA 5pF MOS Seven channels SOIC-16 Relay / Coil Drivers ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:TPL7407LAPWR, from EasyEDA) and its footprint (Package_SO:SOIC-16_3.9x9.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 3,387 are in stock at JLCPCB (part C139663). 5 open-source boards in 5 repositories on GitHub use it.

Symbol

IN11IN22IN33IN44IN55IN66IN77GND8COM9OUT710OUT611OUT512OUT413OUT314OUT215OUT116
EasyEDA_Cloud:TPL7407LAPWRFrom EasyEDA

Footprint

12345678910111213141516
Package_SO:SOIC-16_3.9x9.9mm_P1.27mmFrom KiCad's library

From the datasheet

11
Supply, least
8.5 V · COM, recommended operating minimum for full output drive · p. 4
Supply, most
40 V · COM, recommended operating maximum for full output drive · p. 4
Supply, absolute maximum
42 V · COM, absolute maximum · p. 3
Works from
-40 °C · Operating free-air temperature minimum · p. 3
Works up to
125 °C · Operating free-air temperature maximum · p. 3
Junction, hottest
150 °C · Operating virtual junction temperature absolute maximum · p. 3
Takes working
15 µA · COM supply current typical, VCOM = 8.5 V to 40 V · p. 4
Gives
600 mA · Rated drain current maximum per channel · p. 1
Junction to air (SOIC (D))
91.9 K/W · Junction-to-ambient thermal resistance · p. 4
Junction to board (SOIC (D))
49.4 K/W · Junction-to-board thermal resistance · p. 4
Junction to case (SOIC (D))
50.1 K/W · Junction-to-case top thermal resistance · p. 4

What it is and has

6
Driver channels
7, low side, 40 V · p. 1
Logic interface
1.8 V to 5.0 V · p. 1
Input pull-down
1 MΩ, permits tri-stated input drivers · p. 9
Input noise suppression
RC snubber · p. 9
Package
SOIC (16), 9.90 mm x 3.91 mm · p. 1
Output leakage
< 10 nA per channel · p. 1

Around it

2
cap 0.1 µF
between COM and GND; CCOM in the inductive-load design example; bypass capacitance must limit COM slew rate to below 0.5 V/us when needed. · p. 9
res 1 kΩ to 5 kΩ
between Input driver and IN(X); External series input resistor to enhance noise tolerance. · p. 9

Specifications

33
ParameterConditionsAs printedPage
Pins OUT1-OUT7 to GND voltage VOUT25°C free-air temperaturemin -0.3 · max 42 V3
Output Clamp diode reverse voltage VOK25°C free-air temperaturemin -0.3 · max 42 V3
COM pin voltage VCOM25°C free-air temperature; relative to GNDmin -0.3 · max 42 V3
Pins IN1-IN7 to GND voltage VIN25°C free-air temperaturemin -0.3 · max 30 V3
Continuous drain current per channel IDS25°C free-air temperature; subject to power dissipation and junction temperature limitsmax 600 mA3
Output clamp current IOK25°C free-air temperaturemax 500 mA3
Total continuous GND-pin current IGND25°C free-air temperaturemax -2 A3
Operating free-air temperature range TAmin -40 · max 125 °C3
Operating virtual junction temperature TJmin -40 · max 150 °C3
Storage temperature range Tstgmin -65 · max 150 °C3
Electrostatic discharge V(ESD)Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001min -2000 · max 2000 V4
Electrostatic discharge V(ESD)Charged-device model (CDM), per JEDEC specification JESD22-C101min -500 · max 500 V4
OUT1 – OUT7 pin voltage for recommended operation VOUTOver operating temperature rangemin 0 · max 40 V4
COM pin voltage range for full output drive VCOMOver operating temperature rangemin 8.5 · max 40 V4
IN1- IN7 input low voltage ("Off" high impedance output) VILOver operating temperature rangemax 0.9 V4
IN1- IN7 input high voltage ("Full Drive" low impedance output) VIHOver operating temperature rangemin 1.5 V4
Operating virtual junction temperature TJmin -40 · max 125 °C4
Continuous drain current IDSOver operating temperature rangemin 0 · max 500 mA4
Junction-to-ambient thermal resistance θJASOIC (D), 16 PINStyp 91.9 °C/W4
Junction-to-case (top) thermal resistance θJCtopSOIC (D), 16 PINStyp 50.1 °C/W4
Junction-to-board thermal resistance θJBSOIC (D), 16 PINStyp 49.4 °C/W4
Junction-to-top characterization parameter ψJTSOIC (D), 16 PINStyp 18.6 °C/W4
Junction-to-board characterization parameter ψJBSOIC (D), 16 PINStyp 49.1 °C/W4
OUT1- OUT7 low-level output voltage VOL (VDS)TJ = –40°C to 125°C; typical at TA = TJ = 25°C; VIN ≥ 1.5 V; ID = 100 mAtyp 200 · max 320 mV4
OUT1- OUT7 low-level output voltage VOL (VDS)TJ = –40°C to 125°C; typical at TA = TJ = 25°C; VIN ≥ 1.5 V; ID = 200 mAtyp 420 · max 650 mV4
OUT1- OUT7 OFF-state leakage current IOUT(OFF) (IDS_OFF)TJ = –40°C to 125°C; typical at TA = TJ = 25°C; VOUT = 24 V; VIN ≤ 1.0 Vtyp 10 · max 500 nA4
Clamp forward voltage VFTJ = –40°C to 125°C; IF = 200 mAmax 1.4 V4
IN1- IN7 Off-state input current IIN(off)TJ = –40°C to 125°C; VINX = 0 V; VOUT = 40 Vmax 500 nA4
IN1- IN7 ON state input current IIN(ON)TJ = –40°C to 125°C; VINX = 1.5 V - 5.0 Vmax 10 uA4
Static current flowing through COM pin ICOMTJ = –40°C to 125°C; typical at TA = TJ = 25°C; VCOM = 8.5 V - 40 Vtyp 15 · max 25 uA4
Propagation delay time, low- to high-level output tPLHTypical at TA = TJ = 25°C; VINX ≥ 1.65 V; Vpull-up = 24 V; Rpull-up = 48 Ωtyp 350 ns5
Propagation delay time, high- to low-level output tPHLTypical at TA = TJ = 25°C; VINX ≥ 1.65 V; Vpul-lup = 24 V; Rpull-up = 48 Ωtyp 350 ns5
Input capacitance CiTypical at TA = TJ = 25°C; VI = 0; f = 100 kHztyp 5 pF5

Pins, by the datasheet

16
1 IN1
GPIO input; high drives OUT1 low to sink current. · p. 3
2 IN2
GPIO input; high drives OUT2 low to sink current. · p. 3
3 IN3
GPIO input; high drives OUT3 low to sink current. · p. 3
4 IN4
GPIO input; high drives OUT4 low to sink current. · p. 3
5 IN5
GPIO input; high drives OUT5 low to sink current. · p. 3
6 IN6
GPIO input; high drives OUT6 low to sink current. · p. 3
7 IN7
GPIO input; high drives OUT7 low to sink current. · p. 3
8 GND
Ground pin. · p. 3
9 COM
Supply pin that should be tied to 8.5 V or higher for proper operation. · p. 3
10 OUT7
Driver output that sinks current after IN7 is driven high. · p. 3
11 OUT6
Driver output that sinks current after IN6 is driven high. · p. 3
12 OUT5
Driver output that sinks current after IN5 is driven high. · p. 3
13 OUT4
Driver output that sinks current after IN4 is driven high. · p. 3
14 OUT3
Driver output that sinks current after IN3 is driven high. · p. 3
15 OUT2
Driver output that sinks current after IN2 is driven high. · p. 3
16 OUT1
Driver output that sinks current after IN1 is driven high. · p. 3

Ordering codes, by the datasheet

5
TPL7407LD
SOIC (16) · 9.90 mm x 3.91 mm nominal body · p. 1
TPL7407LDR
SOIC (D) · 16 pins; 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 16
TPL7407LDR.B
SOIC (D) · 16 pins; 2500 units, LARGE T&R; operating temperature -40 to 125 °C · p. 16
TPL7407LPWR
TSSOP (PW) · 16 pins; 2000 units, LARGE T&R; operating temperature -40 to 125 °C · p. 16
TPL7407LPWR.B
TSSOP (PW) · 16 pins; 2000 units, LARGE T&R; operating temperature -40 to 125 °C · p. 16

Parameters

20
Current - Collector(Ic)
500mA
Current - Supply
15uA
Input Capacitiance(Ci)
5pF
Input Current(off)
500nA
Input Current(on)
10uA
Input Logic Level - High
1.5V
Input Logic Level - Low
900mV
Junction Temperature(Max)
150℃
Number of Channels
7
Operating Temperature
-40℃~+125℃
Output Current
600mA
Output Leakage Current(Icex)
10nA
Thermal Resistance(Junction to Ambient)
91.9℃/W
Thermal Resistance(Junction to Board)
49.4℃/W
Thermal Resistance(Junction to Case)
50.1℃/W
Type
MOS
Voltage - Forward(Vf)
1.4V
Voltage - Input(Max)
30V
Voltage - Supply
8.5V~40V
Voltage - Supply(Absolute Max)
42V

Order codes

1

Pinout

16
The pins of the TPL7407LD
PinNameType
1IN1Unspecified
2IN2Unspecified
3IN3Unspecified
4IN4Unspecified
5IN5Unspecified
6IN6Unspecified
7IN7Unspecified
8GNDUnspecified
9COMUnspecified
10OUT7Unspecified
11OUT6Unspecified
12OUT5Unspecified
13OUT4Unspecified
14OUT3Unspecified
15OUT2Unspecified
16OUT1Unspecified

Open-source boards using it

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  • 4 layers140 × 70 mmRcm, the printed circuit board in 3D

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    Twistiee/rcm

    A CAN-controlled relay driver for a car. 21 universal channels, each of which is simultaneously a low-side output and an input — so the same board builds as a relay controller or as a switch panel, decided in firmware…

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Questions

Is there a KiCad symbol and footprint for the TPL7407LD?

Yes. The symbol is EasyEDA_Cloud:TPL7407LAPWR and the footprint Package_SO:SOIC-16_3.9x9.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the TPL7407LD?

SOIC-16, with 16 pins. Its footprint is drawn on this page.

Where is the TPL7407LD datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the TPL7407LD?

JLCPCB lists it as part C139663, with 3,387 in stock; the sellers' links on this page open their listings.

What can replace the TPL7407LD?

Parts like it in the library: the IRS2092STR-MNS by Minos, the EG1160 by EG Micro, the EG1168 by EG Micro and the BP6830 by JSMSEMI. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the TPL7407LD?

5 boards in 5 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8