A3mesh kicad project

A3MESH Hardware — PCB Design

KiCad 8 project of the custom two-layer printed circuit board that implements a single A3MESH node. Developed as part of the Bachelor's Thesis A3MESH: A Decentralised LoRa Mesh Platform for Off-Grid Smartphone Messaging. The design integrates an ESP32-WROOM-32UE microcontroller, a Semtech SX1276 (RFM95W) LoRa transceiver, a TPS63001 buck-boost converter, a TP4056 lithium-ion charger with DW01A/FS8205A protection, and the accompanying interface circuitry into a card-sized form factor intended to be adhered to the back of a smartphone case.

Repository Layout

tfg_hardware/
├── a3mesh_kicad_project/
│   ├── a3mesh_kicad_project.kicad_pro   KiCad 8 project file
│   ├── a3mesh_kicad_project.kicad_sch   Electrical schematic
│   ├── a3mesh_kicad_project.kicad_pcb   PCB layout
│   ├── a3mesh_kicad_project.kicad_prl   Local project preferences
│   ├── a3mesh_kicad_project.csv         Exported BOM (KiCad format)
│   ├── a3mesh_kicad_project.step        3D STEP export of the assembly
│   ├── New_Library.kicad_sym            Custom schematic symbols
│   ├── symbol_lib/
│   │   ├── dw01.kicad_sym               DW01A battery-protection IC
│   │   ├── fs8205.kicad_sym             FS8205A dual N-MOSFET
│   │   └── tp4056.kicad_sym             TP4056 Li-ion charger IC
│   ├── RF_Library.pretty/
│   │   └── ANTENNA_868_915_955_MONOPOLE_PCB.kicad_mod
│   │                                    PCB monopole antenna footprint
│   ├── 3d_models/                       STEP models for the 3D viewer
│   ├── logos/                           Silkscreen artwork
│   ├── production/
│   │   ├── bom.csv                      LCSC-referenced BOM (JLCPCB)
│   │   ├── positions.csv                Pick-and-place centroids
│   │   └── netlist.ipc                  IPC-D-356 netlist
│   ├── KICAD_OUTPUT_FILES/GBR/          Gerber and Excellon drill files
│   ├── out/                             Miscellaneous export directory

Appendix B of the accompanying thesis embeds the full schematic and copper layers of this design; Appendix C reproduces the LCSC-keyed bill of materials.

Requirements

• KiCad 8.0 or later. The project uses schematic symbols and footprints that are not part of the KiCad standard libraries; these are stored inside a3mesh_kicad_project/symbol_lib/ and a3mesh_kicad_project/RF_Library.pretty/ and are picked up automatically when the project is opened.
• For production output, the KiCad Fabrication Toolkit plug-in is recommended but not required. The pre-generated files in production/ and KICAD_OUTPUT_FILES/GBR/ are ready for direct submission to JLCPCB.

Opening the Project

Launch KiCad and open a3mesh_kicad_project/a3mesh_kicad_project.kicad_pro. The schematic (Eeschema) and the PCB editor (Pcbnew) can then be opened from the project manager. All hierarchical sheets are stored in the single .kicad_sch file for reviewability.

Manufacturing Files

The production/ directory contains the files required for a turn-key order at JLCPCB:

• bom.csv — the LCSC part-referenced bill of materials, ready for the JLC SMT assembly service. Two components must be sourced and hand- soldered separately: the RFM95W-868S2 LoRa module (obtained from AliExpress) and the JST-PH 2-pin battery connector.
• positions.csv — pick-and-place centroids in the JLC-expected format.
• netlist.ipc — IPC-D-356 netlist for bare-board electrical test.

Gerber and Excellon drill files for direct fabrication live in KICAD_OUTPUT_FILES/GBR/. A 3D STEP export of the fully populated assembly is provided as a3mesh_kicad_project.step, and is the file imported by the mechanical enclosure project (tfg_3d/) to guarantee mechanical fit.

Design Notes

• The layout is optimised for the 868 MHz European ISM band. The monopole PCB antenna footprint is tuned for this band; deployment in other regions requires re-tuning the matching network and, in most cases, a different antenna geometry.
• The USB-C connector, the buck-boost inductor, and the SX1276 module shield are the tallest components on the assembly. Their placement dictates the minimum internal cavity of the enclosure defined in tfg_3d/.
• The battery input is protected by a DW01A/FS8205A pair, and charging is handled by a TP4056 with the charge current set by the resistor R6 (6.8 kΩ, ≈ 500 mA).
• Test points on the SPI bus, the BLE UART, and the primary power rails are exposed on the top copper layer to facilitate bring-up and debugging.

Reference Documentation

Chapter 5 of the accompanying thesis discusses component selection, power-supply design, the RF front-end, and the mechanical integration constraints in detail. The Heltec V3 reference schematic in doc/ is included for comparison with the original evaluation board used during early prototyping.