
VPS8701B
VPSCExtended
-40℃~+125℃ 2.1mA 250mΩ、600mΩ 30V 6V~30V SOT-23-6 Transformer Drivers ROHS
- Part id
- vpsc/VPS8701B
- Category
- DC DC Converters
- Package
- SOT-23-6
- Pins
- 6
- In stock
- 5,460 at JLCPCB (C5189123)
- Used on
- 2 open-source boards
Overview
The VPS8701B is a DC DC Converter made by VPSC in a SOT-23-6 package with 6 pins. -40℃~+125℃ 2.1mA 250mΩ、600mΩ 30V 6V~30V SOT-23-6 Transformer Drivers ROHS.
PCBKit's library has its footprint (Package_TO_SOT_SMD:SOT-23-6, from KiCad's library), ready for a KiCad board. 5,460 are in stock at JLCPCB (part C5189123). 2 open-source boards in 1 repository on GitHub use it.
Symbol
The library has no symbol for this part yet.
Footprint
From the datasheet
10- Supply, least
- 6 V · VIN, recommended operating min · p. 3
- Supply, most
- 30 V · VIN, recommended operating max · p. 3
- Supply, absolute maximum
- 38 V · VIN, absolute max · p. 2
- Junction, hottest
- 150 °C · junction temperature absolute max · p. 2
- Takes working
- 2.1 mA · VIN quiescent current typical, VIN=12V, outputs and CLK/EN floating · p. 3
- Takes asleep
- 19 µA · VIN shutdown current typical, EN=0 · p. 3
- Gives
- 300 mA · VD1/VD2 drain current max per output, recommended operating · p. 3
- Current limit
- 450 mA · steady-state current clamp typical, measured at VIN · p. 3
- Switches at
- 250 kHz · internal low frequency typical, CLK floating · p. 3
- Switches at
- 350 kHz · internal high frequency typical, CLK connected to GND · p. 3
What it is and has
8- Topology
- Full bridge · p. 1
- Integrated NMOS
- 30V /0.25Ω · p. 1
- Integrated PMOS
- 30V /0.60Ω · p. 1
- Clock
- Frequency synchronization and selectable internal frequency · p. 1
- Enable shutdown
- Supported · p. 1
- Soft start
- Integrated · p. 1
- Protection
- Sustained short-circuit protection and overtemperature protection, automatic recovery · p. 1
- Package
- SOT23-6, 3.0mm*2.8mm · p. 1
Around it
4- cap 1uF
- between VIN and GND; Supply bypass capacitor, placed as close to the device as possible. · p. 2
- cap 0.1uF
- between VIN and GND; Optional additional parallel ceramic decoupling capacitor, placed close to the chip. · p. 10
- cap 1uF-10uF
- between VIN and GND; Input capacitor C1; low-ESR, temperature-stable ceramic recommended; place close to the chip and derate voltage for maximum input. · p. 10
- cap 4.7uF-10uF
- between isolated output and isolated output return; Output filter capacitor C3, ceramic. · p. 11
Specifications
45| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| VIN 输入电压 VIN | min -0.3 · max 38 V | 2 | |
| LDMOS 管漏极电压 VD1,VD2 | Maximum is VIN+0.3 V | min -0.3 V | 2 |
| LDMOS 管峰值电流 I(VD1)Pk ,I(VD2)Pk | max 1.2 A | 2 | |
| EN,CLK 引脚电压 EN,CLK | min -0.3 · max 6.6 V | 2 | |
| 最大工作结温 TJMAX | max 150 ℃ | 2 | |
| 存储温度范围 TSTG | min -55 · max 150 ℃ | 2 | |
| 抗静电能力 V(ESD) | 人体模式 HBM,per ESDA/JEDEC JS-001-2017;(Zap 1 pulse,Interval:>=0.1S); ±2000 V | max 2000 V | 2 |
| 抗静电能力 V(ESD) | 机器模式 CDM,per ESDA/JEDEC JS-002-2014; ±1000 V | max 1000 V | 2 |
| VIN 输入电压 VIN | min 6 · max 30 V | 3 | |
| LDMOS 管漏极电流 IVD1,IVD2 | max 0.3 A | 3 | |
| 工作结温 TJ | min -40 · max 125 ℃ | 3 | |
| 输入电压范围 VIN | VIN=12V,T=25℃,CLK 悬空 | min 6 · max 30 V | 3 |
| 启动电压 VIN(ON) | EN 悬空,VIN 上升;T=25℃,CLK 悬空 | min 4.3 · typ 4.8 · max 6 V | 3 |
| 回差电压 VIN(HYS) | EN 悬空,VIN 下降;T=25℃,CLK 悬空 | typ 0.3 V | 3 |
| VIN 静态电流 IQ | VIN=12V,T=25℃;VD1、VD2、CLK、EN 悬空 | min 1.5 · typ 2.1 · max 2.8 mA | 3 |
| 使能关断后 VIN 的电流 IVIN(EN) | VIN=12V,T=25℃,CLK 悬空;EN=0 | typ 19 · max 30 uA | 3 |
| EN 使能开启电压 VEN(ON) | VIN=12V,T=25℃,CLK 悬空;VEN 电压上升 | typ 2.1 · max 2.5 V | 3 |
| EN 使能关断回差 VEN(HYS) | VIN=12V,T=25℃,CLK 悬空;VEN 电压下降 | min 0.7 · typ 1 · max 1.3 V | 3 |
| EN 流出的电流大小 IEN(SRC) | VIN=12V,T=25℃,CLK 悬空;VEN 电压上升至 VEN(ON)+0.1V | typ 13 · max 40 uA | 3 |
| VD1\VD2 脉宽失配比例 DMM | VIN=12V,T=25℃,CLK 悬空 | typ 0 % | 3 |
| NMOS 管导通电阻 RDSN(ON) | VIN=12V,CLK 悬空;T=25℃,IDS=0.2A | typ 0.25 Ω | 3 |
| NMOS 管导通电阻 RDSN(ON) | VIN=12V,CLK 悬空;T=100℃,IDS=0.2A | typ 0.34 Ω | 3 |
| PMOS 管导通电阻 RDSP(ON) | VIN=12V,CLK 悬空;T=25℃,IDS=0.2A | typ 0.6 Ω | 3 |
| PMOS 管导通电阻 RDSP(ON) | VIN=12V,CLK 悬空;T=100℃,IDS=0.2A | typ 0.8 Ω | 3 |
| 电压摆率 VSLEW | VIN=12V,T=25℃,CLK 悬空;VD1 和 VD2 之间接 240Ω电阻 | typ 350 V/us | 3 |
| VD1\VD2 间隔时间 tBBM | VIN=12V,T=25℃,CLK 悬空;VD1 和 VD2 之间接 240Ω电阻 | typ 180 ns | 3 |
| 电流钳位限制初始值 ILIM0 | T=25℃,CLK 悬空;VD1 和 VD2 短接,VIN=6V | min 180 · typ 250 · max 350 mA | 3 |
| 电流钳位限制稳态值 ILIM1 | VIN=12V,T=25℃,CLK 悬空;测试 IVIN 的电流大小 | min 350 · typ 450 · max 600 mA | 3 |
| ILIM0 上升至 ILIM1 的时间 tSS | VIN=12V,T=25℃,CLK 悬空 | typ 1 mS | 3 |
| 内置低频 fSW0 | VIN=12V,T=25℃;CLK 悬空 | min 225 · typ 250 · max 275 kHz | 3 |
| 内置高频 fSW1 | VIN=12V,T=25℃;CLK 接 GND | min 315 · typ 350 · max 385 kHz | 3 |
| CLK 高电平逻辑电压 VCLK(H) | VIN=12V,T=25℃ | typ 2.2 · max 2.5 V | 3 |
| CLK 低电平逻辑电压 VCLK(L) | VIN=12V,T=25℃ | min 0.7 · typ 1.2 V | 3 |
| 外置同步时钟 F(EXT) | VIN=12V,T=25℃ | min 50 · max 1600 kHz | 3 |
| 过温保护阈值 TSHDN | VIN=12V,CLK 悬空 | min 145 · typ 162 · max 178 ℃ | 3 |
| 过温保护回差 TSHDN(HYS) | VIN=12V,CLK 悬空 | typ 27 ℃ | 3 |
| 输入电压 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | min 10.8 · typ 12 · max 13.2 V | 10 |
| 输出电压 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | typ 5 V | 10 |
| 输出电流 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | typ 0.2 A | 10 |
| 输出纹波+噪声 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | typ 50 · max 100 mV | 10 |
| 电压调整率 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | max 1.5 % | 10 |
| 负载调整率 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | max 10 % | 10 |
| 转换效率 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | typ 85 % | 10 |
| 工作温度 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | min -40 · max 85 ℃ | 10 |
| 隔离耐压 | Typical application: 12V±10% input, isolated unregulated 5V output, 1W maximum | min 3000 VDC | 10 |
Pins, by the datasheet
6- 1 EN
- Enable input; low stops operation, floating or high enables normal operation. · p. 2
- 2 GND
- Logic and analog circuit ground. · p. 2
- 3 CLK
- Internal frequency selection and external clock input; floating selects typical 250kHz, GND selects 350kHz, and an external clock is divided to produce complementary drive. · p. 2
- 4 VD2
- Transformer drive output 2. · p. 2
- 5 VIN
- Power input; bypass to GND with a 1uF capacitor placed close to the device. · p. 2
- 6 VD1
- Transformer drive output 1. · p. 2
Ordering codes, by the datasheet
1- VPS8701B
- SOT23-6 · 6 pins, tape and reel, quantity 3000, MSL-3 · p. 14
Open-source boards using it
2- 4 layers71 × 150.5 mm

- 4 layers71 × 71 mm

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Questions
Is there a KiCad symbol and footprint for the VPS8701B?
Yes. the footprint Package_TO_SOT_SMD:SOT-23-6, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the VPS8701B?
SOT-23-6, with 6 pins. Its footprint is drawn on this page.
Where is the VPS8701B datasheet?
VPSC publishes it: the Datasheet link on this page opens it.
Where can I order the VPS8701B?
JLCPCB lists it as part C5189123, with 5,460 in stock; the sellers' links on this page open their listings.
What can replace the VPS8701B?
Parts like it in the library: the MX6505T by Wuxi Maxinmicro, the TPS562201DDC by Texas Instruments, the TPS561201DDCR by Texas Instruments and the SX1308 by SX. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the VPS8701B?
2 boards in 1 repository on GitHub; the most starred are listed on this page, with their KiCad files.