OPA2325ID

Texas InstrumentsExtended

-2.75V~-1.1V、1.1V~2.75V -40℃~+125℃ 0.2pA 0.2pA 10MHz 114dB 2 2.2V~5.5V 40uV 5V/us 650uA 7.5uV/℃ 9nV/√Hz@10kHz ESD protection、Built-in compensation、Reverse-phase input protection Rail-to-Rail Input, Rail-to-Rail Output SOIC-8 Precision Op Amps ROHS

Datasheet JLCPCB LCSC

Part id: ti/OPA2325ID
Category: Operational Amplifier
Package: SOIC-8
Pins: 8
In stock: 0 at JLCPCB (C2058909)
Used on: 3 open-source boards

Overview

The OPA2325ID is an operational Amplifier made by Texas Instruments in a SOIC-8 package with 8 pins. -2.75V~-1.1V、1.1V~2.75V -40℃~+125℃ 0.2pA 0.2pA 10MHz 114dB 2 2.2V~5.5V 40uV 5V/us 650uA 7.5uV/℃ 9nV/√Hz@10kHz ESD protection、Built-in compensation、Reverse-phase input protection Rail-to-Rail Input, Rail-to-Rail Output SOIC-8 Precision Op Amps ROHS.

PCBKit's library has its KiCad symbol (Amplifier_Operational:OPA2325, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. JLCPCB lists it (part C2058909). 3 open-source boards in 3 repositories on GitHub use it.

Symbol

Amplifier_Operational:OPA2325From KiCad's library

Footprint

Package_SO:SOIC-8_3.9x4.9mm_P1.27mmFrom KiCad's library

From the datasheet

Supply, least: 2.2 V · V+, single supply recommended min relative to V– · p. 5
Supply, most: 5.5 V · V+, single supply recommended max relative to V– · p. 5
Supply, least: 1.1 V · V+/V–, dual supply recommended min magnitude ±1.1 V · p. 5
Supply, most: 2.75 V · V+/V–, dual supply recommended max magnitude ±2.75 V · p. 5
Supply, absolute maximum: 6 V · V+ minus V–, absolute max · p. 5
Works from: -40 °C · specified ambient temperature min · p. 5
Works up to: 125 °C · specified ambient temperature max · p. 5
Junction, hottest: 150 °C · junction temperature absolute max · p. 5
A pin gives at most: 10 mA · signal input current absolute max magnitude · p. 5
Takes working: 1.3 mA · sum of two amplifiers' typical quiescent currents, IO = 0 mA, VS = 5.5 V · p. 8
Junction to air (D (SOIC)): 119 K/W · junction-to-ambient thermal resistance · p. 6
Junction to case (D (SOIC)): 60 K/W · junction-to-case top thermal resistance · p. 6
Junction to board (D (SOIC)): 61 K/W · junction-to-board thermal resistance · p. 6

What it is and has

Bandwidth: 10MHz · p. 1
Input bias current: 0.2pA · p. 1
Input voltage noise density: 9nV/√Hz at 10kHz · p. 1
Slew rate: 5V/μs · p. 1
Unity-gain stable: Yes · p. 1
Input/output: Rail-to-rail · p. 1
Input offset voltage: 150μV maximum · p. 1
Input stage: Zero-crossover distortion · p. 1

Around it

cap 0.1-µF: between V+ and GND; Low-ESR ceramic bypass capacitor; place as close as possible to the device. Applicable to single and dual supplies. · p. 25

Specifications

Parameter	Conditions	As printed	Page
Supply voltage VS	VS = (V+) – (V–)	max 6 V	5
Signal input pins	Current; input signals beyond supply rails must be current limited	min -10 · max 10 mA	5
Temperature TA	Operating	min -40 · max 150 °C	5
Temperature TJ	Junction	max 150 °C	5
Temperature Tstg	Storage	min -65 · max 150 °C	5
Electrostatic discharge V(ESD)	Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±4000 V	min -4000 · max 4000 V	5
Electrostatic discharge V(ESD)	Charged-device model (CDM), per JEDEC specification JESD22-C101; ±1000 V	min -1000 · max 1000 V	5
Supply voltage VS	Single supply	min 2.2 · max 5.5 V	5
Supply voltage VS	Dual supply; limits are ±1.1 V and ±2.75 V	min 1.1 · max 2.75 V	5
Specified temperature TA		min -40 · max 125 °C	5
Junction-to-ambient thermal resistance RθJA	OPA2325, D (SOIC), 8 pins	typ 119 °C/W	6
Junction-to-case (top) thermal resistance RθJC(top)	OPA2325, D (SOIC), 8 pins	typ 60 °C/W	6
Junction-to-board thermal resistance RθJB	OPA2325, D (SOIC), 8 pins	typ 61 °C/W	6
Junction-to-top characterization parameter ΨJT	OPA2325, D (SOIC), 8 pins	typ 15 °C/W	6
Junction-to-board characterization parameter ΨJB	OPA2325, D (SOIC), 8 pins	typ 60.4 °C/W	6
Input offset voltage VOS		typ 40 · max 150 uV	7
Input offset voltage drift dVOS/dT	VS = 5.5 V, TA = –40°C to +125°C	typ 2 · max 7.5 uV/°C	7
Power-supply rejection ratio PSRR	VS = 2.2 V to +5.5 V	typ 6 · max 20 uV/V	7
Power-supply rejection ratio PSRR	VS = 2.2 V to 5.5 V, TA = –40°C to +125°C	typ 15 uV/V	7
Channel separation	At 1 kHz	typ 130 dB	7
Common-mode rejection ratio CMRR	VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V	min 100 · typ 114 dB	7
Common-mode rejection ratio CMRR	VS = 5.5 V, (V–) – 0.1 V < VCM < (V+) + 0.1 V; TA = –40°C to +125°C	min 95 dB	7
Input bias current IB	TA = 25°C; typical ±0.2 pA, maximum ±10 pA	typ 0.2 · max 10 pA	7
Input bias current IB	TA = –40°C to +85°C; maximum ±500 pA	max 500 pA	7
Input bias current IB	TA = –40°C to +125°C; maximum ±10 nA	max 10 nA	7
Input offset current IOS	TA = 25°C; typical ±0.2 pA, maximum ±10 pA	typ 0.2 · max 10 pA	7
Input offset current IOS	TA = –40°C to +85°C; maximum ±500 pA	max 500 pA	7
Input offset current IOS	TA = –40°C to +125°C; maximum ±10 nA	max 10 nA	7
Input voltage noise	f = 0.1 Hz to 10 Hz	typ 2.8 uVPP	7
Input voltage noise density en	f = 1 kHz	typ 10 nV/√Hz	7
Input voltage noise density en	f = 10 kHz	typ 9 nV/√Hz	7
Input current noise density in	f = 1 kHz	typ 1.3 fA/√Hz	7
Differential	Input capacitance	typ 5 pF	7
Common-mode	Input capacitance	typ 4 pF	7
Open-loop voltage gain AOL	0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ	min 105 · typ 130 dB	7
Open-loop voltage gain AOL	0.1 V < VO < (V+) – 0.1 V, RL = 10 kΩ, TA = –40°C to +125°C	min 95 · typ 128 dB	7
Open-loop voltage gain AOL	0.2 V < VO < (V+) – 0.2 V, RL = 2 kΩ	min 100 · typ 110 dB	7
Phase margin PM	G = 1 V/V, VS = 5 V, CL = 15 pF	typ 67 Degrees	7
Gain bandwidth product GBP	Unity gain; VS = 5.0 V, CL = 50 pF	typ 10 MHz	7
Slew rate SR	G = +1; VS = 5.0 V, CL = 50 pF	typ 5 V/us	7
Settling time tS	To 0.1%, 2-V step, G = +1; VS = 5.0 V, CL = 50 pF	typ 0.6 us	7
Settling time tS	To 0.01%, 2-V step, G = +1; VS = 5.0 V, CL = 50 pF	typ 1 us	7
Overload recovery time	VIN × G > VS; VS = 5.0 V, CL = 50 pF	typ 200 ns	7
Total harmonic distortion + noise THD+N	VO = 4 VPP, G = +1, f = 10 kHz, RL = 10 kΩ; third-order filter, bandwidth = 80 kHz at –3 dB; VS = 5.0 V, CL = 50 pF	typ 0.0005 %	7
Total harmonic distortion + noise THD+N	VO = 2 VPP, G = +1, f = 10 kHz, RL = 600 Ω; third-order filter, bandwidth = 80 kHz at –3 dB; VS = 5.0 V, CL = 50 pF	typ 0.005 %	7
Voltage output swing from both rails VO	RL = 10 kΩ	typ 10 · max 20 mV	8
Voltage output swing from both rails VO	RL = 10 kΩ, TA = –40°C to +125°C	max 30 mV	8
Voltage output swing from both rails VO	RL = 2 kΩ	typ 25 · max 45 mV	8
Voltage output swing from both rails VO	RL = 2 kΩ, TA = –40°C to +125°C	max 55 mV	8
Open-loop output resistance RO	IO = 0 mA, f = 1 MHz	typ 180 Ω	8
Quiescent current per amplifier IQ	IO = 0 mA, VS = 5.5 V	typ 0.65 · max 0.75 mA	8
Quiescent current per amplifier IQ	IO = 0 mA, VS = 5.5 V, TA = –40°C to +125°C	max 0.8 mA	8
Power-on time	V+ = 0 V to 5 V, to 90% IQ level	typ 28 us	8

Pins, by the datasheet

1 OUT A: Output channel A. · p. 3
2 –IN A: Inverting input channel A. · p. 3
3 +IN A: Noninverting input channel A. · p. 3
4 V–: Negative supply. · p. 3
5 +IN B: Noninverting input channel B. · p. 3
6 –IN B: Inverting input channel B. · p. 3
7 OUT B: Output channel B. · p. 3
8 V+: Positive supply. · p. 3

Ordering codes, by the datasheet

OPA2325ID: SOIC · D package, 8 pins, quantity 75; operating temperature –40 to 125°C. · p. 28
OPA2325IDR: SOIC · D package, 8 pins, quantity 2500; operating temperature –40 to 125°C. · p. 28
OPA2325IDGKR: VSSOP · DGK package, 8 pins, quantity 2500; operating temperature –40 to 125°C. · p. 28
OPA2325IDGKT: VSSOP · DGK package, 8 pins, quantity 250; operating temperature –40 to 125°C. · p. 28

Parameters

Common Mode Rejection Ratio(CMRR): 114dB
Current - Supply: 1.3mA
Dual Supply: -2.75V~-1.1V；1.1V~2.75V
Features: ESD Protection；Built-in compensation；Reverse-phase input protection
Gain Bandwidth Product: 10MHz
Ib - Input Bias Current: 0.2pA
Input Offset Current(Ios): 0.2pA
Input Offset Voltage Drift(Vos TC): 7.5uV/℃
Input Voltage Noise Density: 9nV/√Hz@10kHz
Junction Temperature(Max): 150℃
Number of Channels: 2
Operating Temperature: -40℃~+125℃
Output Current per Pin(Max): 10mA
Quiescent Current(Iq): 650uA
Rail to Rail: Rail-to-Rail Input, Rail-to-Rail Output
Single supply: 1.1V~5.5V
Slew Rate: 5V/us
Thermal Resistance(Junction to Ambient): 119℃/W
Thermal Resistance(Junction to Board): 61℃/W
Thermal Resistance(Junction to Case): 60℃/W
Voltage - Supply(Absolute Max): 6V
Vos - Input Offset Voltage: 40uV

Order codes

OPA2325IDRLCSC C2058909

Pinout

The pins of the OPA2325ID
Pin	Name	Type
1	—	Output
2	-	Input
3	+	Input
4	V-	Power in
5	+	Input
6	-	Input
7	—	Output
8	V+	Power in

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Open-source boards using it

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Parts like it

Questions

Is there a KiCad symbol and footprint for the OPA2325ID?

Yes. The symbol is Amplifier_Operational:OPA2325 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the OPA2325ID?

SOIC-8, with 8 pins. Its footprint is drawn on this page.

Where is the OPA2325ID datasheet?

Texas Instruments publishes it: the Datasheet link on this page opens it.

Where can I order the OPA2325ID?

JLCPCB lists it as part C2058909, with 0 in stock; the sellers' links on this page open their listings.

What can replace the OPA2325ID?

Parts like it in the library: the LM358D by onsemi, the LM2904D by onsemi, the NE5532D by Texas Instruments and the LM358D by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the OPA2325ID?

3 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

OPA2325ID

Overview

Symbol

Footprint

From the datasheet

What it is and has

Around it

Specifications

Pins, by the datasheet

Ordering codes, by the datasheet

Open-source boards using it

Pico adc basic

Opamp module

Mic head

Parts like it

LM358D

LM2904D

NE5532D

LM358D

LM358DT

TLV9062ID

LM2904DT

LM258D