
Power Integrations interface
paltatech/VESC-controller
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Texas InstrumentsExtended
-40℃~+125℃ 15kV/us 30uA 5000 50uV 8.2 Differential Isolated ΔΣ (Sigma-Delta) modulator、Fault detection、Full-differential topology ±250mV SOIC-8 Isolation Amplifiers ROHS
The AMC1301DWV is an isolation Amplifier made by Texas Instruments in a SOIC-8 package with 8 pins. -40℃~+125℃ 15kV/us 30uA 5000 50uV 8.2 Differential Isolated ΔΣ (Sigma-Delta) modulator、Fault detection、Full-differential topology ±250mV SOIC-8 Isolation Amplifiers ROHS.
PCBKit's library has its KiCad symbol (EasyEDA_Cloud:AMC1200STDUBRQ1, from EasyEDA) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 2 are in stock at JLCPCB (part C1346781). 14 open-source boards in 9 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Operating ambient temperature TA | AMC1301 | min -40 · max 125 °C | 4 |
| Input offset drift TCVOS | AMC1301; ± maximum | max 3 uV/°C | 4 |
| Gain error drift TCEG | AMC1301; ± maximum | max 50 ppm/°C | 4 |
| Power-supply voltage | High-side VDD1 to GND1 | min -0.3 · max 7 V | 5 |
| Power-supply voltage | Low-side VDD2 to GND2 | min -0.3 · max 7 V | 5 |
| Input current | Continuous, any pin except power-supply pins | min -10 · max 10 mA | 5 |
| Temperature TJ | Junction | max 150 °C | 5 |
| Temperature Tstg | Storage | min -65 · max 150 °C | 5 |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ± rating | max 2000 V | 5 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002; ± rating | max 1000 V | 5 |
| High-side power supply | VDD1 to GND1; typ field represents NOM | min 3 · typ 5 · max 5.5 V | 5 |
| Low-side power supply | VDD2 to GND2; typ field represents NOM | min 3 · typ 3.3 · max 5.5 V | 5 |
| Differential input voltage before clipping output VClipping | VIN = VINP – VINN; ± nominal | typ 302.7 mV | 5 |
| Specified linear differential full-scale voltage VFSR | VIN = VINP – VINN | min -250 · max 250 mV | 5 |
| Absolute common-mode input voltage(1) | (VINP + VINN) / 2 to GND1; maximum VDD1 | min -2 V | 5 |
| Operating common-mode input voltage VCM | (VINP + VINN) / 2 to GND1; maximum VDD1 – 2.1 | min -0.16 V | 5 |
| Specified ambient temperature TA | AMC1301 | min -40 · max 125 °C | 5 |
| Junction-to-ambient thermal resistance RθJA | DWV (SOIC), 8 PINS | typ 110.1 °C/W | 6 |
| Junction-to-case (top) thermal resistance RθJC(top) | DWV (SOIC), 8 PINS | typ 51.7 °C/W | 6 |
| Junction-to-board thermal resistance RθJB | DWV (SOIC), 8 PINS | typ 66.4 °C/W | 6 |
| Junction-to-top characterization parameter ΨJT | DWV (SOIC), 8 PINS | typ 16 °C/W | 6 |
| Junction-to-board characterization parameter ΨJB | DWV (SOIC), 8 PINS | typ 64.5 °C/W | 6 |
| Maximum power dissipation (both sides) PD | VDD1 = VDD2 = 5.5 V | max 99 mW | 6 |
| Maximum power dissipation (high-side) PD1 | VDD1 = 3.6 V | max 31 mW | 6 |
| Maximum power dissipation (high-side) PD1 | VDD1 = 5.5 V | max 54 mW | 6 |
| Maximum power dissipation (low-side) PD2 | VDD2 = 3.6 V | max 26 mW | 6 |
| Maximum power dissipation (low-side) PD2 | VDD2 = 5.5 V | max 45 mW | 6 |
| External clearance(1) CLR | Shortest pin-to-pin distance through air; ≥ minimum | min 8.5 mm | 7 |
| External creepage(1) CPG | Shortest pin-to-pin distance across the package surface; ≥ minimum | min 8.5 mm | 7 |
| Distance through insulation DTI | Minimum internal gap (internal clearance) of the double insulation; ≥ minimum | min 0.021 mm | 7 |
| Comparative tracking index CTI | DIN EN 60112 (VDE 0303-11); IEC 60112; ≥ minimum | min 600 V | 7 |
| Maximum repetitive peak isolation voltage VIORM | At AC voltage | max 1500 VPK | 7 |
| Maximum-rated isolation working voltage VIOWM | At AC voltage (sine wave) | max 1000 VRMS | 7 |
| Maximum-rated isolation working voltage VIOWM | At DC voltage | max 1500 VDC | 7 |
| Maximum transient isolation voltage VIOTM | VTEST = VIOTM, t = 60 s (qualification test); VTEST = 1.2 × VIOTM, t = 1 s (100% production test) | max 7000 VPK | 7 |
| Maximum impulse voltage(2) VIMP | Tested in air, 1.2/50-us waveform per IEC 62368-1 | max 7700 VPK | 7 |
| Maximum surge isolation voltage(3) VIOSM | Tested in oil (qualification test), 1.2/50-us waveform per IEC 62368-1 | max 10000 VPK | 7 |
| Apparent charge((5)) qpd | Method a, after input/output safety test subgroups 2 and 3; Vpd(ini) = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM, tm = 10 s | max 5 pC | 7 |
| Apparent charge((5)) qpd | Method a, after environmental tests subgroup 1; Vpd(ini) = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM, tm = 10 s | max 5 pC | 7 |
| Apparent charge((5)) qpd | Method b1, at preconditioning (type test) and routine test; Vpd(ini) = 1.2 x VIOTM, tini = 1 s, Vpd(m) = 1.875 × VIORM, tm = 1 s | max 5 pC | 7 |
| Apparent charge((5)) qpd | Method b2, at routine test (100% production); Vpd(ini) = Vpd(m) = 1.2 x VIOTM, tini = tm = 1 s | max 5 pC | 7 |
| Barrier capacitance, input to output(5) CIO | VIO = 0.5 VPP at 1 MHz; approximate value | typ 1.2 pF | 7 |
| Withstand isolation voltage VISO | UL1577; VTEST = VISO, t = 60 s (qualification test); VTEST = 1.2 × VISO, t = 1 s (100% production test) | max 5000 VRMS | 7 |
| Safety input, output, or supply current IS | RθJA = 110.1°C/W, VDDx = 5.5 V, TJ = 150°C, TA = 25°C | max 206 mA | 8 |
| Safety input, output, or supply current IS | RθJA = 110.1°C/W, VDDx = 3.6 V, TJ = 150°C, TA = 25°C | max 315 mA | 8 |
| Safety input, output, or total power PS | RθJA = 110.1°C/W, TJ = 150°C, TA = 25°C | max 1135 mW | 8 |
| Maximum safety temperature TS | max 150 °C | 8 | |
| Hysteresis of common-mode overvoltage detection level | typ 60 mV | 9 | |
| Input offset voltage(1) VOS | Initial, at TA = 25°C, INP = INN = GND1; typical ±0.05 | min -0.2 · typ 0.05 · max 0.2 mV | 9 |
| Input offset drift(1) (4) TCVOS | AMC1301; typical ±1 | min -3 · typ 1 · max 3 uV/°C | 9 |
| Common-mode rejection ratio CMRR | fIN = 0 Hz, VCM min ≤ VCM ≤ VCM max | typ -93 dB | 9 |
| Common-mode rejection ratio CMRR | fIN = 10 kHz, VCM min ≤ VCM ≤ VCM max | typ -93 dB | 9 |
| Single-ended input resistance RIN | INN = GND1 | typ 18 kΩ | 9 |
| Differential input resistance RIND | typ 22 kΩ | 9 | |
| Input bias current IIB | INP = INN = GND1; IIB = (IIBP + IIBN) / 2 | min -41 · typ -30 · max -24 uA | 9 |
| Input bias current drift TCIIB | typ 1 nA/°C | 9 | |
| Differential input capacitance CIND | typ 1 pF | 9 | |
| Nominal gain | typ 8.2 V/V | 9 | |
| Gain error(1) EG | at TA = 25°C; typical ±0.05% | min -0.3 · typ 0.05 · max 0.3 % | 9 |
| Gain drift(1) (5) TCEG | AMC1301; typical ±15 | min -50 · typ 15 · max 50 ppm/°C | 9 |
| Nonlinearity(1) | Typical ±0.01% | min -0.03 · typ 0.01 · max 0.03 % | 9 |
| Nonlinearity drift | Typical ±1 | typ 1 ppm/°C | 9 |
| Total harmonic distortion(3) THD | fIN = 10 kHz | typ -87 dB | 9 |
| Output noise | INP = INN = GND1, fIN = 0 Hz, BW = 100 kHz brickwall filter | typ 220 uVRMS | 9 |
| Signal-to-noise ratio SNR | fIN = 1 kHz, BW = 10 kHz | min 80 · typ 84 dB | 9 |
| Signal-to-noise ratio SNR | fIN = 10 kHz, BW = 100 kHz | typ 71 dB | 9 |
| Power-supply rejection ratio(2) PSRR | PSRR vs VDD1, at DC | typ -94 dB | 9 |
| Power-supply rejection ratio(2) PSRR | PSRR vs VDD1, 100-mV and 10-kHz ripple | typ -90 dB | 9 |
| Power-supply rejection ratio(2) PSRR | PSRR vs VDD2, at DC | typ -100 dB | 9 |
| Power-supply rejection ratio(2) PSRR | PSRR vs VDD2, 100-mV and 10-kHz ripple | typ -94 dB | 9 |
| Common-mode output voltage VCMout | min 1.39 · typ 1.44 · max 1.49 V | 9 | |
| Clipping differential output voltage VCLIPout | VOUT = (VOUTP – VOUTN); |VIN| = |VINP – VINN| > |VClipping|; typical ±2.49 | min -2.52 · typ 2.49 · max 2.52 V | 9 |
| Failsafe differential output voltage VFailsafe | VCM ≥ VCMov, or VDD1 missing | typ -2.563 · max -2.545 V | 9 |
| Output bandwidth BW | min 190 · typ 210 kHz | 9 | |
| Output resistance ROUT | On OUTP or OUTN; typical < 0.2 | typ 0.2 Ω | 9 |
| Output short-circuit current | On OUTP or OUTN, sourcing or sinking, INN = INP = GND1, outputs shorted to either GND2 or VDD2 | typ 13 mA | 9 |
| Common-mode transient immunity CMTI | |GND1 – GND2| = 1 kV | min 15 kV/us | 9 |
| High-side supply current IDD1 | 3.0 V ≤ VDD1 ≤ 3.6 V | typ 6.3 · max 8.5 mA | 10 |
| High-side supply current IDD1 | 4.5 V ≤ VDD1 ≤ 5.5 V | typ 7.2 · max 9.8 mA | 10 |
| Low-side supply current IDD2 | 3.0 V ≤ VDD2 ≤ 3.6 V | typ 5.3 · max 7.2 mA | 10 |
| Low-side supply current IDD2 | 4.5 V ≤ VDD2 ≤ 5.5 V | typ 5.9 · max 8.1 mA | 10 |
| Output signal rise time tr | Over operating ambient temperature range | typ 2 us | 10 |
| Output signal fall time tf | Over operating ambient temperature range | typ 2 us | 10 |
| VINx to VOUTx signal delay (50% - 10%) | Unfiltered output | typ 0.7 · max 2 us | 10 |
| VINx to VOUTx signal delay (50% - 50%) | Unfiltered output | typ 1.6 · max 2.6 us | 10 |
| VINx to VOUTx signal delay (50% - 90%) | Unfiltered output | typ 2.5 · max 3 us | 10 |

paltatech/VESC-controller
Made open source with KiCAD, an open source EDA tool.


jagdeepsingh02/ENNOID-Dual-Gate-Driver
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romioRN/DC-CDI
ВНИМАНИЕ! в плате есть отсутствующие дjрожки если вы хотите это изготовить вам нужно внести исправления



jagdeepsingh02/ENNOID-Dual-Gate-Driver
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Yes. The symbol is EasyEDA_Cloud:AMC1200STDUBRQ1 and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
SOIC-8, with 8 pins. Its footprint is drawn on this page.
Texas Instruments publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C1346781, with 2 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the AMC1350DWVR by Texas Instruments, the CA-IS1311G by Chipanalog, the ISO224ADWVR by Texas Instruments and the PAI8300E-W5R by 2Pai Semi. Check their datasheets: a part that fits the footprint may still differ in its ratings.
14 boards in 9 repositories on GitHub; the most starred are listed on this page, with their KiCad files.