

Overview
The AMC1350DWVR is an isolation Amplifier made by Texas Instruments in a SOIC-8 package with 8 pins. Isolated ΔΣ (Sigma-Delta) modulator、Fault detection、Full-differential topology SOIC-8 Isolation Amplifiers ROHS.
PCBKit's library has its KiCad symbol (Isolator_Analog:AMC1350DWV, from KiCad's library) and its footprint (Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, from KiCad's library), ready for a KiCad board. 3,856 are in stock at JLCPCB (part C4990162). 3 open-source boards in 3 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
11- Supply, least
- 3 V · VDD1, recommended operating min · p. 4
- Supply, most
- 5.5 V · VDD1, recommended operating max · p. 4
- Supply, absolute maximum
- 6.5 V · VDD1 to GND1, absolute max · p. 4
- Works from
- -55 °C · operating ambient min · p. 4
- Works up to
- 125 °C · operating ambient max · p. 4
- Junction, hottest
- 150 °C · junction temperature absolute max · p. 4
- A pin gives at most
- 10 mA · continuous input current, any pin except power-supply pins, absolute max · p. 4
- Takes working
- 12.3 mA · sum of typical IDD1 at 5 V and IDD2 at 3.3 V · p. 9
- Junction to air (DWV (SOIC))
- 84.6 K/W · junction-to-ambient thermal resistance · p. 5
- Junction to case (DWV (SOIC))
- 28.3 K/W · junction-to-case top thermal resistance · p. 5
- Junction to board (DWV (SOIC))
- 41.1 K/W · junction-to-board thermal resistance · p. 5
What it is and has
6- Linear input voltage range
- ±5 V · p. 1
- Input impedance
- 1.25 MΩ (typ) · p. 1
- Fixed gain
- 0.4 V/V · p. 1
- Output diagnostics
- Fail-safe output · p. 1
- Isolation certification
- 5000-VRMS isolation for 1 minute per UL1577 · p. 1
- Package
- SOIC (8), 5.85 mm × 7.50 mm · p. 1
Specifications
91| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Power-supply voltage | High-side VDD1 to GND1 | min -0.3 · max 6.5 V | 4 |
| Power-supply voltage | Low-side VDD2 to GND2 | min -0.3 · max 6.5 V | 4 |
| Analog input voltage | INP, INN | min -15 · max 15 V | 4 |
| Input current | Continuous, any pin except power-supply pins | min -10 · max 10 mA | 4 |
| Temperature TJ | Junction | max 150 °C | 4 |
| Temperature Tstg | Storage | min -65 · max 150 °C | 4 |
| Electrostatic discharge V(ESD) | Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001; ±2000 V | max 2000 V | 4 |
| Electrostatic discharge V(ESD) | Charged-device model (CDM), per per ANSI/ESDA/JEDEC JS-002; ±1000 V | max 1000 V | 4 |
| High-side power-supply VDD1 | VDD1 to GND1; typ field represents NOM | min 3 · typ 5 · max 5.5 V | 4 |
| Low-side power-supply VDD2 | VDD2 to GND2; typ field represents NOM | min 3 · typ 3.3 · max 5.5 V | 4 |
| Input voltage before clipping output VClipping | VIN = VINP – VINN; nominal ±6.25 V | typ 6.25 V | 4 |
| Specified linear full-scale voltage VFSR | VIN = VINP – VINN | min -5 · max 5 V | 4 |
| Operating common-mode input voltage VCM | min -4 · max 4 V | 4 | |
| Capacitive load CLOAD | On OUTP or OUTN to GND2 | max 500 pF | 4 |
| Capacitive load CLOAD | OUTP to OUTN | max 250 pF | 4 |
| Resistive load RLOAD | On OUTP or OUTN to GND2; values in NOM and MAX columns as printed | typ 10 · max 1 kΩ | 4 |
| Operating ambient temperature TA | min -55 · max 125 °C | 4 | |
| Specified ambient temperature TA | min -40 · max 125 °C | 4 | |
| Junction-to-ambient thermal resistance RθJA | DWV (SOIC), 8 PINS | typ 84.6 °C/W | 5 |
| Junction-to-case (top) thermal resistance RθJC(top) | DWV (SOIC), 8 PINS | typ 28.3 °C/W | 5 |
| Junction-to-board thermal resistance RθJB | DWV (SOIC), 8 PINS | typ 41.1 °C/W | 5 |
| Junction-to-top characterization parameter ψJT | DWV (SOIC), 8 PINS | typ 4.9 °C/W | 5 |
| Junction-to-board characterization parameter ψJB | DWV (SOIC), 8 PINS | typ 39.1 °C/W | 5 |
| Maximum power dissipation (both sides) PD | VDD1 = VDD2 = 5.5 V | max 96 mW | 5 |
| Maximum power dissipation (high-side) PD1 | VDD1 = 3.6 V | max 29 mW | 5 |
| Maximum power dissipation (high-side) PD1 | VDD1 = 5.5 V | max 51 mW | 5 |
| Maximum power dissipation (low-side) PD2 | VDD2 = 3.6 V | max 26 mW | 5 |
| Maximum power dissipation (low-side) PD2 | VDD2 = 5.5 V | max 45 mW | 5 |
| External clearance CLR | Shortest pin-to-pin distance through air; ≥ 8.5 mm | min 8.5 mm | 6 |
| External creepage CPG | Shortest pin-to-pin distance across the package surface; ≥ 8.5 mm | min 8.5 mm | 6 |
| Distance through insulation DTI | Minimum internal gap (internal clearance) of the double insulation; ≥ 0.021 mm | min 0.021 mm | 6 |
| Comparative tracking index CTI | DIN EN 60112 (VDE 0303-11); IEC 60112; ≥ 600 V | min 600 V | 6 |
| Maximum repetitive peak isolation voltage VIORM | At AC voltage | max 2120 VPK | 6 |
| Maximum-rated isolation working voltage VIOWM | At AC voltage (sine wave) | max 1500 VRMS | 6 |
| Maximum-rated isolation working voltage VIOWM | At DC voltage | max 2120 VDC | 6 |
| Maximum transient isolation voltage VIOTM | VTEST = VIOTM, t = 60 s (qualification test) | max 7070 VPK | 6 |
| Maximum transient isolation voltage VIOTM | VTEST = 1.2 × VIOTM, t = 1 s (100% production test) | max 8480 VPK | 6 |
| Maximum surge isolation voltage VIOSM | Test method per IEC 60065, 1.2/50-us waveform, VTEST = 1.6 × VIOSM = 12800 VPK (qualification) | max 8000 VPK | 6 |
| Apparent charge qpd | Method a, after input/output safety test subgroups 2 and 3; Vini = VIOTM, tini = 60 s, Vpd(m) = 1.2 × VIORM, tm = 10 s; ≤5 pC | max 5 pC | 6 |
| Apparent charge qpd | Method a, after environmental tests subgroup 1; Vini = VIOTM, tini = 60 s, Vpd(m) = 1.6 × VIORM, tm = 10 s; ≤5 pC | max 5 pC | 6 |
| Apparent charge qpd | Method b1, at routine test (100% production) and preconditioning (type test), Vini = VIOTM, tini = 1 s, Vpd(m) = 1.875 × VIORM, tm = 1 s; ≤5 pC | max 5 pC | 6 |
| Barrier capacitance, input to output CIO | VIO = 0.5 VPP at 1 MHz; ~1.5 pF | typ 1.5 pF | 6 |
| Pollution degree | typ 2 | 6 | |
| Withstand isolation voltage VISO | UL1577; VTEST = VISO = 5000 VRMS or 7071 VDC, t = 60 s (qualification); VTEST = 1.2 × VISO = 6000 VRMS, t = 1 s (100% production test) | max 5000 VRMS | 6 |
| Safety input, output, or supply current IS | RθJA = 84.6°C/W, VDDx = 5.5 V, TJ = 150°C, TA = 25°C | max 270 mA | 7 |
| Safety input, output, or supply current IS | RθJA = 84.6°C/W, VDDx = 3.6 V, TJ = 150°C, TA = 25°C | max 410 mA | 7 |
| Safety input, output, or total power PS | RθJA = 84.6°C/W, TJ = 150°C, TA = 25°C | max 1480 mW | 7 |
| Maximum safety temperature TS | max 150 °C | 7 | |
| Offset voltage VOS | TA = 25°C, INN = INP = GND1, 4.5 V ≤ VDD1 ≤ 5.5 V; typical ±0.3 mV | min -1.5 · typ 0.3 · max 1.5 mV | 8 |
| Offset voltage VOS | TA = 25°C, INN = INP = GND1, 3.0 V ≤ VDD1 ≤ 5.5 V; typical at VDD1 = 3.3 V | min -2.5 · typ -0.8 · max 2.5 mV | 8 |
| Offset voltage long-term stability ΔVOS | 10 years at TA = 55℃; below measurement capability | typ 0 mV | 8 |
| Offset voltage thermal drift TCVOS | INN = INP = GND1; typical ±3 uV/°C | min -15 · typ 3 · max 15 uV/°C | 8 |
| Offset voltage thermal drift long-term stability ΔTCVOS | 10 years at TA = 55℃, INN = INP = GND1; below measurement capability | typ 0 mV/°C | 8 |
| Input resistance, differential RIN | min 2 · typ 2.5 · max 3 MΩ | 8 | |
| Input resistance, single ended RIN | INN = GND1 | min 1 · typ 1.25 · max 1.5 MΩ | 8 |
| Input resistance long-term stability ΔRIN | 10 years at TA = 55℃; below measurement capability | typ 0 ppm | 8 |
| Input resistance thermal drift TCRIN | –40℃ ≤ TA ≤ 85℃ | typ 5 ppm/°C | 8 |
| Single-ended input capacitance CIN | INN = HGND, fIN = 275 kHz | typ 4 pF | 8 |
| Differential input capacitance CIND | fIN = 275 kHz | typ 2 pF | 8 |
| Nominal gain | typ 0.4 V/V | 8 | |
| Gain error EG | TA = 25℃; typical ±0.05% | min -0.2 · typ 0.05 · max 0.2 % | 8 |
| Gain error long-term stability ΔEG | 10 years at TA = 55℃; below measurement capability | typ 0 | 8 |
| Gain error thermal drift TCEG | Typical ±10 ppm/°C | min -35 · typ 10 · max 35 ppm/°C | 8 |
| Gain error thermal drift long-term stability ΔTCEG | 10 years at TA = 55℃; below measurement capability | typ 0 ppm/°C | 8 |
| Nonlineartity | Typical ±0.003% | min -0.02 · typ 0.003 · max 0.02 % | 8 |
| Nonlinearity thermal drift | typ 0.2 ppm/°C | 8 | |
| Total harmonic distortion THD | VIN = 10 VPP, fIN = 10 kHz, BW = 100 kHz | typ -87 dB | 8 |
| Signal-to-noise ratio SNR | VIN = 10 VPP, fIN = 1 kHz, BW = 10 kHz | min 81 · typ 85 dB | 8 |
| Signal-to-noise ratio SNR | VIN = 10 VPP, fIN = 10 kHz, BW = 100 kHz | typ 75 dB | 8 |
| Output noise | INN = INP = GND1, BW = 100 kHz | typ 250 uVrms | 8 |
| Common-mode rejection ratio CMRR | DC, INN = INP, VCM min ≤ VCM ≤ VCM max | typ -72 dB | 8 |
| Common-mode rejection ratio CMRR | fIN = 10 kHz, INN = INP = 10 VPP | typ -71 dB | 8 |
| Power-supply rejection ratio PSRR | PSRR vs VDD1, DC; input referred | typ -67 dB | 8 |
| Power-supply rejection ratio PSRR | PSRR vs VDD2, DC; input referred | typ -80 dB | 8 |
| Power-supply rejection ratio PSRR | PSRR vs VDD1 with 10-kHz, 100-mV ripple; input referred | typ -65 dB | 8 |
| Power-supply rejection ratio PSRR | PSRR vs VDD2 with 10-kHz, 100-mV ripple; input referred | typ -64 dB | 8 |
| Output common-mode voltage VCMout | min 1.39 · typ 1.44 · max 1.49 V | 8 | |
| Clipping differential output voltage VCLIPout | VOUT = (VOUTP – VOUTN), VIN > VClipping | typ 2.49 V | 8 |
| Fail-safe differential output voltage VFail-safe | VDD1 undervoltage or VDD1 missing | typ -2.57 · max -2.5 V | 8 |
| Output bandwidth BW | min 275 · typ 300 kHz | 8 | |
| Output resistance ROUT | On OUTP or OUTN; typical < 0.2 Ω | typ 0.2 Ω | 8 |
| Output short-circuit current | On OUTP or OUTN, sourcing or sinking, INN = INP = GND1, outputs shorted to either GND or VDD2 | typ 14 mA | 9 |
| Common-mode transient immunity CMTI | min 100 · typ 150 kV/us | 9 | |
| VDD1 undervoltage detection threshold VDD1UV | VDD1 rising | min 2.5 · typ 2.7 · max 2.9 V | 9 |
| VDD1 undervoltage detection threshold VDD1UV | VDD1 falling | min 2.4 · typ 2.6 · max 2.8 V | 9 |
| VDD2 undervoltage detection threshold VDD2UV | VDD2 rising | min 2.2 · typ 2.45 · max 2.65 V | 9 |
| VDD2 undervoltage detection threshold VDD2UV | VDD2 falling | min 1.85 · typ 2 · max 2.2 V | 9 |
| High-side supply current IDD1 | 3.0 V < VDD1 < 3.6 V | typ 6 · max 8.1 mA | 9 |
| High-side supply current IDD1 | 4.5 V < VDD1 < 5.5 V | typ 7 · max 9.3 mA | 9 |
| Low-side supply current IDD2 | 3.0 V < VDD2 < 3.6 V | typ 5.3 · max 7.2 mA | 9 |
| Low-side supply current IDD2 | 4.5 V < VDD2 < 5.5 V | typ 5.9 · max 8.1 mA | 9 |
Pins, by the datasheet
8- 1 VDD1
- High-side power supply. · p. 3
- 2 INP
- Noninverting analog input; either INP or INN must have a DC current path to GND1 to define the common-mode input voltage. · p. 3
- 3 INN
- Inverting analog input; either INP or INN must have a DC current path to GND1 to define the common-mode input voltage. · p. 3
- 4 GND1
- High-side analog ground. · p. 3
- 5 GND2
- Low-side analog ground. · p. 3
- 6 OUTN
- Inverting analog output. · p. 3
- 7 OUTP
- Noninverting analog output. · p. 3
- 8 VDD2
- Low-side power supply. · p. 3
Parameters
20- -3dB Bandwidth
- 300kHz
- CMTI(kV/us)
- 150kV/us
- Common Mode Rejection Ratio (CMRR)
- -72dB
- Current - Supply
- 12.3mA
- Differential Input Voltage
- ±5V
- Features
- Full-differential topology
- Gain
- 0.4
- Isolation Voltage(Vrms)
- 5000
- Junction Temperature(Max)
- 150℃
- Operating Temperature
- -55℃~+125℃
- Output Current per Pin(Max)
- 10mA
- Output Type
- Differential
- Thermal Resistance(Junction to Ambient)
- 84.6℃/W
- Thermal Resistance(Junction to Board)
- 41.1℃/W
- Thermal Resistance(Junction to Case)
- 28.3℃/W
- Voltage - Supply
- 3V~5.5V
- Voltage - Supply(Absolute Max)
- 6.5V
- Voltage - Supply(Input)
- 3V~5.5V
- Voltage - Supply(Output)
- 3V~5.5V
- Vos - Input Offset Voltage
- 300uV
Order codes
1- AMC1350DWVRLCSC C4990162
Pinout
8| Pin | Name | Type |
|---|---|---|
| 1 | VDD1 | Power in |
| 2 | IN+ | Input |
| 3 | IN- | Input |
| 4 | GND1 | Power in |
| 5 | GND2 | Power in |
| 6 | OUT- | Output |
| 7 | OUT+ | Output |
| 8 | VDD2 | Power in |
Open-source boards using it
All 3- 2 layers96 × 57 mm

- 2 layers100 × 143 mm

- 4 layers141.8 × 140.7 mm

Full bridge CSI
ssyhy9-Hongyu/MS_Thesis_PCB
PCB version control for current source inverter project
69 parts
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Is there a KiCad symbol and footprint for the AMC1350DWVR?
Yes. The symbol is Isolator_Analog:AMC1350DWV and the footprint Package_SO:SOIC-8_3.9x4.9mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the AMC1350DWVR?
SOIC-8, with 8 pins. Its footprint is drawn on this page.
Where is the AMC1350DWVR datasheet?
Texas Instruments publishes it: the Datasheet link on this page opens it.
Where can I order the AMC1350DWVR?
JLCPCB lists it as part C4990162, with 3,856 in stock; the sellers' links on this page open their listings.
What can replace the AMC1350DWVR?
Parts like it in the library: the CA-IS1311G by Chipanalog, the ISO224ADWVR by Texas Instruments, the PAI8300E-W5R by 2Pai Semi and the AMC1411QDWLRQ1 by Texas Instruments. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the AMC1350DWVR?
3 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.
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