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PCA9535PW

NXP Semiconductors

-40℃~+85℃ 10mA 16 2.3V~5.5V 250nA 400kHz 8 I2C、SMBus Interrupt Output Push-Pull Reset function、Cascading and address extension TSSOP-24 I/O Expanders ROHS

Extended
DatasheetJLCPCBLCSCnxp/PCA9535PW
Category
I, O Expanders
Package
TSSOP-24
Pins
24

Overview

The PCA9535PW is an i, O Expander made by NXP Semiconductors in a TSSOP-24 package with 24 pins. -40℃~+85℃ 10mA 16 2.3V~5.5V 250nA 400kHz 8 I2C、SMBus Interrupt Output Push-Pull Reset function、Cascading and address extension TSSOP-24 I/O Expanders ROHS.

PCBKit's library has its KiCad symbol (EasyEDA_Cloud:PCA9535PW, from EasyEDA) and its footprint (Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm, from KiCad's library), ready for a KiCad board. 6,044 are in stock at JLCPCB (part C255606). 7 open-source boards in 5 repositories on GitHub use it.

Symbol

INT#1A12A23IO0/04IO0/15IO0/26IO0/37IO0/48IO0/59IO0/610IO0/711VSS12IO1/013IO1/114IO1/215IO1/316IO1/417IO1/518IO1/619IO1/720A021SCL22SDA23VDD24
EasyEDA_Cloud:PCA9535PWFrom EasyEDA

Footprint

123456789101112131415161718192021222324
Package_SO:TSSOP-24_4.4x7.8mm_P0.65mmFrom KiCad's library

From the datasheet

10
Supply, least
2.3 V · VDD, recommended operating min · p. 20
Supply, most
5.5 V · VDD, recommended operating max · p. 20
Supply, absolute maximum
6 V · VDD, absolute maximum · p. 19
Works from
-40 °C · Operating ambient minimum · p. 19
Works up to
85 °C · Operating ambient maximum · p. 19
Takes working
135 µA · VDD operating typical, 5.5 V, no load, 100 kHz, inputs · p. 20
Takes at most
200 µA · VDD operating max, 5.5 V, no load, 100 kHz, inputs · p. 20
Takes asleep
250 nA · Standby typical, VDD = 5.5 V, no load, inputs, clock stopped · p. 20
A pin gives at most
50 mA · I/O output current absolute maximum magnitude · p. 19
A pin gives at most
25 mA · Each I/O externally limited maximum · p. 21

What it is and has

11
Interface
I2C-bus and SMBus, 16-bit I/O port with interrupt · p. 1
GPIO
16 pins, default to inputs · p. 2
Clock frequency
0 Hz to 400 kHz · p. 2
I/O tolerance
5 V · p. 1
Polarity inversion
Polarity Inversion register · p. 1
Interrupt
Active LOW · p. 1
Input filtering
Noise filter on SCL/SDA · p. 1
Power-on reset
Internal · p. 2
Power-up behavior
No glitch on power-up · p. 2
Package options
SO24, TSSOP24, HVQFN24, HWQFN24 · p. 2
Latch-up testing
JEDEC JESD78, exceeds 100 mA · p. 2

Specifications

75
ParameterConditionsAs printedPage
supply voltage VDDmin -0.5 · max 6 V19
voltage on an input/output pin VI/OMinimum: VSS  0.5 Vmax 6 V19
output current IOon an I/O pin; maximum magnitude ±50 mAmax 50 mA19
input current IImaximum magnitude ±20 mAmax 20 mA19
supply current IDDmax 160 mA19
ground supply current ISSmax 200 mA19
total power dissipation Ptotmax 200 mW19
storage temperature Tstgmin -65 · max 150 C19
ambient temperature Tamboperatingmin -40 · max 85 C19
supply voltage VDDmin 2.3 · max 5.5 V20
supply current IDDOperating mode; VDD = 5.5 V; no load; fSCL = 100 kHz; I/O = inputstyp 135 · max 200 A20
standby current IstbStandby mode; VDD = 5.5 V; no load; VI = VSS; fSCL = 0 kHz; I/O = inputstyp 0.25 · max 1 A20
standby current IstbStandby mode; VDD = 5.5 V; no load; VI = VDD; fSCL = 0 kHz; I/O = inputstyp 0.25 · max 1 A20
power-on reset voltage VPORno load; VI = VDD or VSStyp 1.7 · max 2.2 V20
LOW-level input voltage VILInput SCL; input/output SDA; maximum +0.3VDDmin -0.5 V20
HIGH-level input voltage VIHInput SCL; input/output SDA; minimum 0.7VDDmax 5.5 V20
LOW-level output current IOLInput SCL; input/output SDA; VOL = 0.4 Vmin 3 mA20
leakage current ILInput SCL; input/output SDA; VI = VDD = VSSmin -1 · max 1 A20
input capacitance CiInput SCL; input/output SDA; VI = VSStyp 6 · max 10 pF20
LOW-level input voltage VILI/Os; maximum +0.3VDDmin -0.5 V20
HIGH-level input voltage VIHI/Os; minimum 0.7VDDmax 5.5 V20
LOW-level output current IOLI/Os; VDD = 2.3 V to 5.5 V; VOL = 0.5 Vmin 8 · typ 10 mA20
LOW-level output current IOLI/Os; VDD = 2.3 V to 5.5 V; VOL = 0.7 Vmin 10 · typ 14 mA20
HIGH-level output voltage VOHPCA9535 only; IOH = −8 mA; VDD = 2.3 Vmin 1.8 V20
HIGH-level output voltage VOHPCA9535 only; IOH = −10 mA; VDD = 2.3 Vmin 1.7 V20
HIGH-level output voltage VOHPCA9535 only; IOH = −8 mA; VDD = 3.0 Vmin 2.6 V20
HIGH-level output voltage VOHPCA9535 only; IOH = −10 mA; VDD = 3.0 Vmin 2.5 V20
HIGH-level output voltage VOHPCA9535 only; IOH = −8 mA; VDD = 4.75 Vmin 4.1 V20
HIGH-level output voltage VOHPCA9535 only; IOH = −10 mA; VDD = 4.75 Vmin 4 V20
HIGH-level input leakage current ILIHI/Os; VDD = 5.5 V; VI = VDDmax 1 A20
LOW-level input leakage current ILILI/Os; VDD = 5.5 V; VI = VSSmax -1 A20
input capacitance CiI/Ostyp 3.7 · max 5 pF20
output capacitance CoI/Ostyp 3.7 · max 5 pF20
LOW-level output current IOLInterrupt INT; VOL = 0.4 Vmin 3 mA20
LOW-level input voltage VILSelect inputs A0, A1, A2; maximum +0.3VDDmin -0.5 V20
HIGH-level input voltage VIHSelect inputs A0, A1, A2; minimum 0.7VDDmax 5.5 V20
input leakage current ILISelect inputs A0, A1, A2min -1 · max 1 A20
SCL clock frequency fSCLStandard-mode I2C-busmin 0 · max 100 kHz21
SCL clock frequency fSCLFast-mode I2C-busmin 0 · max 400 kHz21
bus free time between a STOP and START condition tBUFStandard-mode I2C-busmin 4.7 s21
bus free time between a STOP and START condition tBUFFast-mode I2C-busmin 1.3 s21
hold time (repeated) START condition tHD;STAStandard-mode I2C-busmin 4 s21
hold time (repeated) START condition tHD;STAFast-mode I2C-busmin 0.6 s21
set-up time for a repeated START condition tSU;STAStandard-mode I2C-busmin 4.7 s21
set-up time for a repeated START condition tSU;STAFast-mode I2C-busmin 0.6 s21
set-up time for STOP condition tSU;STOStandard-mode I2C-busmin 4 s21
set-up time for STOP condition tSU;STOFast-mode I2C-busmin 0.6 s21
data valid acknowledge time tVD;ACKStandard-mode I2C-busmin 0.3 · max 3.45 s21
data valid acknowledge time tVD;ACKFast-mode I2C-busmin 0.1 · max 0.9 s21
data hold time tHD;DATStandard-mode I2C-busmin 0 ns21
data hold time tHD;DATFast-mode I2C-busmin 0 ns21
data valid time tVD;DATStandard-mode I2C-busmin 300 ns21
data valid time tVD;DATFast-mode I2C-busmin 50 ns21
data set-up time tSU;DATStandard-mode I2C-busmin 250 ns21
data set-up time tSU;DATFast-mode I2C-busmin 100 ns21
LOW period of the SCL clock tLOWStandard-mode I2C-busmin 4.7 s21
LOW period of the SCL clock tLOWFast-mode I2C-busmin 1.3 s21
HIGH period of the SCL clock tHIGHStandard-mode I2C-busmin 4 s21
HIGH period of the SCL clock tHIGHFast-mode I2C-busmin 0.6 s21
fall time of both SDA and SCL signals tfStandard-mode I2C-busmax 300 ns21
fall time of both SDA and SCL signals tfFast-mode I2C-bus; minimum 20 + 0.1Cb; Cb in pFmax 300 ns21
rise time of both SDA and SCL signals trStandard-mode I2C-busmax 1000 ns21
rise time of both SDA and SCL signals trFast-mode I2C-bus; minimum 20 + 0.1Cb; Cb in pFmax 300 ns21
pulse width of spikes that must be suppressed by the input filter tSPStandard-mode I2C-busmax 50 ns21
pulse width of spikes that must be suppressed by the input filter tSPFast-mode I2C-busmax 50 ns21
data output valid time tv(Q)Standard-mode I2C-bus; port timing; measured from 0.7VDD on SCL to 50 % I/O output (PCA9535)max 200 ns21
data output valid time tv(Q)Fast-mode I2C-bus; port timing; measured from 0.7VDD on SCL to 50 % I/O output (PCA9535)max 200 ns21
data input set-up time tsu(D)Standard-mode I2C-bus; port timingmin 150 ns21
data input set-up time tsu(D)Fast-mode I2C-bus; port timingmin 150 ns21
data input hold time th(D)Standard-mode I2C-bus; port timingmin 1 s21
data input hold time th(D)Fast-mode I2C-bus; port timingmin 1 s21
valid time on pin INT tv(INT_N)Standard-mode I2C-bus; interrupt timingmax 4 s21
valid time on pin INT tv(INT_N)Fast-mode I2C-bus; interrupt timingmax 4 s21
reset time on pin INT trst(INT_N)Standard-mode I2C-bus; interrupt timingmax 4 s21
reset time on pin INT trst(INT_N)Fast-mode I2C-bus; interrupt timingmax 4 s21

Pins, by the datasheet

24
1 INT
Interrupt output, active LOW. · p. 6
2 A1
Address input 1. · p. 6
3 A2
Address input 2. · p. 6
4 IO0_0
Port 0 input/output; totem-pole output. · p. 6
5 IO0_1
Port 0 input/output; totem-pole output. · p. 6
6 IO0_2
Port 0 input/output; totem-pole output. · p. 6
7 IO0_3
Port 0 input/output; totem-pole output. · p. 6
8 IO0_4
Port 0 input/output; totem-pole output. · p. 6
9 IO0_5
Port 0 input/output; totem-pole output. · p. 6
10 IO0_6
Port 0 input/output; totem-pole output. · p. 6
11 IO0_7
Port 0 input/output; totem-pole output. · p. 6
12 VSS
Supply ground. · p. 6
13 IO1_0
Port 1 input/output; totem-pole output. · p. 6
14 IO1_1
Port 1 input/output; totem-pole output. · p. 6
15 IO1_2
Port 1 input/output; totem-pole output. · p. 6
16 IO1_3
Port 1 input/output; totem-pole output. · p. 6
17 IO1_4
Port 1 input/output; totem-pole output. · p. 6
18 IO1_5
Port 1 input/output; totem-pole output. · p. 6
19 IO1_6
Port 1 input/output; totem-pole output. · p. 6
20 IO1_7
Port 1 input/output; totem-pole output. · p. 6
21 A0
Address input 0. · p. 6
22 SCL
Serial clock line. · p. 6
23 SDA
Serial data line. · p. 6
24 VDD
Supply voltage. · p. 6

Ordering codes, by the datasheet

2
PCA9535PW,112
TSSOP24 · Standard marking; tube bulk packing; minimum order 1575; ambient −40 °C to +85 °C. · p. 2
PCA9535PW,118
TSSOP24 · 13-inch reel Q1/T1; standard SMD marking; minimum order 2500; ambient −40 °C to +85 °C. · p. 2

Parameters

19
Clock Frequency
400kHz
Current - Output High(IOH)
10mA
Current - Output Low(IOL)
10mA
Current - Supply
135uA
Current - Supply(Max)
200uA
Features
Reset function
Interface
SMBus
Interrupt Output
Interrupt Output
Number of I/O
16
Number of Supporting Devices
8
Operating Temperature
-40℃~+85℃
Output Current per Pin(Max)
50mA
Output Logic Level - Low
500mV
Output Type
Push-Pull
Quiescent Current
1uA
Quiescent Supply Current
250nA
Standby Current
250nA
Voltage - Supply
2.3V~5.5V
Voltage - Supply(Absolute Max)
6V

Order codes

3

Pinout

24
The pins of the PCA9535PW
PinNameType
1INT#Unspecified
2A1Unspecified
3A2Unspecified
4IO0/0Unspecified
5IO0/1Unspecified
6IO0/2Unspecified
7IO0/3Unspecified
8IO0/4Unspecified
9IO0/5Unspecified
10IO0/6Unspecified
11IO0/7Unspecified
12VSSUnspecified
13IO1/0Unspecified
14IO1/1Unspecified
15IO1/2Unspecified
16IO1/3Unspecified
17IO1/4Unspecified
18IO1/5Unspecified
19IO1/6Unspecified
20IO1/7Unspecified
21A0Unspecified
22SCLUnspecified
23SDAUnspecified
24VDDUnspecified

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Questions

Is there a KiCad symbol and footprint for the PCA9535PW?

Yes. The symbol is EasyEDA_Cloud:PCA9535PW and the footprint Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the PCA9535PW?

TSSOP-24, with 24 pins. Its footprint is drawn on this page.

Where is the PCA9535PW datasheet?

NXP Semiconductors publishes it: the Datasheet link on this page opens it.

Where can I order the PCA9535PW?

JLCPCB lists it as part C255606, with 6,044 in stock; the sellers' links on this page open their listings.

What can replace the PCA9535PW?

Parts like it in the library: the PCA9555PW by NXP Semiconductors, the TCA9535PW by Texas Instruments, the TCA9555PW by Texas Instruments and the PCA9539PW by NXP Semiconductors. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the PCA9535PW?

7 boards in 5 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

Parts like it

8