2 layers144 × 80 mm
DVDLaserScanner
GaudiLabs/OpenLaserScanningMicroscope
Open Source Laser Scanning Microscope
83 parts345GPL-3.0
MCP4922-E/SL
Microchip TechnologyExtended
-40℃~+125℃ 0.2LSB 12 2 2.7V~5.5V 350uA 4.5us Power-on reset、Power-down mode、Multi-chip synchronization、Programmable gain SPI Voltage Buffer SOIC-14 Digital to Analog Converters (DAC) ROHS
- Part id
- microchip/MCP4922-E/SL
- Category
- Digital To Analog Converters (DAC)
- Package
- SOIC-14
- Pins
- 14
- In stock
- 1,146 at JLCPCB (C39851)
- Used on
- 8 open-source boards
Overview
The MCP4922-E/SL is a digital To Analog Converter made by Microchip Technology in a SOIC-14 package with 14 pins. -40℃~+125℃ 0.2LSB 12 2 2.7V~5.5V 350uA 4.5us Power-on reset、Power-down mode、Multi-chip synchronization、Programmable gain SPI Voltage Buffer SOIC-14 Digital to Analog Converters (DAC) ROHS.
PCBKit's library has its KiCad symbol (Analog_DAC:MCP4922, from KiCad's library) and its footprint (Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, from KiCad's library), ready for a KiCad board. 1,146 are in stock at JLCPCB (part C39851). 8 open-source boards in 7 repositories on GitHub use it.
Symbol
Footprint
From the datasheet
13- Supply, least
- 2.7 V · VDD, recommended operating min · p. 3
- Supply, most
- 5.5 V · VDD, recommended operating max · p. 3
- Supply, absolute maximum
- 6.5 V · VDD, absolute max · p. 3
- Works from
- -40 °C · Operating ambient temperature min · p. 8
- Works up to
- 125 °C · Operating ambient temperature max · p. 8
- Junction, hottest
- 150 °C · Junction temperature absolute max · p. 3
- Takes working
- 350 µA · VDD operating current typical at 5 V, outputs unloaded, code 000h · p. 3
- Takes at most
- 700 µA · VDD operating current max at 5 V, outputs unloaded, code 000h · p. 3
- Takes asleep
- 300 nA · Hardware shutdown current typical, POR off · p. 3
- Takes asleep
- 3.3 µA · Software shutdown current typical, POR on · p. 3
- A pin gives at most
- 25 mA · Output pin current absolute max, magnitude · p. 3
- Junction to air (14L-SOIC)
- 120 K/W · Junction-to-ambient thermal resistance typical · p. 8
- Data rate, most
- 20 Mbit/s · SPI clock max at +25°C · p. 7
What it is and has
8- DAC
- Dual 12-bit voltage output · p. 1
- Output
- Rail-to-rail · p. 1
- SPI
- 20 MHz clock support · p. 1
- Settling time
- 4.5 µs · p. 1
- Output gain
- Selectable unity or 2x · p. 1
- Voltage reference
- External inputs · p. 1
- Multiplier mode
- External multiplier mode · p. 1
- Package options
- 14-pin PDIP, SOIC, TSSOP · p. 1
Around it
2- cap 0.1 µF
- between VDD and VSS; Ceramic bypass capacitor, in parallel with 10 uF tantalum; place within 4 mm of VDD. · p. 27
- cap 10 µF
- between VDD and VSS; Tantalum bypass capacitor, in parallel with 0.1 uF ceramic; place within 4 mm of VDD. · p. 27
Specifications
77| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| VDD VDD | max 6.5 V | 3 | |
| Current at Input Pins | min -2 · max 2 mA | 3 | |
| Current at Supply Pins | min -50 · max 50 mA | 3 | |
| Current at Output Pins | min -25 · max 25 mA | 3 | |
| Storage temperature | min -65 · max 150 °C | 3 | |
| Ambient temp. with power applied | min -55 · max 125 °C | 3 | |
| ESD protection on all pins | HBM | min 4 kV | 3 |
| ESD protection on all pins | MM | min 400 V | 3 |
| Maximum Junction Temperature TJ | max 150 °C | 3 | |
| Operating Voltage VDD | TA = -40 to +85°C | min 2.7 · max 5.5 V | 3 |
| Operating CurrentInput Current IDD | VDD = 5V; VREF unbuffered, digital inputs grounded, outputs unloaded, Code = 000h; typical at +25°C | typ 350 · max 700 uA | 3 |
| Operating CurrentInput Current IDD | VDD = 3V; VREF unbuffered, digital inputs grounded, outputs unloaded, Code = 000h; typical at +25°C | typ 250 · max 500 uA | 3 |
| Hardware Shutdown Current ISHDN | Power-on Reset circuit is turned off; typical at +25°C | typ 0.3 · max 2 uA | 3 |
| Software Shutdown Current ISHDN_SW | Power-on Reset circuit stays on; typical at +25°C | typ 3.3 · max 6 uA | 3 |
| Power-on-Reset Threshold VPOR | Typical at +25°C | typ 2 V | 3 |
| Resolution n | MCP4922 | min 12 Bits | 3 |
| INL Error INL | MCP4922; typical at +25°C | min -12 · max 12 LSb | 3 |
| DNL DNL | MCP4922; guaranteed monotonic by design over all codes; typical at +25°C | min -0.75 · max 0.75 LSb | 3 |
| Offset Error VOS | Code = 0x000h; typical at +25°C | max 1 % of FSR | 3 |
| Offset Error Temperature Coefficient VOS/°C | -45°C to 25°C | typ 0.16 ppm/°C | 4 |
| Offset Error Temperature Coefficient VOS/°C | +25°C to 85°C | typ -0.44 ppm/°C | 4 |
| Gain Error gE | Code = 0xFFFh, not including offset error | typ -0.1 · max 1 % of FSR | 4 |
| Gain Error Temperature Coefficient G/°C | typ -3 ppm/°C | 4 | |
| Input Range – Buffered Mode VREF | Code = 2048; ensured by design, not 100% tested | min 0.04 V | 4 |
| Input Range – Unbuffered Mode VREF | VREF = 0.2V p-p, f = 100 Hz and 1 kHz | min 0 V | 4 |
| Input Impedance RVREF | Unbuffered Mode | typ 165 k | 4 |
| Input Capacitance – Unbuffered Mode CVREF | typ 7 pF | 4 | |
| Multiplier Mode -3 dB Bandwidth fVREF | VREF = 2.5V ±0.2Vp-p, Unbuffered, G = 1x | typ 450 kHz | 4 |
| Multiplier Mode -3 dB Bandwidth fVREF | VREF = 2.5V ±0.2 Vp-p, Unbuffered, G = 2x | typ 400 kHz | 4 |
| Multiplier Mode – Total Harmonic Distortion THDVREF | VREF = 2.5V ±0.2Vp-p, Frequency = 1 kHz | typ -73 dB | 4 |
| Phase Margin m | typ 66 degrees | 4 | |
| Slew Rate SR | typ 0.55 V/us | 4 | |
| Short Circuit Current ISC | typ 15 · max 24 mA | 4 | |
| Settling Time tsettling | Within 1/2 LSb of final value from 1/4 to 3/4 full-scale range | typ 4.5 us | 4 |
| DAC-to-DAC Crosstalk | Ensured by design, not 100% tested | typ 10 nV-s | 4 |
| Major Code Transition Glitch | 1 LSb change around major carry (0111 1111 to 1000 0000); ensured by design, not 100% tested | typ 45 nV-s | 4 |
| Digital Feedthrough | Ensured by design, not 100% tested | typ 10 nV-s | 4 |
| Analog Crosstalk | Ensured by design, not 100% tested | typ 10 nV-s | 4 |
| Operating Voltage VDD | +125°C | min 2.7 · max 5.5 V | 5 |
| Operating Current IDD | +125°C; VREF unbuffered, digital inputs grounded, outputs unloaded, Code=000h | typ 400 uA | 5 |
| Hardware Shutdown Current ISHDN | +125°C; POR circuit is turned-off | typ 1.5 uA | 5 |
| Software Shutdown Current ISHDN_SW | +125°C; POR circuit stays turned-on | typ 5 uA | 5 |
| Power-On Reset threshold VPOR | +125°C | typ 1.85 V | 5 |
| Resolution n | MCP4922; +125°C | min 12 Bits | 5 |
| Offset Error Temperature Coefficient VOS/°C | +25°C to +125°C | typ -5 ppm/°C | 5 |
| Gain Error gE | +125°C; Code = 0xFFFh, not including offset error | typ -0.1 % of FSR | 5 |
| Gain Error Temperature Coefficient G/°C | +125°C | typ -3 ppm/°C | 5 |
| Input Range – Unbuffered Mode VREF | +125°C | min 0 V | 5 |
| Input Impedance RVREF | +125°C; Unbuffered mode | typ 174 k | 5 |
| Input Capacitance – Unbuffered Mode CVREF | +125°C | typ 7 pF | 5 |
| Multiplying Mode -3 dB Bandwidth fVREF | +125°C; VREF = 2.5V ±0.1 Vp-p, Unbuffered, G = 1x | typ 450 kHz | 6 |
| Multiplying Mode -3 dB Bandwidth fVREF | +125°C; VREF = 2.5V ±0.1 Vp-p, Unbuffered, G = 2x | typ 400 kHz | 6 |
| Phase Margin m | +125°C | typ 66 degrees | 6 |
| Slew Rate SR | +125°C | typ 0.55 V/us | 6 |
| Short Circuit Current ISC | +125°C | typ 17 mA | 6 |
| Settling Time tsettling | +125°C; within 1/2 LSb of final value from 1/4 to 3/4 full-scale range | typ 4.5 us | 6 |
| DAC to DAC Crosstalk | +125°C; ensured by design, not 100% tested | typ 10 nV-s | 6 |
| Major Code Transition Glitch | +125°C; 1 LSb change around major carry (0111 1111 to 1000 0000); ensured by design, not 100% tested | typ 45 nV-s | 6 |
| Digital Feedthrough | +125°C; ensured by design, not 100% tested | typ 10 nV-s | 6 |
| Analog Crosstalk | +125°C; ensured by design, not 100% tested | typ 10 nV-s | 6 |
| Input Leakage Current ILEAKAGE | SHDN = LDAC = CS = SDI = SCK + VREF = VDD or VSS | min -1 · max 1 A | 7 |
| Digital Pin Capacitance (All inputs/outputs) CIN, COUT | VDD = 5.0V, TA = +25°C, fCLK = 1 MHz; ensured by design, not 100% tested | typ 10 pF | 7 |
| Clock Frequency FCLK | TA = +25°C; ensured by design, not 100% tested | max 20 MHz | 7 |
| Clock High Time tHI | Ensured by design, not 100% tested | min 15 ns | 7 |
| Clock Low Time tLO | Ensured by design, not 100% tested | min 15 ns | 7 |
| CS Fall to First Rising CLK Edge tCSSR | Applies only when CS falls with CLK high; ensured by design, not 100% tested | min 40 ns | 7 |
| Data Input Setup Time tSU | Ensured by design, not 100% tested | min 15 ns | 7 |
| Data Input Hold Time tHD | Ensured by design, not 100% tested | min 10 ns | 7 |
| SCK Rise to CS Rise Hold Time tCHS | Ensured by design, not 100% tested | min 15 ns | 7 |
| CS High Time tCSH | Ensured by design, not 100% tested | min 15 ns | 7 |
| LDAC Pulse Width tLD | Ensured by design, not 100% tested | min 100 ns | 7 |
| LDAC Setup Time tLS | Ensured by design, not 100% tested | min 40 ns | 7 |
| SCK Idle Time before CS Fall tIDLE | Ensured by design, not 100% tested | min 40 ns | 7 |
| Specified Temperature Range TA | min -40 · max 125 °C | 8 | |
| Operating Temperature Range TA | Reduced performance over extended range; TJ must not exceed 150°C | min -40 · max 125 °C | 8 |
| Storage Temperature Range TA | min -65 · max 150 °C | 8 | |
| Thermal Resistance, 14L-SOIC JA | 14L-SOIC | typ 120 °C/W | 8 |
Pins, by the datasheet
14- 1 VDD
- Supply voltage input, 2.7V to 5.5V. · p. 17
- 2 NC
- No connection. · p. 17
- 3 CS
- Active-low chip select input enabling serial clock and data functions. · p. 17
- 4 SCK
- SPI-compatible serial clock input. · p. 17
- 5 SDI
- SPI-compatible serial data input. · p. 17
- 6 NC
- No connection. · p. 17
- 7 NC
- No connection. · p. 17
- 8 LDAC
- Synchronization input transferring DAC input register settings to output registers; low updates both outputs simultaneously. · p. 17
- 9 SHDN
- Hardware shutdown input; low shuts down both DAC channels. · p. 17
- 10 VOUTB
- DACB output. · p. 17
- 11 VREFB
- DACB reference voltage input, VSS to VDD. · p. 17
- 12 VSS
- Ground reference for all circuitry; connect to a ground plane through a low-impedance connection. · p. 17
- 13 VREFA
- DACA reference voltage input, VSS to VDD. · p. 17
- 14 VOUTA
- DACA output. · p. 17
Open-source boards using it
8- 2 layers50.5 × 128.5 mm
- 2 layers120 × 80 mm
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OpenSourceNeuro/Spikeling
A hardware implementation of spiking neurons for neuroscience teaching and outreach
233 parts21GPL-3.0 - 2 layers70 × 40 mm
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GaudiLabs/GCodeToAnalog
grbl-arduino_micro based Gcode to Analog converter circuit and code
16 parts7LGPL-3.0 - 2 layers101 × 82 mm
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maurer-lbb/inkube_hardware
Open-source hardware (CAD + PCB) for inkudock, a modular incubator and closed-loop electrophysiology, and a water compartment lid preventing evaporation from cell cultures.
117 parts - 2 layers120 × 80 mm
Spikeling v3.1
OpenSourceNeuro/Spikeling
A hardware implementation of spiking neurons for neuroscience teaching and outreach
122 parts21GPL-3.0 - 4 layers60.6 × 100 mm
Theremin
adeboni/eurorack
This repository stores various eurorack module designs I've made
110 parts1GPL-3.0 - 2 layers275 × 185 mm
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kocer/direct-sampling-sdr
Direct-sampling SDR transceiver with four phase-coherent channels, and a class-A power amplifier for 1.8 to 54 MHz.
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Questions
Is there a KiCad symbol and footprint for the MCP4922-E/SL?
Yes. The symbol is Analog_DAC:MCP4922 and the footprint Package_SO:SOIC-14_3.9x8.7mm_P1.27mm, both drawn on this page. PCBKit places them on a board for you when you design with it.
What package is the MCP4922-E/SL?
SOIC-14, with 14 pins. Its footprint is drawn on this page.
Where is the MCP4922-E/SL datasheet?
Microchip Technology publishes it: the Datasheet link on this page opens it.
Where can I order the MCP4922-E/SL?
JLCPCB lists it as part C39851, with 1,146 in stock; the sellers' links on this page open their listings.
What can replace the MCP4922-E/SL?
Parts like it in the library: the TLV5620CD by Texas Instruments, the MS5620 by Hangzhou Ruimeng Tech, the MAX5719AGSD+ by Maxim Integrated (Analog Devices) and the MS5542 by Hangzhou Ruimeng Tech. Check their datasheets: a part that fits the footprint may still differ in its ratings.
Which open-source boards use the MCP4922-E/SL?
8 boards in 7 repositories on GitHub; the most starred are listed on this page, with their KiCad files.