ATMEGA4809-AF

Microchip Technology

-40℃~+125℃ 1.8V~5.5V 10bit 20MHz 256Byte 41 48KB 6KB 8 Bit AVR Built-in FLASH TQFP-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHS

Extended

Datasheetmicrochip/ATMEGA4809-AF

Category: Microcontrollers (MCU, MPU, SOC)
Package: TQFP-48(7x7)
Pins: 48

Overview

The ATMEGA4809-AF is a microcontroller made by Microchip Technology in a TQFP-48(7x7) package with 48 pins. -40℃~+125℃ 1.8V~5.5V 10bit 20MHz 256Byte 41 48KB 6KB 8 Bit AVR Built-in FLASH TQFP-48(7x7) Microcontrollers (MCU/MPU/SOC) ROHS.

PCBKit's library has its KiCad symbol (MCU_Microchip_ATmega:ATmega4809-A, from KiCad's library) and its footprint (Package_QFP:TQFP-48_7x7mm_P0.5mm, from KiCad's library), ready for a KiCad board. 766 are in stock at JLCPCB (part C189475). 22 open-source boards in 20 repositories on GitHub use it.

Symbol

MCU_Microchip_ATmega:ATmega4809-AFrom KiCad's library

Footprint

Package_QFP:TQFP-48_7x7mm_P0.5mmFrom KiCad's library

From the datasheet

Supply, least: 1.8 V · VDD, recommended operating min · p. 455
Supply, most: 5.5 V · VDD, recommended operating max · p. 455
Supply, absolute maximum: 6 V · VDD, absolute maximum · p. 454
Takes working: 11.4 mA · VDD, typical active at 20 MHz, 5 V, peripherals disabled · p. 457
A pin gives at most: 40 mA · I/O pin sink/source absolute maximum · p. 454
Junction to air (TQFP48): 68 K/W · junction to ambient · p. 457
Junction to case (TQFP48): 17 K/W · junction to case · p. 457
Edge: 1.3 ns · typical fall time, VDD = 5.0 V, load = 20 pF · p. 464
Takes asleep: 100 nA · VDD, typical Power-down/Standby current, all peripherals stopped, 3 V, 25°C · p. 458
Edge: 2.7 ns · Typical SPI master SCK rise time · p. 466

What it is and has

Flash memory: 48 KB · p. 1
Processor: AVR processor with hardware multiplier, up to 20 MHz · p. 1
SRAM: Up to 6 KB · p. 1
EEPROM: 256 bytes · p. 1

Specifications

178

Parameter	Conditions	As printed	Page
Power Supply Voltage VDD		min -0.5 · max 6 V	454
Current into a VDD pin IVDD	TA = [-40, 85]°C	max 200 mA	454
Current into a VDD pin IVDD	TA = [85, 125]°C	max 100 mA	454
Current out of a GND pin IGND	TA = [-40, 85]°C	max 200 mA	454
Current out of a GND pin IGND	TA = [85, 125]°C	max 100 mA	454
Pin voltage with respect to GND VPIN	Maximum: VDD+0.5 V	min -0.5 V	454
I/O pin sink/source current IPIN		min -40 · max 40 mA	454
I/O pin injection current except for the RESET pin Ic1(1)	Vpin < GND-0.6V or 5.5V < Vpin ≤ 6.1V; 4.9V < VDD ≤ 5.5V	min -1 · max 1 mA	454
I/O pin injection current except for the RESET pin Ic2(1)	Vpin < GND-0.6V or Vpin ≤ 5.5V; VDD ≤ 4.9V	min -15 · max 15 mA	454
Storage temperature Tstorage		min -65 · max 150 °C	454
Operating Supply Voltage VDD	Operation guaranteed down to 1.8V or BOD triggering level when BOD is active	min 1.8 · max 5.5 V	455
Operating Supply Voltage VDD	VAO - Auto Grade and Extended Operating temperature range	min 2.7 · max 5.5 V	455
Operating temperature range TA	Extended	min -40 · max 125 °C	455
Operating temperature range TA	Industrial	min -40 · max 85 °C	455
Nominal operating system clock frequency fCLK_CPU	VDD = [1.8, 5.5]V; TA = [-40, 105]°C; excludes automotive range parts (-VAO)	min 0 · max 5 MHz	455
Nominal operating system clock frequency fCLK_CPU	VDD = [2.7, 5.5]V; TA = [-40, 105]°C; excludes automotive range parts (-VAO)	min 0 · max 10 MHz	455
Nominal operating system clock frequency fCLK_CPU	VDD = [4.5, 5.5]V; TA = [-40, 105]°C; excludes automotive range parts (-VAO)	min 0 · max 20 MHz	455
Nominal operating system clock frequency fCLK_CPU	VDD = [2.7, 5.5]V; TA = [-40, 125]°C	min 0 · max 8 MHz	455
Nominal operating system clock frequency fCLK_CPU	VDD = [4.5, 5.5]V; TA = [-40, 125]°C	min 0 · max 16 MHz	455
RθJA RθJA	TQFP48; TA = -40°C to 125°C	typ 68 °C/W	457
RθJC RθJC	TQFP48; TA = -40°C to 125°C	typ 17 °C/W	457
PD PD	TQFP48; TA = -40°C to 125°C; Active 5V/20MHz	typ 50 mW	457
TJ - TA TJ - TA	TQFP48; TA = -40°C to 125°C; Active 5V/20MHz	typ 3.4 °C	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 1; 20 MHz; VDD = 5V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 11.4 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 2; 10 MHz; VDD = 5V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 5.7 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 2; 10 MHz; VDD = 3V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 3.2 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 4; 5 MHz; VDD = 5V; peripherals disabled, I/O ports driven low with inputs disabled; typical at TA = 25°C	typ 3.8 · max 5 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 4; 5 MHz; VDD = 3V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 1.6 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x2; PDIV = 4; 5 MHz; VDD = 2V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 1.2 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x1; PDIV = 1; 16 MHz; VDD = 5V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 8.6 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x1; PDIV = 2; 8 MHz; VDD = 5V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 4.3 mA	457
Active power consumption	Active; OSC20M FREQSEL = 0x1; PDIV = 2; 8 MHz; VDD = 3V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 2.6 mA	457
Active power consumption	Active; OSCULP32K; PDIV = 1; 32.768 kHz; VDD = 5V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 21 uA	457
Active power consumption	Active; OSCULP32K; PDIV = 1; 32.768 kHz; VDD = 3V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 12 uA	457
Active power consumption	Active; OSCULP32K; PDIV = 1; 32.768 kHz; VDD = 2V; TA = 25°C; peripherals disabled, I/O ports driven low with inputs disabled	typ 8 uA	457
Frequency fCLCL	VDD=[1.8, 5.5]V	min 0 · max 5 MHz	463
Frequency fCLCL	VDD=[2.7, 5.5]V	min 0 · max 10 MHz	463
Frequency fCLCL	VDD=[4.5, 5.5]V	min 0 · max 20 MHz	463
Clock Period tCLCL	VDD=[1.8, 5.5]V	min 200 ns	463
Clock Period tCLCL	VDD=[2.7, 5.5]V	min 100 ns	463
Clock Period tCLCL	VDD=[4.5, 5.5]V	min 50 ns	463
High Time tCHCX(1)	VDD=[1.8, 5.5]V; design guidance only, not production tested	min 80 ns	463
High Time tCHCX(1)	VDD=[2.7, 5.5]V; design guidance only, not production tested	min 40 ns	463
High Time tCHCX(1)	VDD=[4.5, 5.5]V; design guidance only, not production tested	min 20 ns	463
Low Time tCLCX(1)	VDD=[1.8, 5.5]V; design guidance only, not production tested	min 80 ns	463
Low Time tCLCX(1)	VDD=[2.7, 5.5]V; design guidance only, not production tested	min 40 ns	463
Low Time tCLCX(1)	VDD=[4.5, 5.5]V; design guidance only, not production tested	min 20 ns	463
Rise Time (for maximum frequency) tCLCH(1)	VDD=[1.8, 5.5]V; design guidance only, not production tested	max 40 ns	463
Rise Time (for maximum frequency) tCLCH(1)	VDD=[2.7, 5.5]V; design guidance only, not production tested	max 20 ns	463
Rise Time (for maximum frequency) tCLCH(1)	VDD=[4.5, 5.5]V; design guidance only, not production tested	max 10 ns	463
Fall Time (for maximum frequency) tCHCL(1)	VDD=[1.8, 5.5]V; design guidance only, not production tested	max 40 ns	463
Fall Time (for maximum frequency) tCHCL(1)	VDD=[2.7, 5.5]V; design guidance only, not production tested	max 20 ns	463
Fall Time (for maximum frequency) tCHCL(1)	VDD=[4.5, 5.5]V; design guidance only, not production tested	max 10 ns	463
Change in period from one clock cycle to the next ΔtCLCL(1)	VDD=[1.8, 5.5]V; design guidance only, not production tested	max 20 %	463
Change in period from one clock cycle to the next ΔtCLCL(1)	VDD=[2.7, 5.5]V; design guidance only, not production tested	max 20 %	463
Change in period from one clock cycle to the next ΔtCLCL(1)	VDD=[4.5, 5.5]V; design guidance only, not production tested	max 20 %	463
Input Low Voltage VIL	TA=[-40, 85]°C, VDD=[1.8, 5.5]V; maximum = 0.3×VDD	min -0.2 V	463
I/O pin drive strength VOL	TA=[-40, 85]°C; VDD = 1.8V, IOL = 1.5 mA	max 0.36 V	463
I/O pin drive strength VOL	TA=[-40, 85]°C; VDD = 3.0V, IOL = 7.5 mA	max 0.6 V	463
I/O pin drive strength VOL	TA=[-40, 85]°C; VDD = 5.0V, IOL = 15 mA	max 1 V	463
I/O pin drive strength VOH	TA=[-40, 85]°C; VDD = 1.8V, IOH = 1.5 mA	min 1.44 V	463
I/O pin drive strength VOH	TA=[-40, 85]°C; VDD = 3.0V, IOH = 7.5 mA	min 2.4 V	463
I/O pin drive strength VOH	TA=[-40, 85]°C; VDD = 5.0V, IOH = 15 mA	min 4 V	463
Maximum combined I/O sink/source current per pin group Itotal	TA = 125°C; design guidance only, not production tested	max 100 mA	464
Maximum combined I/O sink/source current per pin group Itotal	TA = 25°C; design guidance only, not production tested	max 200 mA	464
Rise time tRISE	VDD = 3.0V, load = 20 pF; typical at TA = 25°C	typ 2.5 ns	464
Rise time tRISE	VDD= 5.0 V, load = 20 pF; typical at TA = 25°C	typ 1.5 ns	464
Rise time tRISE	VDD = 3.0 V, load = 20 pF, slew rate enabled; typical at TA = 25°C	typ 19 ns	464
Rise time tRISE	VDD= 5.0 V, load = 20 pF, slew rate enabled; typical at TA = 25°C	typ 9 ns	464
Fall time tFALL	VDD = 3.0 V, load = 20 pF; typical at TA = 25°C	typ 2 ns	464
Fall time tFALL	VDD = 5.0 V, load = 20 pF; typical at TA = 25°C	typ 1.3 ns	464
Fall time tFALL	VDD = 3.0 V, load = 20 pF, slew rate enabled; typical at TA = 25°C	typ 21 ns	464
Fall time tFALL	VDD = 5.0 V, load = 20 pF, slew rate enabled; typical at TA = 25°C	typ 11 ns	464
I/O pin capacitance except for TOSC, VREFA, and TWI pins Cpin	Typical at TA = 25°C, VDD = 3V	typ 3.5 pF	464
I/O pin capacitance on TOSC pins Cpin	Typical at TA = 25°C, VDD = 3V	typ 4 pF	464
I/O pin capacitance on TWI pins Cpin	Typical at TA = 25°C, VDD = 3V	typ 10 pF	464
I/O pin capacitance on VREFA pin Cpin	Typical at TA = 25°C, VDD = 3V	typ 14 pF	464
Pull-up resistor Rp	TA=[-40, 85]°C, VDD=[1.8, 5.5]V; typical at TA = 25°C, VDD = 3V	min 20 · typ 35 · max 50 kΩ	464
Pin voltage with respect to GND VPIN		min -0.5 V	454
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 1; fCLK_CPU = 20 MHz; VDD = 5V	typ 11.4 mA	457
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 5V	typ 5.7 mA	457
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 3V	typ 3.2 mA	457
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 5V	typ 3.8 · max 5 mA	457
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 3V	typ 1.6 mA	457
Active power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 2V	typ 1.2 mA	457
Active power consumption	OSC20M FREQSEL = 0x1; PDIV = 1; fCLK_CPU = 16 MHz; VDD = 5V	typ 8.6 mA	457
Active power consumption	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 5V	typ 4.3 mA	457
Active power consumption	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 3V	typ 2.6 mA	457
Active power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 5V	typ 21 uA	457
Active power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 3V	typ 12 uA	457
Active power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 2V	typ 8 uA	457
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 1; fCLK_CPU = 20 MHz; VDD = 5V	typ 2.8 mA	458
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 5V	typ 1.4 mA	458
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 3V	typ 0.8 mA	458
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 5V	typ 1.3 · max 3.5 mA	458
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 3V	typ 0.4 mA	458
Idle power consumption	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 2V	typ 0.3 mA	458
Idle power consumption	OSC20M FREQSEL = 0x1; PDIV = 1; fCLK_CPU = 16 MHz; VDD = 5V	typ 2.3 mA	458
Idle power consumption	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 5V	typ 1.3 mA	458
Idle power consumption	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 3V	typ 0.7 mA	458
Idle power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 5V	typ 5.6 uA	458
Idle power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 3V	typ 2.8 uA	458
Idle power consumption	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz; VDD = 2V	typ 1.8 uA	458
Standby power consumption	RTC running at 1.024 kHz from external XOSC32K (CL = 7.5 pF); VDD = 3V; typical at 25°C	typ 0.7 uA	458
Standby power consumption	RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; typical at 25°C, maximum at 85°C	typ 0.7 · max 6 uA	458
Standby power consumption	RTC running at 1.024 kHz from internal OSCULP32K; VDD = 3V; maximum at 125°C	max 16 uA	458
Power-down/Standby power consumption are the same when all peripherals are stopped	All peripherals stopped; VDD = 3V; typical at 25°C, maximum at 85°C	typ 0.1 · max 5 uA	458
Power-down/Standby power consumption are the same when all peripherals are stopped	All peripherals stopped; VDD = 3V; maximum at 125°C	max 15 uA	458
Reset power consumption	RESET line pulled low; VDD = 3V; typical at 25°C	typ 100 uA	458
Start-up time from the release of any Reset source. Execution of first instruction. tstartup	Any clock source, PDIV, fCLK_CPU and VDD	typ 200 us	459
Wake-up from Idle twakeup	OSC20M FREQSEL = 0x2; PDIV = 1; fCLK_CPU = 20 MHz; VDD = 5V	typ 1 us	459
Wake-up from Idle twakeup	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 3V	typ 2 us	459
Wake-up from Idle twakeup	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 2V	typ 4 us	459
Wake-up from Idle twakeup	OSC20M FREQSEL = 0x1; PDIV = 1; fCLK_CPU = 16 MHz; VDD = 5V	typ 1.2 us	459
Wake-up from Idle twakeup	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 3V	typ 2.4 us	459
Wake-up from Idle twakeup	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz	typ 700 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSC20M FREQSEL = 0x2; PDIV = 1; fCLK_CPU = 20 MHz; VDD = 5V	typ 12 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSC20M FREQSEL = 0x2; PDIV = 2; fCLK_CPU = 10 MHz; VDD = 3V	typ 13 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSC20M FREQSEL = 0x2; PDIV = 4; fCLK_CPU = 5 MHz; VDD = 2V	typ 15 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSC20M FREQSEL = 0x1; PDIV = 1; fCLK_CPU = 16 MHz; VDD = 5V	typ 16 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSC20M FREQSEL = 0x1; PDIV = 2; fCLK_CPU = 8 MHz; VDD = 3V	typ 15 us	459
Wake-up time from Standby or Power-down when clock source is stopped twakeup	OSCULP32K; PDIV = 1; fCLK_CPU = 32.768 kHz	typ 750 us	459
BOD	Continuous	typ 19 uA	460
BOD	Sampling @ 1 kHz	typ 1.2 uA	460
TCA	16-bit count @ 1 MHz	typ 13 uA	460
TCB	16-bit count @ 1 MHz	typ 7.4 uA	460
RTC	16-bit count @ OSCULP32K	typ 1.2 uA	460
WDT (including OSCULP32K)		typ 0.7 uA	460
OSC20M		typ 130 uA	460
AC	Fast mode; CPU in Standby mode	typ 92 uA	460
AC	Low-Power mode; CPU in Standby mode	typ 45 uA	460
ADC	50 ksps; average with ADC active in Free-Running mode	typ 330 uA	460
ADC	100 ksps; average with ADC active in Free-Running mode	typ 340 uA	460
XOSC32K	CL = 7.5 pF	typ 0.5 uA	460
OSCULP32K		typ 0.4 uA	460
USART	Enable @ 9600 Baud	typ 13 uA	460
SPI (Master)	Enable @ 100 kHz	typ 2.1 uA	460
TWI (Master)	Enable @ 100 kHz	typ 24 uA	460
TWI (Slave)	Enable @ 100 kHz	typ 17 uA	460
Flash programming	Erase Operation	typ 1.5 mA	460
Flash programming	Write Operation	typ 3 mA	460
Power-on Slope SRON	For design guidance only and not tested in production	max 100 V/ms	460
SCK clock frequency fSCK	Master	max 10 MHz	465
SCK period tSCK	Master	min 100 ns	465
SCK rise time tSCKR	Master	typ 2.7 ns	465
SCK fall time tSCKF	Master	typ 2.7 ns	465
MISO setup to SCK tMIS	Master	typ 10 ns	465
MISO hold after SCK tMIH	Master	typ 10 ns	465
MOSI hold after SCK tMOH	Master	typ 1 ns	465
Slave SCK clock frequency fSSCK	Slave	max 5 MHz	466
Internal reference voltage 1V1	VDD = [1.8V, 5.5V]; T = [0 - 105]°C	min -2 · max 2 %	470
Internal reference voltage 0V55, 1V5, 2V5, 4V3	VDD = [1.8V, 5.5V]; T = [0 - 105]°C	min -3 · max 3 %	470
Internal reference voltage 0V55, 1V1, 1V5, 2V5, 4V3	VDD = [1.8V, 5.5V]; T = [-40 - 125]°C	min -5 · max 5 %	470
Internal reference voltage 0V55, 1V1, 1V5, 2V5	VDD = [1.8V, 5.5V]; T = [0 - 105]°C	min -3 · max 3 %	470
Supply voltage VDD	CLKADC ≤ 1.5 MHz	min 1.8 · max 5.5 V	471
Supply voltage VDD	CLKADC > 1.5 MHz	min 2.7 · max 5.5 V	471
Reference voltage VREF	REFSEL = Internal reference	min 0.55 V	471
Reference voltage VREF	REFSEL = External reference	min 1.1 V	471
Reference voltage VREF	REFSEL = VDD	min 1.8 · max 5.5 V	471
Input capacitance CIN	SAMPCAP = 5 pF	typ 5 pF	471
Input capacitance CIN	SAMPCAP = 10 pF	typ 10 pF	471
Input resistance RIN		typ 14 kΩ	471
Input voltage range VIN		min 0 V	471
Input bandwidth IBAND	1.1V ≤ VREF	max 57.5 kHz	471
Sample rate fADC	1.1V ≤ VREF	min 15 · max 115 ksps	471
Sample rate fADC	1.1V ≤ VREF (8-bit resolution)	min 15 · max 150 ksps	471
Sample rate fADC	VREF = 0.55V (10 bits)	min 7.5 · max 20 ksps	471
Clock frequency CLKADC	VREF = 0.55V (10 bits)	min 100 · max 260 kHz	471
Clock frequency CLKADC	1.1V ≤ VREF (10 bits)	min 200 · max 1500 kHz	471
Clock frequency CLKADC	1.1V ≤ VREF (8-bit resolution)	min 200 · max 2000 kHz	471
Sampling time Ts		min 2 · typ 2 · max 33 CLKADC cycles	471
Conversion time (latency) TCONV	Sampling time = 2 CLKADC	min 8.7 · max 50 us	471
Start-up time TSTART	Internal VREF	typ 22 us	471
Resolution Res		typ 10 bit	471
Integral Non-linearity INL	REFSEL = INTERNAL; VREF = 0.55V; fADC = 7.7 ksps	typ 1 · max 3 LSB	471
Integral Non-linearity INL	REFSEL = INTERNAL or VDD; 1.1V ≤ VREF; fADC = 15 ksps	typ 1 · max 3 LSB	471
Integral Non-linearity INL	REFSEL = INTERNAL or VDD; 1.1V ≤ VREF; fADC = 77 ksps	typ 1 · max 3 LSB	471
Integral Non-linearity INL	REFSEL = INTERNAL or VDD; 1.1V ≤ VREF; fADC = 115 ksps	typ 1.2 · max 3 LSB	471

Parameters

ADC (Bit): 10bit
CPU Core: AVR
CPU Maximum Speed: 20MHz
Core Size: 8 Bit
Current - Supply: 11.4mA
EEPROM: 256Byte
Features: Calendar function
Number of I/O: 41
Operating Temperature: -40℃~+125℃
Oscillator Type: Built-in
Output Current per Pin(Max): 40mA
Program Memory Type: FLASH
Program Storage Size: 48KB
RAM Size: 6KB
Rise Time: 1.3ns
Standby Current: 100nA
Thermal Resistance(Junction to Ambient): 68℃/W
Thermal Resistance(Junction to Case): 17℃/W
Voltage - Supply: 1.8V~5.5V
Voltage - Supply(Absolute Max): 6V

Order codes

ATMEGA4809-AFLCSC C1340466
ATMEGA4809-AFRLCSC C189475

Pinout

The pins of the ATMEGA4809-AF
Pin	Name	Type
1	PA5	Input/output
2	PA6	Input/output
3	PA7	Input/output
4	PB0	Input/output
5	PB1	Input/output
6	PB2	Input/output
7	PB3	Input/output
8	PB4	Input/output
9	PB5	Input/output
10	PC0	Input/output
11	PC1	Input/output
12	PC2	Input/output
13	PC3	Input/output
14	VCC	Power in
15	GND	Power in
16	PC4	Input/output
17	PC5	Input/output
18	PC6	Input/output
19	PC7	Input/output
20	PD0	Input/output
21	PD1	Input/output
22	PD2	Input/output
23	PD3	Input/output
24	PD4	Input/output
25	PD5	Input/output
26	PD6	Input/output
27	PD7	Input/output
28	AVCC	Power in
29	GND	Passive
30	PE0	Input/output
31	PE1	Input/output
32	PE2	Input/output
33	PE3	Input/output
34	PF0	Input/output
35	PF1	Input/output
36	PF2	Input/output
37	PF3	Input/output
38	PF4	Input/output
39	PF5	Input/output
40	PF6/RESET	Input/output
41	UPDI	Input/output
42	VCC	Passive
43	GND	Passive
44	PA0	Input/output
45	PA1	Input/output
46	PA2	Input/output
47	PA3	Input/output
48	PA4	Input/output

Open-source boards using it

All 22

6 layers60 × 55 mm
PoE Ethernet GPIB Adapter
Kofen/PoE_Ethernet_GPIB_Adapter
This folder contains the necessary hardware files for the PoE Ethernet GPIB Adapter project.
198 parts120GPL-3.0
2 layers64.8 × 73.7 mm
Vr65c02-v1
crmaykish/VR65C02
Replacing all the memory and peripherals in a 6502 computer with a single ATMEGA4809 microcontroller
27 parts15MIT
2 layers150 × 100 mm
Christmas banana synth
adaand00/christmas-banana-synth
The Christmas banana synth is a stylophone synthesizer with 24 keys and a buzzer for sound. The back features PCB art of a winter landscape. There are also 12 built-in songs available.
87 parts2
4 layers50 × 50 mm
Logic
Keisuke063/rs775-smart-motor-driver

45 parts1
2 layers33 × 48.9 mm
MGC module
0x007E/mgc_m4809
MeGARCard - ATMega4809 Module
48 parts
2 layers57.2 × 94.5 mm
Dnd keeb
a5huynh/embedded
Various embedded projects
30 parts
2 layers60 × 51.5 mm
NanoEvery Replica
arhamrizwan2006/arduino-nano-every-pcb-replica
Chip-level PCB replica of the Arduino Nano Every (ABX00028), designed in KiCad 10 — full schematic, routing, and manufacturing files
23 parts
2 layers40 × 90 mm
WingBoard
benjohnemmett/Wingman
Hardware layout and code for a basic fixed wing flight controller.
85 partsMIT

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A picture

<img src="https://pcbkit.io/embed/parts/microchip/ATMEGA4809-AF.jpg" alt="ATMEGA4809-AF" width="1200" height="900">

A picture that opens the part, for a README

[![ATMEGA4809-AF](https://pcbkit.io/embed/parts/microchip/ATMEGA4809-AF.jpg?size=s)](https://pcbkit.io/parts/microchip/ATMEGA4809-AF)

Questions

Is there a KiCad symbol and footprint for the ATMEGA4809-AF?

Yes. The symbol is MCU_Microchip_ATmega:ATmega4809-A and the footprint Package_QFP:TQFP-48_7x7mm_P0.5mm, both drawn on this page. PCBKit places them on a board for you when you design with it.

What package is the ATMEGA4809-AF?

TQFP-48(7x7), with 48 pins. Its footprint is drawn on this page.

Where is the ATMEGA4809-AF datasheet?

Microchip Technology publishes it: the Datasheet link on this page opens it.

Where can I order the ATMEGA4809-AF?

JLCPCB lists it as part C189475, with 766 in stock; the sellers' links on this page open their listings.

What can replace the ATMEGA4809-AF?

Parts like it in the library: the STM32F103C8T6 by STMicroelectronics, the STM32F030C8T6 by STMicroelectronics, the STM32G070CBT6 by STMicroelectronics and the STM32G030C8T6 by STMicroelectronics. Check their datasheets: a part that fits the footprint may still differ in its ratings.

Which open-source boards use the ATMEGA4809-AF?

22 boards in 20 repositories on GitHub; the most starred are listed on this page, with their KiCad files.

ATMEGA4809-AF

Overview

Symbol

Footprint

From the datasheet

What it is and has

Specifications

Parameters

Order codes

Pinout

Open-source boards using it

PoE Ethernet GPIB Adapter

Vr65c02-v1

Christmas banana synth

Logic

MGC module

Dnd keeb

NanoEvery Replica

WingBoard

Show this part on your page

Questions

Is there a KiCad symbol and footprint for the ATMEGA4809-AF?

What package is the ATMEGA4809-AF?

Where is the ATMEGA4809-AF datasheet?

Where can I order the ATMEGA4809-AF?

What can replace the ATMEGA4809-AF?

Which open-source boards use the ATMEGA4809-AF?

Parts like it

STM32F103C8T6

STM32F030C8T6

STM32G070CBT6

STM32G030C8T6

GD32F303CCT6

GD32F103C8T6

STM32F030C6T6

STM32L051C8T6