
Acquisition board
open-ephys/oe-acquisition-board-gen3
3rd Generation Open Ephys USB Acquisition Board

The DMN63D8L is a MOSFET made by Diodes Incorporated in a SOT-23 package with 3 pins. -55℃~+150℃ 1 N-channel 1.5V 2.2pF 23.2pF 30V 350mA 3pF 4.5Ω@4V 520mW 900pC@10V SOT-23 MOSFETs ROHS.
PCBKit's library has its KiCad symbol (Pinmap_Generic:Q_NMOS_1G_2S_3D, from PCBKit's generic symbols) and its footprint (Package_TO_SOT_SMD:SOT-23, from KiCad's library), ready for a KiCad board. 4,792 are in stock at JLCPCB (part C338876). 3 open-source boards in 3 repositories on GitHub use it.
| Parameter | Conditions | As printed | Page |
|---|---|---|---|
| Drain-Source Voltage VDSS | TA = +25°C | max 30 V | 2 |
| Gate-Source Voltage VGSS | TA = +25°C; ±20 V | min -20 · max 20 V | 2 |
| Continuous Drain Current (Note 6) VGS = 10V ID | Steady State, TA = +25°C; Note 6 mounting | max 350 mA | 2 |
| Continuous Drain Current (Note 6) VGS = 10V ID | Steady State, TA = +70°C; Note 6 mounting | max 280 mA | 2 |
| Continuous Drain Current (Note 6) VGS = 10V ID | t<5s, TA = +25°C; Note 6 mounting | max 400 mA | 2 |
| Continuous Drain Current (Note 6) VGS = 10V ID | t<5s, TA = +70°C; Note 6 mounting | max 310 mA | 2 |
| Pulsed Drain Current (10us Pulse, Duty Cycle = 1%) (Note 6) IDM | TA = +25°C; Note 6 mounting | max 1.2 A | 2 |
| Total Power Dissipation (Note 5) PD | TA = +25°C; FR-4 PCB with minimum recommended pad layout | max 350 mW | 2 |
| Thermal Resistance, Junction to Ambient (Note 5) RθJA | Steady State, TA = +25°C; FR-4 PCB with minimum recommended pad layout | max 359 °C/W | 2 |
| Total Power Dissipation (Note 6) PD | TA = +25°C; 1” x 1” FR-4 PCB with high coverage 2oz. Copper, single sided | max 520 mW | 2 |
| Thermal Resistance, Junction to Ambient (Note 6) RθJA | Steady State, TA = +25°C; 1” x 1” FR-4 PCB with high coverage 2oz. Copper, single sided | max 243 °C/W | 2 |
| Operating and Storage Temperature Range TJ, TSTG | min -55 · max 150 °C | 2 | |
| Drain-Source Breakdown Voltage BVDSS | TA = +25°C, VGS = 0V, ID = 250uA; Note 7 | min 30 V | 2 |
| Zero Gate Voltage Drain Current IDSS | TA = +25°C, VDS = 30V, VGS = 0V; Note 7 | max 1 uA | 2 |
| Gate-Source Leakage IGSS | TA = +25°C, VGS = ±20V, VDS = 0V; maximum magnitude ±10.0 uA; Note 7 | max 10 uA | 2 |
| Gate Threshold Voltage VGS(TH) | TA = +25°C, VDS = VGS, ID = 250uA; Note 7 | min 0.8 · max 1.5 V | 2 |
| Static Drain-Source On-Resistance RDS(ON) | TA = +25°C, VGS = 10.0V, ID = 250mA; Note 7 | max 2.8 | 2 |
| Static Drain-Source On-Resistance RDS(ON) | TA = +25°C, VGS = 5.0V, ID = 250mA; Note 7 | max 3.8 | 2 |
| Static Drain-Source On-Resistance RDS(ON) | TA = +25°C, VGS = 4.5V, ID = 250mA; Note 7 | max 4.2 | 2 |
| Static Drain-Source On-Resistance RDS(ON) | TA = +25°C, VGS = 4.0V, ID = 250mA; Note 7 | max 4.5 | 2 |
| Static Drain-Source On-Resistance RDS(ON) | TA = +25°C, VGS = 2.5V, ID = 10mA; Note 7 | max 13 | 2 |
| Forward Transconductance gFS | TA = +25°C, VDS = 10V, ID = 0.115A; Note 7 | min 80 mS | 2 |
| Diode Forward Voltage VSD | TA = +25°C, VGS = 0V, IS = 115mA; Note 7 | typ 0.8 · max 1.2 V | 2 |
| Input Capacitance Ciss | TA = +25°C, VDS = 25V, VGS = 0V, f = 1.0MHz; Note 8 | typ 23.2 pF | 2 |
| Output Capacitance Coss | TA = +25°C, VDS = 25V, VGS = 0V, f = 1.0MHz; Note 8 | typ 3 pF | 2 |
| Reverse Transfer Capacitance Crss | TA = +25°C, VDS = 25V, VGS = 0V, f = 1.0MHz; Note 8 | typ 2.2 pF | 2 |
| Gate Resistance RG | TA = +25°C, VDS = 0V, VGS = 0V, f = 1.0MHz; Note 8 | typ 79.9 | 2 |
| Total Gate Charge VGS = 10V Qg | TA = +25°C, VGS = 10V, VDS = 30V, ID = 150mA; Note 8 | typ 0.9 nC | 2 |
| Total Gate Charge VGS = 4.5V Qg | TA = +25°C, VGS = 4.5V, VDS = 30V, ID = 150mA; shared test-condition block prints VGS = 10V; Note 8 | typ 0.4 nC | 2 |
| Gate-Source Charge Qgs | TA = +25°C, VGS = 10V, VDS = 30V, ID = 150mA; Note 8 | typ 0.1 nC | 2 |
| Gate-Drain Charge Qgd | TA = +25°C, VGS = 10V, VDS = 30V, ID = 150mA; Note 8 | typ 0.2 nC | 2 |
| Turn-On Delay Time tD(ON) | TA = +25°C, VDD = 30V, ID = 0.115A, VGEN = 10V, RGEN = 25; Note 8 | typ 2.3 ns | 2 |
| Turn-On Rise Time tR | TA = +25°C, VDD = 30V, ID = 0.115A, VGEN = 10V, RGEN = 25; Note 8 | typ 3.9 ns | 2 |
| Turn-Off Delay Time tD(OFF) | TA = +25°C, VDD = 30V, ID = 0.115A, VGEN = 10V, RGEN = 25; Note 8 | typ 11.4 ns | 2 |
| Turn-Off Fall Time tF | TA = +25°C, VDD = 30V, ID = 0.115A, VGEN = 10V, RGEN = 25; Note 8 | typ 16.7 ns | 2 |
| Pin | Name | Type |
|---|---|---|
| 1 | G | Input |
| 2 | S | Passive |
| 3 | D | Passive |

open-ephys/oe-acquisition-board-gen3
3rd Generation Open Ephys USB Acquisition Board

ECE49022Team22/delivery-robot-pcb
Delivery robot KiCad PCB project and reusable 3.3 V LDO module

<iframe src="https://pcbkit.io/embed/parts/diodes/DMN63D8L" title="DMN63D8L in PCBKit" width="100%" height="480" style="border:0;border-radius:12px" allow="fullscreen" loading="lazy"></iframe><img src="https://pcbkit.io/embed/parts/diodes/DMN63D8L.jpg" alt="DMN63D8L" width="1200" height="900">[](https://pcbkit.io/parts/diodes/DMN63D8L)Yes. The symbol is Pinmap_Generic:Q_NMOS_1G_2S_3D and the footprint Package_TO_SOT_SMD:SOT-23, both drawn on this page. PCBKit places them on a board for you when you design with it.
SOT-23, with 3 pins. Its footprint is drawn on this page.
Diodes Incorporated publishes it: the Datasheet link on this page opens it.
JLCPCB lists it as part C338876, with 4,792 in stock; the sellers' links on this page open their listings.
Parts like it in the library: the AO3400 by GOODWORK, the AO3400A by Alpha & Omega Semiconductor, the 2N7002K by Diodes Incorporated and the AO3400A by UMW. Check their datasheets: a part that fits the footprint may still differ in its ratings.
3 boards in 3 repositories on GitHub; the most starred are listed on this page, with their KiCad files.