4 layers55 × 42 mm
4 layers52.8 × 43.9 mm
Ddracula
WEEE-Open/arancinaDDR SDRAM hardware testing tool
- Size
- 52.8 × 43.9 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 72
- Nets
- 148
- Pads
- 402
- Tracks, vias
- 4,626, 104
- Pours
- 3
- Routed
- Yes
- KiCad
- KiCad 6 (file 20211014)
- Created
- 6 Apr 2023
- Updated
- 6 Apr 2023
Overview
Ddracula is an open-source printed circuit board by WEEE-Open, from the WEEE-Open/arancina repository on GitHub, published under the CERN-OHL-W-2.0 licence. It is a 4-layer board of 52.8 × 43.9 mm with 72 parts on 148 nets, routed with 4,626 tracks and 104 vias.
Its parts include 42 resistors, 18 capacitors, 7 ICs and 2 connectors.
README
README.mdArancina
The Arancina (Autonomous RAM ANalysis CIrcuit for Not-broken Arrays) is a FPGA-based tool for testing the functionality of a DDR RAM, checking its characteristics and operating status through a series of test procedures.
The first prototype is built upon a Terasic DE0-Nano board, connected to an external DDR memory chip through a custom shield (DDRacula), and using an LCD display and a bunch of buttons as user interface.
The tool is still under heavy development and not ready for use.
Parts
72| Qty | Value | Footprint | References |
|---|---|---|---|
| 42 | 24 | Resistor_SMD:R_0402_1005Metric | R1, R2, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23 +26 |
| 14 | 100n | Capacitor_SMD:C_0402_1005Metric | C1, C2, C3, C4, C5, C6, C7, C8, C14, C15, C16, C17, C18, C19 |
| 4 | RU_38_ADI | ADG3247BRUZ:ADG3247BRUZ | U5, U6, U7, U8 |
| 2 | 4.7u | Capacitor_SMD:C_0805_2012Metric | C10, C11 |
| 2 | Conn_02x13_Odd_Even | Connector_PinSocket_2.54mm:PinSocket_2x13_P2.54mm_Vertical | J1, J2 |
| 1 | 220u | Capacitor_SMD:C_1206_3216Metric | C13 |
| 1 | 47u | Capacitor_SMD:C_0805_2012Metric | C12 |
| 1 | AP2114H-2.5 | Package_TO_SOT_SMD:SOT-223 | U2 |
| 1 | LP2995_SOIC8_VSSOP8 | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | U3 |
| 1 | Logo_Open_Hardware_Small | Symbol:OSHW-Logo_5.7x6mm_SilkScreen | LOGO3 |
| 1 | NT5DS32M16CS | Zubyte_Package_SO:TSOP-II-66_22.2x10.16mm_P0.8mm | U1 |
| 1 | WEEE_Open | Zubyte_Logos:Logo_WO_First_Letter | LOGO1 |
| 1 | Zubyte | Zubyte_Logos:Logo_Zubyte | LOGO2 |
Questions
How big is the Ddracula PCB?
It measures 52.8 × 43.9 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Ddracula use?
72 parts. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Ddracula KiCad files?
From the WEEE-Open/arancina repository on GitHub, at the commit this page was made from: the board is pcb/ddracula/ddracula.kicad_pcb and its schematic pcb/ddracula/ddracula.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Ddracula design in my own project?
Its repository publishes it under the CERN-OHL-W-2.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).
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