

Placard
PLA computer
- Size
- 290 × 215 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 187
- Nets
- 385
- Pads
- 1,522
- Tracks, vias
- 6,864, 540
- Pours
- 1,026
- Routed
- Yes
- KiCad
- KiCad 9.0 (file 20241229)
- Created
- 9 Sep 2026
- Updated
- 7 Nov 2026
Overview
Placard is an open-source printed circuit board by tocksin, from the tocksin/placard repository on GitHub, published under the AGPL-3.0 licence. It is a 4-layer board of 290 × 215 mm with 187 parts on 385 nets, routed with 6,864 tracks and 540 vias.
It is built around the ATF22V10C-7PX, SN74F541N and DM1AA-SF-PEJ(82), with the SN74F377AN, CD74ACT273E and CD74HCT377E among its other parts. Its parts include 60 resistors, 40 capacitors, 34 ICs, 19 diodes and 12 connectors. It belongs with the FPGA and CPLD boards of this library.
Main components
12ATF22V10C-7PX
PDIP-245V EEPLD PDIP-24 Programmable Logic Device (CPLDs/FPGAs) ROHSMicrochip TechnologyProgrammable Logic Device (CPLDs/FPGAs)SN74F541N
PDIP-200℃~+70℃ 1 15mA 3.3ns@5V,50pF 4.5V~5.5V 55mA 64mA 74F 8 Tri-State Unidirectional PDIP-20 Buffers, Drivers, Receivers, Transceivers ROHSTexas InstrumentsBuffers, Drivers, Receivers, TransceiversDM1AA-SF-PEJ(82)
SMD-25℃~+85℃ 2.9mm Connector and Ejector Push-Push Standard SD Card With Locating Pins Yes SMD SD Card / Memory Card Connector ROHSHirose ElectricSD Card / Memory Card ConnectorSN74F377AN
PDIP-200℃~+70℃ 1 125MHz 1mA 20mA 4.5V~5.5V 72mA 74F Series 8 9ns@5V,50pF D-Type Rising Edge PDIP-20 Flip Flops ROHSTexas InstrumentsFlip FlopsCD74ACT273E
PDIP-20-55℃~+125℃ 1 10pF 13.5ns@5V,50pF 24mA 24mA 4.5V~5.5V 74ACT Series 8 85MHz 8uA Asynchronous D-Type Push-Pull Reset Rising Edge PDIP-20 Flip Flops ROHSTexas InstrumentsFlip FlopsCD74HCT377E
PDIP-20-55℃~+125℃ 1 10pF 38ns@4.5V,50pF 4.5V~5.5V 4mA 4mA 50MHz 74HCT Series 8 8uA D-Type Rising Edge PDIP-20 Flip Flops ROHSTexas InstrumentsFlip FlopsMCP1700-3302E/TO
TO-92-3-40℃~+125℃@(Tj) 1 250mA 3.3V 350mV@(250mA) 44dB@(1kHz) 4uA 6V Fixed Over Temperature Protection、Short Circuit Protection Positive TO-92-3 Voltage Regulators - Linear, Low Drop Out (LDO) Regulators ROHSMicrochip TechnologyVoltage Regulators - Linear, Low Drop Out (LDO) RegulatorsSN74HCT574N
PDIP-20-40℃~+85℃ 1 3pF 4.5V~5.5V 40MHz 47ns@5.5V,150pF 6mA 6mA 74HCT Series 8 8uA D-Type Rising Edge PDIP-20 Flip Flops ROHSTexas InstrumentsFlip FlopsFG28X7R1H104KNT00
插件,P=5mm100nF 50V 5mm X7R ±10% Plugin,P=5mm Multilayer Ceramic Capacitors MLCC - Leaded ROHSTDKMultilayer Ceramic Capacitors MLCC - Leaded1N5817-TP
DO-41-55℃~+125℃ 1 Independent 1A 1mA@20V 20V 30A 450mV@1A DO-41 Schottky Diodes ROHSMicro Commercial ComponentsSchottky DiodesMFR-25FBF52-47R
插件,D2.4xL6.3mm-55℃~+155℃ 250mW 47Ω Metal Film Resistor ±1% ±100ppm/℃ Plugin,D2.4xL6.3mm Through Hole Resistors ROHSYAGEOThrough Hole ResistorsMFR-25FBF52-2K
插件,D2.4xL6.3mm-55℃~+155℃ 250mW 2kΩ Metal Film Resistor ±1% ±100ppm/℃ 插件,D2.4xL6.3mm Through Hole Resistors ROHSYAGEOThrough Hole Resistors
README
kicad/README.mdKiCad project
The Placard schematic and PCB layout, one KiCad project (made in the KiCad 7 file format, so KiCad 7, 8 and 9 all open it; a newer KiCad upgrades the files when it saves them).
| File | What it is |
|---|---|
placard.kicad_pro | the project; open this in KiCad |
placard.kicad_sch | the schematic's root sheet (A3): one box per sheet, laid out like the block diagram |
power.kicad_sch ... expansion.kicad_sch | the ten sheets (power and clock, control, PC and address mux, ALU and registers, data bus, memory and I/O decode, video timing, video and audio out, shared port, expansion slots), docs/hardware/SCHEMATIC_PLAN.md |
cartridge_64k/ | the 64K ROM cartridge (5 chips), its own project (cartridge_64k.kicad_pro, one sheet and a placed, unrouted 2-layer board), using the same lib/ |
cartridge_32k/ | the 32K ROM cartridge (3 chips), its own project (cartridge_32k.kicad_pro, one sheet and a placed, unrouted 2-layer board), using the same lib/; mounting hole H1 at the same place as on the 64K board |
placard.kicad_pcb | the board: 4 layers (F.Cu, In1.Cu = GND, In2.Cu = VCC, B.Cu) |
lib/placard.kicad_sym | PLD symbols: ATF22V10C (generic) and one ATF22V10C_<name> per .pld file, with its pin names |
lib/placard_parts.kicad_sym | other project symbols: AS7C256C SRAM, Expansion_Slot, Cartridge_Slot, SNES_Pad_Socket, PS2_Dual_Stacked, USB_C_Power |
lib/placard_std.kicad_sym | copies of the stock KiCad symbols the sheets use (74xx, R, C, D, connectors, regulator, the cartridge EEPROM 28C256, and the power symbols +5V, GND, +3V3, GNDA, PWR_FLAG) with larger pin text, written by src/scripts/gen_kicad_std.py |
lib/placard.pretty/ | project footprints: the main board's connectors and switches (preliminary, written by src/scripts/gen_kicad_connectors.py), and kit versions of KiCad's DIP socket footprints (DIP-nn_..._Socket_Puller: chip-puller room on User.Eco1, part number in silkscreen) and of the axial resistor (..._Value: value in silkscreen), written by src/scripts/gen_kicad_kit_footprints.py, and copies of the KiCad 9.0.6 footprints the boards use (capacitors, diodes, LED, pin header, oscillator, TO-92, SIP resistor array, mounting holes, net tie; KiCad 9 format), written by src/scripts/gen_kicad_stock_footprints.py |
lib/placard.3dshapes/ | 3D models (STEP) for the connectors, switches and polyfuse, named after their footprints and referenced as ${KIPRJMOD}/lib/placard.3dshapes/..., so they show in any KiCad version without a 3D library path; written by src/scripts/gen_kicad_3d_models.py (CadQuery), which also copies in KiCad's own models for SW2, J7 and J13, and KiCad's models for the stock, socket and resistor footprints, copied by src/scripts/gen_kicad_stock_footprints.py |
sym-lib-table, fp-lib-table | point KiCad at the project libraries |
fab/ | Gerbers, drill files, BOM and placement files for a board order |
The board is 290 x 215 mm (290 wide, the keyboard's width; 215 deep, so kit
builders have room), 4 layers, with the
outline, dimensions, user connectors, cartridge slot, expansion slots,
and mounting holes placed by src/scripts/gen_kicad_pcb.py
(run with python3.12, which KiCad 7's Python module is built for; --png
also draws docs/hardware/placard_board_layout.png).
The back edge carries USB-C power, audio line out, VGA and the stacked PS/2;
the left side the power switch, reset button and SD card; the right side
the two SNES ports. The cartridge and the four expansion cards stand up
through the case top at the back, behind the keyboard, which lies over
the front 65 mm. Rerunning the script moves only the parts it places.
It also places every other part as a fit test, unrouted
(docs/hardware/placard_placement.png): six rows of
socketed chips 35 mm apart, spread across the width, every DIP on KiCad's
_Socket footprint with 2.5 mm of chip-puller room clear past each socket
end, Cn 1 mm beside Un, and the script reports courtyard overlaps
(KiCad DRC) and puller-room conflicts.
The footprints KiCad has no part for (cartridge slot, expansion slots,
PS/2, SNES, the two switches) are written by
src/scripts/gen_kicad_connectors.py from typical dimensions and are
preliminary: check their holes against the datasheets before ordering.
Their 3D models (src/scripts/gen_kicad_3d_models.py, picture in
docs/hardware/connector_3d_models.png) are drawn at typical
dimensions too, with the leads put on the footprint pads. J4 (SD), J7 (VGA),
F1 and SW2 use project copies of KiCad's footprints (placard: library) only so
they can point at the project's models; the pads are KiCad's.
The schematic rules (which chips go on which sheet, numbering, and how
the sheets are drawn) are in docs/hardware/SCHEMATIC_PLAN.md. Parts and U-numbers come from
docs/architecture/CHIPS.md; the PLD pinouts come from the .pld files
in src/.
Every part carries Manufacturer and MPN fields (empty where no part number
is chosen yet), set from the MPN table in src/scripts/gen_kicad_schematic.py,
so KiCad's BOM export lists them. src/scripts/gen_bom.py writes one grouped
bill of materials per assembly (main board, 64K and 32K cartridges, case),
indexed in docs/bom/BOM.md, each as .md and .csv, including the
bare PCBs, sockets, shells and screws that are not on the schematic.
Backups, autosaves, lock files, *.kicad_prl (per-user view settings) and
fp-info-cache are git-ignored.
PLD symbols
src/scripts/gen_kicad_symbols.py writes lib/placard.kicad_sym from the
PIN statements in src/pld/*.pld; rerun it after changing a PLD's pins
(it overwrites the whole library). The pins are placed for the schematic,
not in pin-number order: the script's LAYOUT table puts inputs on the
left and outputs on the right, buses together in bit order, and each
function's pins in their own group. Where one PLD does two unrelated jobs
(the audio PLD's /AC_SEL, the port PLD's pad read, the memory control's
RUN input) a dashed line across the box separates them. Active-low pins are
/NAME, VCC (24) is on top and GND (12) underneath, unused pins are nc
(no-connect type), and the .pld file name is under the part number. The
script stops if a .pld's pins and its LAYOUT entry no longer match.
Each symbol has the footprint Package_DIP:DIP-24_W7.62mm and the
ATF22V10C datasheet link.
Other symbols
src/scripts/gen_kicad_parts.py writes lib/placard_parts.kicad_sym, in
the same style, for the parts KiCad's libraries do not have: the AS7C256C
SRAM, the expansion slot (Molex 87715-9106 as the cartridge slot, contacts A1-A32 and B1-B32)
and the cartridge slot (Molex 87715-9106, 2 x 32 keyed, contacts A1-A32
and B1-B32), as in EXPANSION.md, with the +5 V and GND contacts stacked on
one pin each, the SNES pad socket (IO.md) and
USB_C_Power, the 5 V input: a power-only 6-contact USB-C receptacle
(GCT USB4125, footprint placard:USB_C_Receptacle_GCT_USB4125_6P_HandSolder:
KiCad's USB4125 footprint with the SMD pads 1.5 mm longer for the iron, made by gen_kicad_connectors.py)
with a 5.1k resistor from CC1 and from CC2 to GND so a charger gives 5 V. Make
changes in the script, since rerunning it overwrites the library.
Every symbol, footprint and 3D model the sheets and boards use is in lib/
(since 2026-10-26): the projects' library tables list only the placard
libraries, so the project opens the same on any PC and DRC/ERC find nothing
missing or different from its library. The parts below started as KiCad
library parts and are used through their copies in placard_std and
placard.pretty:
| Part | KiCad symbol |
|---|---|
| SN74F377AN | 74xx:74LS377 |
| SN74F541N | 74xx:74LS541 |
| CD74ACT273E | 74xx:74HC273 |
| SN74HCT574N | 74xx:74HCT574 |
| 25.175 MHz oscillator | Oscillator:ACO-xxxMHz |
| 3.3 V regulator (MCP1700-3302E/TO) | Regulator_Linear:MCP1700x-330xxTO |
| VGA | Connector:DE15_Receptacle_HighDensity_MountingHoles |
| SD socket | Connector:SD_Card |
| Audio line out | Connector_Audio:AudioJack3 |
| Pull-up arrays | Device:R_Network08 |
Set the Value to the real part number when placing them.
src/scripts/render_kicad_symbols.py OUTDIR draws all of these as PNG
review sheets (needs kicad-cli, cairosvg and Pillow).
Schematic sheets
src/scripts/gen_kicad_schematic.py writes all the .kicad_sch files
(main board and cartridge) from its pin-by-pin net lists, so change a
connection there and rerun it; a hand edit in KiCad is lost at the next
run. Nets with two or more pins on a sheet are wired by the small router in
src/scripts/kicad_route.py, and numbered groups (D0-D7, ...) are drawn
as one bus per sheet (docs/hardware/SCHEMATIC_PLAN.md, "How the sheets are drawn").
--check compares KiCad's exported netlist with the script's nets and
runs basic electrical checks; the full ERC needs KiCad 8 or newer (open the
project, Inspect > Electrical Rules Checker). PDFs of both are in
../schematics/.
Dimension drawing
../docs/hardware/placard_main_dimensions.pdf
is a three-sheet mm drawing of the main board: outline and mounting holes,
edge connector positions, and the expansion card and cartridge space. It is
made by src/scripts/gen_board_dimensions.py, which needs KiCad 9 (pcbnew
Python and kicad-cli). The script never writes placard.kicad_pcb: it
adds KiCad dimension objects on Dwgs.User in temporary copies and plots
those, so rerun it after the layout changes.
Parts
187| Qty | Value | Footprint | References |
|---|---|---|---|
| 34 | 100n | placard:C_Disc_D5.0mm_W2.5mm_P5.00mm | C1, C2, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23 +18 |
| 20 | ATF22V10C-7PX | placard:DIP-24_W7.62mm_Socket_Puller | U1, U2, U3, U4, U5, U10, U11, U12, U13, U14, U15, U16, U17, U35, U38, U42 +4 |
| 11 | 1N5817 | placard:D_DO-41_SOD81_P7.62mm_Horizontal_Pad1.6 | D1, D2, D3, D4, D5, D6, D8, D9, D10, D11, D19 |
| 10 | 47 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R5, R6, R7, R8, R9, R10, R11, R12, R61, R62 |
| 9 | 2k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R23, R24, R25, R26, R27, R28, R29, R30, R31 |
| 8 | 10k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R3, R4, R13, R39, R40, R41, R48, R63 |
| 8 | 1k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R32, R33, R34, R35, R36, R37, R38, R59 |
| 8 | M3 | placard:MountingHole_3.2mm_M3_Pad_Via | H1, H2, H3, H4, H5, H6, H7, H8 |
| 6 | 1N4148 | placard:D_DO-35_SOD27_P7.62mm_Horizontal | D12, D13, D14, D15, D16, D17 |
| 5 | 3.3k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R14, R17, R45, R46, R47 |
| 5 | SN74F377AN | placard:DIP-20_W7.62mm_Socket_Puller | U18, U19, U20, U21, U22 |
| 3 | 1.8k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R42, R43, R44 |
| 3 | 4.7k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R49, R50, R55 |
| 3 | 910 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R56, R57, R58 |
| 3 | SN74F541N | placard:DIP-20_W7.62mm_Socket_Puller | U26, U27, U29 |
| 2 | 1.6k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R15, R18 |
| 2 | 1u | placard:C_Disc_D5.0mm_W2.5mm_P5.00mm | C40, C47 |
| 2 | 220u | placard:CP_Radial_D6.3mm_P2.50mm | C41, C44 |
| 2 | 5.1k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R1, R2 |
| 2 | 820 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R16, R19 |
| 2 | AS7C256C-15PCN | placard:DIP-28_W7.62mm_Socket_Puller | U31, U32 |
| 2 | GND | placard:TestPoint_Keystone_5010-5014_Multipurpose | TP1, TP2 |
| 2 | SNES pad | placard:SNES_Pad_Socket_Horizontal | J2, J3 |
| 1 | +5V | placard:TestPoint_Keystone_5010-5014_Multipurpose | TP3 |
| 1 | 1.43k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R20 |
| 1 | 10k | placard:R_Array_SIP9 | RN1 |
| 1 | 15n C0G | placard:C_Disc_D5.0mm_W2.5mm_P5.00mm | C45 |
| 1 | 2.2 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R22 |
| 1 | 22 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R64 |
| 1 | 22k | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R60 |
| 1 | 22u | placard:C_Disc_D5.0mm_W2.5mm_P5.00mm | C46 |
| 1 | 25.175 MHz | placard:Oscillator_DIP-14 | X1 |
| 1 | 3 A hold | placard:Fuse_Bourns_MF-RG300 | F1 |
| 1 | 3.5 mm | placard:Jack_3.5mm_Tensility_54-00174_Horizontal | J6 |
| 1 | 715 | placard:R_Axial_DIN0207_L6.3mm_D2.5mm_P10.16mm_Horizontal_Value | R21 |
| 1 | AGND tie | placard:NetTie-2_THT_Pad0.3mm | NT1 |
| 1 | ANT11TFHQE | placard:SW_Toggle_CIT_ANT11TFHQE | SW1 |
| 1 | CD74ACT273E | placard:DIP-20_W7.62mm_Socket_Puller | U25 |
| 1 | CD74HCT377E | placard:DIP-20_W7.62mm_Socket_Puller | U23 |
| 1 | CLK tap | placard:NetTie-2_THT_Pad0.3mm | NT2 |
| 1 | J1071CS5VDC.36 | placard:Relay_SPDT_CIT_J107 | K1 |
| 1 | MCP1700-3302E/TO | placard:TO-92_Inline | U40 |
| 1 | Molex 87715-9106 | placard:Molex_87715-9106_PCIe_x4_Vertical | J8 |
| 1 | PLACARD_Logo | placard:PLACARD_Logo | LOGO1 |
| 1 | PS/2 kbd + mouse | placard:PS2_Kycon_KMDGX-6S-6S-S4N | J5 |
| 1 | PTS645VL58-2 LFS | placard:SW_Tactile_SPST_Angled_PTS645Vx58-2LFS | SW2 |
| 1 | RUN | placard:PinHeader_1x02_P2.54mm_Vertical | JP2 |
| 1 | SA5.0A | placard:D_DO-15_P10.16mm_Horizontal | D7 |
| 1 | SD (SPI) | placard:SD_Hirose_DM1AA_SF_PEJ82 | J4 |
| 1 | SN74HCT574N | placard:DIP-20_W7.62mm_Socket_Puller | U36 |
| 1 | STALL | placard:PinHeader_1x02_P2.54mm_Vertical | JP1 |
| 1 | Slot 1 | placard:Molex_87715-9106_Expansion_Slot | J9 |
| 1 | Slot 2 | placard:Molex_87715-9106_Expansion_Slot | J10 |
| 1 | Slot 3 | placard:Molex_87715-9106_Expansion_Slot | J11 |
| 1 | Slot 4 | placard:Molex_87715-9106_Expansion_Slot | J12 |
| 1 | USB4125-GF-A | placard:USB_C_Receptacle_GCT_USB4125_6P_HandSolder | J13 |
| 1 | VGA | placard:DSUB-15-HD_Female_Horizontal_P2.29x1.98mm_EdgePinOffset3.03mm_Housed_MountingHolesOffset4.94mm | J7 |
| 1 | WP7113ID | placard:LED_D5.0mm | D18 |
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Questions
How big is the Placard PCB?
It measures 290 × 215 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Placard use?
187 parts, built around the ATF22V10C-7PX, SN74F541N, DM1AA-SF-PEJ(82) and SN74F377AN. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Placard KiCad files?
From the tocksin/placard repository on GitHub, at the commit this page was made from: the board is kicad/placard.kicad_pcb and its schematic kicad/alu_regs.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Can I use the Placard design in my own project?
Its repository publishes it under the AGPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).