
HEDC B002
Thaddeus-Maximus/dotclock
An ESP32-based alarm clock with a dot matrix LED display, rotary encoder interface, MP3 audio playback, and a web configuration UI.

An ESP32-based alarm clock with a dot matrix LED display, rotary encoder interface, MP3 audio playback, and a web configuration UI.
HEDC B001 is an open-source printed circuit board by Thaddeus-Maximus, from the Thaddeus-Maximus/dotclock repository on GitHub. It is a 2-layer board of 131.1 × 149.9 mm with 70 parts on 105 nets, routed with 129 tracks and 1 via.
It is built around the ESP32-WROOM-32, SN65HVD231DR-JSM and TPS629210DRLR-ET, with the ACS37220LEZATR-100B3, ULN2003ADRG and DRV5033AJQDBZRQ1 among its other parts. Its parts include 18 resistors, 12 switches, 11 capacitors, 9 ICs and 6 connectors. It belongs with the lEDs and displays boards and the ESP32 boards of this library.
An ESP32-based alarm clock with a dot matrix LED display, rotary encoder interface, MP3 audio playback, and a web configuration UI.
The encoder button cycles through modes. The knob adjusts the value for the current mode. After 15 seconds of inactivity, the display returns to time mode.
| Mode | Icon | Knob Action | Notes |
|---|---|---|---|
| Time | (none, full-width HH:MM) | Dismisses alarm if ringing | Default mode |
| Volume | Speaker icon | 0-16 | Plays alarm tone as preview while adjusting |
| Brightness | Bulb icon | 1-24 | |
| Alarm | Bell icon | Adjusts alarm time by 1min (fast: 15min) | Scroll below 00:00 for OFF; defaults to OFF |
| Set Time | Clock icon | Adjusts system clock by 1min (fast: 15min) |
When the alarm is ringing, the display flashes inverted at ~1.4Hz. Press button or turn knob to dismiss.
WiFi AP: dotclock / password dotclock1 / IP 192.168.4.1
HEDC-F001/ — Firmware (ESP-IDF v5.3.1 project)HEDC-B002/ — Hardware (board schematic, see hardware reference below)The HEDC-B002 is an ESP32-based controller board with USB-C programming, SPI LED output (5V level-shifted), a rotary encoder with push button, an audio amplifier, and a 32.768kHz RTC crystal. The crystal, however, doesn't work right, it seems.
| Rail | Source | Regulator |
|---|---|---|
| +5V | USB-C (J1) | Direct from VBUS |
| +3.3V | +5V rail | U4 AMS1117-3.3 (SOT-223) |
| GPIO | Direction | Net Label | Function | Notes |
|---|---|---|---|---|
| IO0 | - | UART_~BOOT | Boot mode select | Auto-reset circuit via Q1. Do not use at runtime. |
| IO1 | TX | UART_TXD | Serial TX to CH340C | USB serial. Directly to J3 header pin alternate. |
| IO3 | RX | UART_RXD | Serial RX from CH340C | USB serial. |
| IO14 | Input | ES1 | Rotary encoder push switch | 5.1kΩ pull-up to 3.3V. Active LOW. |
| IO17 | Output | CS | SPI chip select | 3.3V → 5V via U1 74HCT244 → J3 pin 4 (CS_5V) |
| IO18 | Output | CLK | SPI clock | 3.3V → 5V via U1 74HCT244 → J3 pin 5 (CLK_5V) |
| IO23 | Output | DIN | SPI data out | 3.3V → 5V via U1 74HCT244 → J3 pin 3 (DIN_5V) |
| IO25 | Output | INL | Audio output to amplifier | AC-coupled into PAM8403 left channel input |
| IO26 | Input | EA1 | Rotary encoder channel A | 5.1kΩ pull-up to 3.3V |
| IO27 | Input | EB1 | Rotary encoder channel B | 5.1kΩ pull-up to 3.3V |
| IO32 | - | CRYSTAL_1 | 32.768kHz crystal (XIN) | Y1 CM315D32768DZFT, 22pF load caps (C7, C8) |
| IO33 | - | CRYSTAL_2 | 32.768kHz crystal (XOUT) | Y1 CM315D32768DZFT, 22pF load caps (C7, C8) |
| EN | - | UART_EN | Chip enable | Auto-reset circuit via Q1 + RC timing cap |
| GPIO | Pin # | Notes |
|---|---|---|
| IO2 | 24 | Explicitly no-connect on schematic |
| IO4 | 26 | Available |
| IO5 | 29 | Available (outputs PWM at boot) |
| IO12 | 14 | Available (boot fail if pulled high) |
| IO13 | 16 | Available |
| IO15 | 23 | Available (outputs PWM at boot) |
| IO16 | 27 | Available |
| IO19 | 31 | Available |
| IO21 | 33 | Available |
| IO22 | 36 | Available |
| IO34 | 6 | Available (input only, no pull-up/down) |
| IO35 | 7 | Available (input only, no pull-up/down) |
| SENSOR_VP (IO36) | 4 | Available (input only) |
| SENSOR_VN (IO39) | 5 | Available (input only) |
SOIC-16 USB-UART bridge. Internal oscillator (no external crystal). Connected to USB-C connector J1.
| CH340C Pin | Net | Connects To |
|---|---|---|
| TXD | UART_TXD | ESP32 IO1 (RXD0) |
| RXD | UART_RXD | ESP32 IO3 (TXD0) |
| ~DTR | DTR | Q1 auto-reset circuit |
| ~RTS | RTS | Q1 auto-reset circuit |
| UD+/UD- | USB D+/D- | J1 USB-C connector |
| V3 | - | 100nF decoupling cap (C6) to GND |
Dual NPN transistor (SOT-363) implementing the standard ESP32 auto-programming circuit. Cross-coupled: RTS drives IO0 (BOOT), DTR drives EN, so a DTR/RTS sequence enters the bootloader automatically.
TSSOP-20 octal buffer. Powered from +5V. Converts 3.3V ESP32 SPI signals to 5V for J3 output. Bank 1 active (OE tied to GND), bank 2 active but unused.
| Input (3.3V) | Output (5V) | Signal |
|---|---|---|
| 1A0 ← CS (IO17) | 1Y0 → CS_5V | Chip select |
| 1A1 ← CLK (IO18) | 1Y1 → CLK_5V | Clock |
| 1A2 ← DIN (IO23) | 1Y2 → DIN_5V | Data |
| Pin | Signal |
|---|---|
| 1 | +5V |
| 2 | GND |
| 3 | DIN_5V |
| 4 | CS_5V |
| 5 | CLK_5V |
This is the SPI output for driving an LED matrix or display panel.
Bourns horizontal-mount rotary encoder with push button. All signals pulled up to 3.3V with 5.1kΩ resistors.
| Function | Net | GPIO | Active State |
|---|---|---|---|
| Encoder A | EA1 | IO26 | LOW pulses |
| Encoder B | EB1 | IO27 | LOW pulses |
| Push switch | ES1 | IO14 | LOW when pressed |
SOP-16 class-D stereo amplifier, powered from +5V. Left channel input (INL) driven from ESP32 IO25 through a coupling capacitor. Speaker output on SPK1 header (marked DNP — do not populate).
| Connection | Detail |
|---|---|
| Input | IO25 → coupling cap → INL (pin 7) |
| Output | LOUT+/LOUT- → SPK1 (2-pin header) |
| Power | +5V / GND |
32.768kHz crystal connected to IO32/IO33 with 22pF load capacitors (C7, C8). Provides a precise timebase for RTC functionality.
USB 2.0 Type-C receptacle (14-pin). CC1/CC2 have 5.1kΩ pull-downs (R6, R7) for device identification.
// --- Pin Definitions ---
// SPI LED output (directly usable with hardware SPI: VSPI)
#define PIN_LED_CS 17 // SPI chip select
#define PIN_LED_CLK 18 // SPI clock (VSPI CLK)
#define PIN_LED_DIN 23 // SPI MOSI (VSPI MOSI)
// Rotary encoder (active LOW, external 5.1k pull-ups)
#define PIN_ENC_A 26 // Encoder channel A
#define PIN_ENC_B 27 // Encoder channel B
#define PIN_ENC_SW 14 // Encoder push switch
// Audio output (PWM/DAC → PAM8403 amplifier)
#define PIN_AUDIO 25 // DAC1 output (IO25 is DAC channel 1)
// UART (directly to CH340C — used by USB serial, avoid reassigning)
// #define PIN_TXD0 1
// #define PIN_RXD0 3
// RTC crystal (do not use as GPIO)
// IO32 — XTAL 32.768kHz XIN
// IO33 — XTAL 32.768kHz XOUTdacWrite(25, value) for simple waveforms, or configure I2S for higher quality audio output to the PAM8403.rtc_clk_32k_enable() or the ESP-IDF RTC API.| Qty | Value | Footprint | References |
|---|---|---|---|
| 12 | A161CS12VDC.64 | footprints:RELAY_A161CS12VDC.64 | K1, K2, K3, K4, K5, K6, K7, K8, K9, K10, K11, K12 |
| 10 | 4.7k | Resistor_SMD:R_0805_2012Metric | R1, R2, R3, R7, R8, R9, R11, R15, R26, R27 |
| 5 | , , , , | ||
| 5 | 100nF | Capacitor_SMD:C_0603_1608Metric | C1, C6, C7, C9, C13 |
| 5 | 4.7uF | Capacitor_SMD:C_0805_2012Metric | C2, C3, C5, C10, C12 |
| 3 | 100 | Resistor_SMD:R_0805_2012Metric | R10, R13, R14 |
| 3 | Conn_01x12 | footprints:AT04-12PX-BMXX | J1, J2, J3 |
| 3 | LED | LED_THT:LED_D5.0mm | D6, D7, D8 |
| 2 | 42.2k | Resistor_SMD:R_0805_2012Metric | R6, R17 |
| 2 | CIGT201610LH2R2MNE | footprints:RES_CIGT201610_SAM | L1, L2 |
| 2 | Conn_01x04 | footprints:AT04-4P-BMxx | J5, J6 |
| 2 | S93520 | footprints:S93520 | J_BAT-1, J_BAT+1 |
| 2 | TPS629210DRLR | footprints:SOTFL50P160X60-8N | U2, U6 |
| 2 | ULN2003ADR | footprints:SOIC127P600X175-16N | U4, U5 |
| 1 | 150k | Resistor_SMD:R_0805_2012Metric | R5 |
| 1 | 1M | Resistor_SMD:R_0805_2012Metric | R4 |
| 1 | 680uF | Capacitor_SMD:CP_Elec_10x12.5 | C4 |
| 1 | 80.6k | Resistor_SMD:R_0805_2012Metric | R18 |
| 1 | ACS37220LEZATR-100B3 | footprints:ACS37220LEZATR200B5 | U9 |
| 1 | B340A-13-F | Diode_SMD:D_SMA | D4 |
| 1 | Conn_01x06 | footprints:AT04-6P-BMXX | J7 |
| 1 | DRV5033AJQDBZR | footprints:DBZ0003A-MFG | U1 |
| 1 | ESP32-WROOM-32 | RF_Module:ESP32-WROOM-32 | U3 |
| 1 | SN65HVD231DR | footprints:SOIC127P600X175-8N | U10 |
| 1 | TCA9535PWR | Package_SO:TSSOP-24_4.4x7.8mm_P0.65mm | U11 |
The 69 most common of 70 parts.
It measures 131.1 × 149.9 mm and has 2 copper layers, 1.6 mm thick.
70 parts, built around the ESP32-WROOM-32, SN65HVD231DR-JSM, TPS629210DRLR-ET and ACS37220LEZATR-100B3. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the Thaddeus-Maximus/dotclock repository on GitHub, at the commit this page was made from: the board is HEDC-B001/HEDC-B001.kicad_pcb and its schematic HEDC-B001/HEDC-B001.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Its repository states no licence, so its author keeps all rights: ask Thaddeus-Maximus before reusing the design.

Thaddeus-Maximus/dotclock
An ESP32-based alarm clock with a dot matrix LED display, rotary encoder interface, MP3 audio playback, and a web configuration UI.

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