Rele esp12f

SmartRele · rele-esp12f

Single-channel Wi-Fi relay module based on the ESP-12F (ESP8266) for 110–120 VAC mains.

A 2-layer, 66.5 × 49 mm board that switches a mains load of up to 10 A from an ESP-12F. It is powered directly from the mains through an isolated HLK-PM01 supply and integrates input protection (time-lag fuse and varistor), a 16 A Omron G5RL power relay, status indicators and a programming header. All components sit on the top side, and the board is ready to be ordered fully assembled from JLCPCB (SMD and THT), with no hand soldering.

[!WARNING] This design operates at mains voltage. Assembly, testing and installation must be carried out by qualified people. Read the Safety section before connecting the board.

Table of contents

• Features
• Specifications
• Architecture
• Connectors and pinout
• Repository layout
• Manufacturing and assembly
• Firmware
• First firmware flashing
• Enclosure
• Design verification
• Safety
• Documentation
• License

Features

• ESP-12F with the antenna at the board edge and a copper-free area underneath.
• Omron G5RL-1A-E-HR relay (SPST-NO, 16 A / 250 VAC) with 8 mm coil-to-contact separation (reinforced insulation per the manufacturer).
• Strict mains / low-voltage zoning enforced by custom design rules: 4 mm between mains and low voltage, 2 mm between mains nets. Measured minimum clearance: 4.35 mm.
• Duplicated power path on both sides (2 × 2.5 mm, 35 µm), sized for 10 A with a ~12 °C temperature rise (IPC-2221).
• Input protection: T500mA time-lag fuse (protects the supply) and 07D221K varistor.
• Robust start-up: RC delay on EN and RST, 10 µF + 100 nF decoupling next to the module, and the relay held open during reset.
• Indicators for relay (red) and Wi-Fi (blue); user/boot (GPIO0) and reset push buttons.
• Programming through a 2×3 header powered at 5 V; OTA updates afterwards.
• Complete manufacturing package: Gerbers, drill files, BOM and CPL ready for JLCPCB, with 3D models for every part.
• 3D-printable enclosure, parametric and checked against the 3D model of the assembled board.

Specifications

The full datasheet, with test conditions and the source of each value, is in docs/rele-esp12f_datasheet_user_guide.pdf.

Architecture

 Power      J1:L ──────────► K1 contact (COM → NO) ──────────► J1:OUT ──► load

 Supply     J1:L ── F1 ── L_F ──► PS1 HLK-PM01 ──► +5 V ── U1 AMS1117 ──► +3.3 V ──► U2 ESP-12F
                          RV1 between L_F and N

 Control    +5 V ── K1 coil (D1 flyback diode) ── Q1 SS8050 ── GND
                                                   ▲
                                        GPIO5 (U2) ── R6 1 kΩ

• Mains zone (bottom left): J1, F1, RV1, K1 and the PS1 input.
• Low-voltage zone (right): U1 and its capacitors, relay driver, LEDs, push buttons, J3 and mounting holes. GND planes on both sides, restricted to this zone.
• Top strip: PS1 on the left and the ESP-12F with its antenna on the right edge.

The full schematic is in docs/schematic.pdf.

Connectors and pinout

J1 — Mains terminal block (3 poles, 5.08 mm pitch)

J3 — Programming (2×3 header, 2.54 mm pitch)

 IO0   TX   GND(1)
 RST   RX   5V

Pin 1 (square pad) = GND; pin 2 = 5 V. Labeled on the silkscreen.

ESP-12F

Repository layout

.
├── rele-esp12f.kicad_pro      KiCad 10 project
├── rele-esp12f.kicad_sch      Schematic
├── rele-esp12f.kicad_pcb      PCB layout
├── rele-esp12f.kicad_dru      Custom design rules (mains isolation)
├── 3dmodels/                  STEP models missing from the KiCad library (K1, F1, SW1/SW2)
├── fabrication/               Production package for JLCPCB
│   ├── gerbers/               Gerbers and drill files (Excellon)
│   ├── gerbers_JLCPCB.zip     Gerbers + drill files + CPL, ready to upload
│   ├── BOM_JLCPCB.csv         Bill of materials with LCSC part numbers
│   └── CPL_JLCPCB.csv         Component placement list
├── docs/
│   ├── schematic.pdf
│   ├── rele-esp12f_datasheet_user_guide.pdf
│   ├── pcb_top.png · pcb_bottom.png
│   └── datasheets/            Datasheets of the key components
├── firmware/                  ESP8266 firmware (PlatformIO, Arduino core)
├── enclosure/                 3D-printable enclosure (FreeCAD, STEP, STL)
├── scripts/                   PDF datasheet generator
├── CHANGELOG.md
└── LICENSE

The custom 3D models are referenced through ${KIPRJMOD}/3dmodels/, so the project opens without any extra path configuration.

Manufacturing and assembly

1. Upload fabrication/gerbers_JLCPCB.zip to JLCPCB (2 layers, 1.6 mm).
2. Enable PCB Assembly (top side) and upload BOM_JLCPCB.csv and CPL_JLCPCB.csv.
3. Before paying, check in the JLCPCB viewer that:
   • U2 and K1 sit on their pads;
   • the J1 wire entry faces the board edge;
   • J3 pin 1 lands on the square pad (GND);
   • every BOM line has a part selected.

THT parts are wave-soldered. The CPL uses the pad center (JLCPCB convention), not the body center; for U2 and K1 they differ. The drill holes of J1 (Ø1.5 mm) and RV1 (Ø1.0 mm) are matched to the actual parts.

Power and THT components

The full list is in the BOM.

Regenerating the production files

With kicad-cli (KiCad 10), from the repository root:

kicad-cli pcb export gerbers --layers F.Cu,B.Cu,F.SilkS,B.SilkS,F.Mask,B.Mask,F.Paste,Edge.Cuts -o fabrication/gerbers/ rele-esp12f.kicad_pcb

kicad-cli pcb export drill --format excellon --excellon-units mm --excellon-separate-th --excellon-zeros-format decimal -o fabrication/gerbers/ rele-esp12f.kicad_pcb

kicad-cli pcb render --side top -w 1592 -h 904 --background opaque --quality basic --zoom 0.9954 -o docs/pcb_top.png rele-esp12f.kicad_pcb

kicad-cli pcb render --side bottom -w 1592 -h 904 --background opaque --quality basic --zoom 0.9954 -o docs/pcb_bottom.png rele-esp12f.kicad_pcb

These explicit options are needed because the plot settings stored in the board produce .gbr extensions and an unnecessary B.Paste layer. The ZIP contains the 11 files in fabrication/gerbers/ plus CPL_JLCPCB.csv.

Firmware

The firmware/ folder holds the board's own firmware (PlatformIO, Arduino core for ESP8266). In this version the relay is controlled over Wi-Fi only, from a built-in web page or a JSON REST API:

• manual on / off;
• state-change timer (turn on, off or toggle after 1 s – 7 days);
• cyclic ON/OFF routine (on for one period, off for another, repeated);
• up to 16 weekly schedules synchronised over NTP, with a configurable time zone.

On first boot it opens the SmartRele-XXXXXX setup access point; holding SW1 for 8 s erases the Wi-Fi settings. Setup, behaviour, API and security notes are in firmware/README.md.

First firmware flashing

1. Disconnect the board from mains.
2. Connect a USB-serial adapter with 3.3 V logic to J3: TX↔RX, RX↔TX, GND, and its 5 V (VBUS) output to the 5V pin.
3. Hold SW1 (GPIO0) while pressing and releasing SW2 (RST) to enter flashing mode.
4. Flash the firmware (pio run -e esp12f -t upload from firmware/). Later updates are done over the air (OTA).

J3 is powered at 5 V rather than 3.3 V for two reasons. The internal output-to-input diode of the AMS1117 would make the adapter also feed the 5 V rail. In addition, the 3.3 V pin of a typical adapter cannot supply the current peaks the ESP8266 draws while calibrating its radio.

Third-party firmware also works: the datasheet includes example configurations for Tasmota and ESPHome.

Enclosure

The enclosure/ folder contains a two-part enclosure (base and screwed lid) for 3D printing in PETG or ASA/ABS. It is generated by a parametric FreeCAD script, and its interference with the 3D model of the assembled board is zero. Design, printing and assembly details are in enclosure/README.md.

Design verification

Results with kicad-cli 10.0.5, with all zones refilled:

None of the warnings affects manufacturing. Measured clearances: mains copper ↔ low voltage ≥ 4.35 mm on both sides; mains copper ↔ board edge ≥ 2.0 mm.

Safety

• 110–120 VAC mains. The 07D221K varistor is rated for that voltage. For 230 VAC it must be replaced (e.g. with a 07D471K). F1 is suitable for both voltages.
• The load current does not flow through F1, which only protects the supply. Install a circuit breaker or fuse of ≤ 10 A upstream, dedicated to this output. An on-board fuse would not have enough breaking capacity for a mains short circuit.
• Never connect J3 while the board is connected to mains.
• Mount the board in an insulating enclosure: mains copper is 2 mm from the board edge.
• Use only MH1 and MH2 (low-voltage zone) for metal hardware: M2 screws with a head or washer of Ø ≤ 5 mm.
• The printed enclosure provides mechanical and contact protection, but it is not certified. For a permanent installation, print it in a flame-retardant material or place it inside an approved electrical junction box.

Documentation

The datasheet is regenerated with python scripts/generate_datasheet.py (requires ReportLab, PyMuPDF, Pillow and kicad-cli).

License

Hardware released under the CERN Open Hardware Licence v2 – Weakly Reciprocal (CERN-OHL-W-2.0).

Inspired by aman983/ESP-01S_Relay_Module. This is a new design and contains no files from the original.

© 2026 @techmigue