Sfeeen/PMTleechPMT Leech is especially useful when working with older electronic systems that meet these two conditions: - ✅ The system uses a parallel memory chip (like SRAM or EPROM) - ✅ The CPU operates with an external clock input
PMTLeechv2 is an open-source printed circuit board by Sfeeen, from the Sfeeen/PMTleech repository on GitHub. It is a 2-layer board of 76.2 × 72.6 mm with 68 parts on 94 nets, routed with 429 tracks and 86 vias.
It is built around the TEENSY 4.1. Its parts include 47 resistors, 8 diodes, 5 connectors, 1 IC and 1 transistor. It belongs with the NXP (LPC, Kinetis, i.MX RT) boards of this library.
PMT Leech is a hardware + software tool that lets you monitor live memory accesses from a CPU to an external parallel memory chip.
It streams transactions in real-time, while giving you full control over the system clock — allowing pausing, stepping, and instruction-level debugging.
PMT Leech is especially useful when working with older electronic systems that meet these two conditions:
By attaching PMT Leech to your memory chip (via clipper) and supplying your own clock signal to the CPU:
The CPU will be underclocked (e.g., 8 MHz → 50 kHz). This may affect peripherals like UART:
💡 Many older systems used SRAM for firmware due to speed advantages. PMT Leech lets you read these volatile setups without desoldering.
📧 Contact: svenonderbeke [at] hotmail [dot] com
More info to be added soon.
If you’d like to support the development of PMT Leech, you can donate via Ko-fi:
Current Version: PMT Leech v2
| Qty | Value | Footprint | References |
|---|---|---|---|
| 47 | 330R | Resistor_SMD:R_0603_1608Metric | R1, R2, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21, R22, R23 +31 |
| 8 | LED | LED_SMD:LED_0805_2012Metric | D1, D2, D3, D31, D32, D33, D34, D35 |
| 4 | MountingHole | MountingHole:MountingHole_3.2mm_M3 | H1, H2, H3, H4 |
| 2 | Conn_01x03 | Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical | J1, J2 |
| 1 | Conn_01x07 | Connector_PinHeader_2.54mm:PinHeader_1x07_P2.54mm_Vertical | J3 |
| 1 | Conn_02x16_Counter_Clockwise | bigger_dip_socket_holes:DIP-32_W15.24mm_Socket_LongPads | J5 |
| 1 | Conn_02x16_Counter_Clockwise | clockwise_connectors:PinHeader_2x16_P2.54mm_Vertical_clockwise | J8 |
| 1 | LOGO | LOGO | G*** |
| 1 | LOGO | images:clippers_QR_2 | G*** |
| 1 | Q_PMOS_GSD | Package_TO_SOT_SMD:TSOT-23 | Q2 |
| 1 | Teensy4.1 | teensy.pretty-master:Teensy41 | U1 |
It measures 76.2 × 72.6 mm and has 2 copper layers, 1.6 mm thick.
68 parts, built around the TEENSY 4.1. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
From the Sfeeen/PMTleech repository on GitHub, at the commit this page was made from: the board is hardware_development/PMTLeechv2/PMTLeechv2.kicad_pcb and its schematic hardware_development/PMTLeechv2/PMTLeechv2.kicad_sch. PCBKit opens the board in the browser, with nothing to install.
Its repository states no licence, so its author keeps all rights: ask Sfeeen before reusing the design.
Sfeeen/PMTleech
PMT Leech is especially useful when working with older electronic systems that meet these two conditions: - ✅ The system uses a parallel memory chip (like SRAM or EPROM) - ✅ The CPU operates with an external clock input
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