Sib

SIB-1 sensor-interface board in KiCad

A small 2-layer board, designed in KiCad 7 and broken into four functional stages: (1) reverse-polarity protected 5 V input and 3.3 V LDO, (2) ATmega328P microcontroller with ISP and status LED, (3) ratiometric NTC front end with a Sallen–Key anti-alias filter, (4) I²C temperature sensor, calibration EEPROM, I²C and UART connectors. All symbols and footprints come from a custom library built for the board. The design is described once in src/sib/design.py; Python scripts generate the schematic, library, PCB and outputs with KiCad's own tools, and the tests check KiCad's exported netlist back against that description.

Run

pip install -r requirements.txt   # plus KiCad 7, Java and Freerouting (see requirements.txt)
python3 -m unittest discover -s tests -v
python3 src/run_all.py            # regenerates hardware/ and results/ (about 40 s)

Open hardware/sib.kicad_pro in KiCad 7 or later to inspect or edit the schematic and PCB interactively.

Structure

src/sib/design.py      parts, pin-to-net maps, stages, component-selection notes (single design source)
src/sib/symbols.py     custom symbol library (SIB.kicad_sym)
src/sib/footprints.py  custom footprint library (SIB.pretty) from package land-pattern dimensions
src/sib/schematic.py   hierarchical schematic: root + one sheet per functional stage
src/sib/checks.py      netlist comparison and ERC-style rules
src/sib/pcb.py         pcbnew placement by stage, Freerouting round trip, GND pour, DRC
src/run_all.py         full rebuild, Gerber/drill zip, BOM, renders, summary.json, REPORT.md
hardware/              KiCad project (schematic, PCB, library tables, library)
results/               schematic.pdf, BOM, component selection, DRC report, fabrication zip, plots
tests/                 13 checks

Scope

Design and verification in KiCad only: the board has not been fabricated, assembled or bench-tested. Land patterns use nominal IPC-style dimensions for each package, and the autorouted layout favours completeness over hand-routed quality (see docs/METHOD.md). Companion projects: sensor-frontend-spice-verification (ngspice stage verification) and avr-bringup-firmware-sim (C bring-up firmware, simulated).