Tralala8088homebrew

my_pcxt

A try to make a pc-xt board with SRAM

PC-XT I/O Addresses

PIC 8259 The PC/XT ISA system has one 8259 controller, and the port numbers for configuring it are: Port 0x20: The master PIC's port A Port 0x21: The master PIC's port B

The IBM PC XT uses a single 8259 Programmable Interrupt Controller (PIC) chip that interfaces with the system through the following I/O locations: Ports 20h/0A0h: The command register, which is write only, and the status register, which is read only Ports 21h/0A1h: Corresponds to the slave PIC 8259 – The eCS Dump The BIOS traditionally maps the 8259 PIC's eight interrupt requests (IRQs) to interrupts 8 to 15 (0x08 to 0x0F). The PIC manages hardware interrupt requests in an interrupt driven system environment. When an I/O device requires service, it signals the PIC via one of the PIC's seven interrupt request (IR) input lines. The PIC then activates the INT line, which is connected to the CPU INTR line.

TIMER 8253 On PCs the address for timer0 (chip) is at port 40h..43h and the second timer1 (chip) is at 50h..53h. Port 40h Port 41h Port 42h Port 43h

On x86 PCs, many video card BIOS and system BIOS will reprogram the second counter for their own use. Reprogramming typically happens during video mode changes, when the video BIOS may be executed, and during system management mode and power saving state changes, when the system BIOS may be executed. This prevents any serious alternative uses of the timer's second counter on many x86 systems.

As stated above, Channel 0 is implemented as a counter. Typically, the initial value of the counter is set by sending bytes to the Control, then Data I/O Port registers (the value 36h sent to port 43h, then the low byte to port 40h, and port 40h again for the high byte). The counter counts down to zero, then sends a hardware interrupt (IRQ 0, INT 8) to the CPU. The counter then resets to its initial value and begins to count down again. The fastest possible interrupt frequency is a little over a half of a megahertz. The slowest possible frequency, which is also the one normally used by computers running MS-DOS or compatible operating systems, is about 18.2 Hz. Under these real mode operating systems, the BIOS accumulates the number of INT 8 calls that it receives in real mode address 0040:006c, which can be read by a program.

Parallel Port LPT1: 0x378 (or occasionally 0x3BC) (IRQ 7) LPT2: 0x278 (IRQ 6).

IBM defined three standard port base addresses for the parallel printer port in the IBM PC: Port R/W IOAddr Bits Function: Data Out W Base+0 D0-D7 8 LS TTL outputs Status In R Base+1 S3-S7 5 LS TTL inputs Control Out W Base+2 C0-C3 4 TTL Open Collector outputs Common base addresses for parallel ports include: LPT1: 0x378 (or occasionally 0x3BC) (IRQ 7) LPT2: 0x278 (IRQ 6). A parallel port is a type of interface that allows computers to connect to various peripherals. The most common configuration for a standard parallel port is the Centronics port, which has 25 pins.

PORTS Common I/O Port Addresses

Port addresses are not always constant across PC, AT and PS/2
Unless marked, port addresses are relative to PC and XT only

000-00F  8237 DMA controller
000 Channel 0 address register
001 Channel 0 word count
002 Channel 1 address register
003 Channel 1 word count
004 Channel 2 address register
005 Channel 2 word count
006 Channel 3 address register
007 Channel 3 word count
008 Status/command register
009 Request register
00A Mask register
00B Mode register
00C Clear MSB/LSB flip flop
00D Master clear temp register
00E Clear mask register
00F Multiple mask register


020-02F  8259A Master Programmable Interrupt Controller
020 8259 Command port  (see 8259)

// 060-06F 8042 Keyboard Controller (AT,PS/2) // 060 8042 Keyboard input/output buffer register // 061 8042 system control port (for compatability with 8255) // 064 8042 Keyboard command/status register

070 CMOS RAM/RTC, also NMI enable/disable (AT,PS/2, see RTC)
071 CMOS RAM data  (AT,PS/2)

080 Manufacturer systems checkpoint port (used during POST)
080-090  DMA Page Registers
081 High order 4 bits of DMA channel 2 address
082 High order 4 bits of DMA channel 3 address
083 High order 4 bits of DMA channel 1 address

090-097  POS/Programmable Option Select  (PS/2)
090 Central arbitration control Port
091 Card selection feedback
092 System control and status register
094 System board enable/setup register
095 Reserved
096 Adapter enable/setup register
097 Reserved

0A0 NMI Mask Register (PC,XT) (write 80h to enable NMI, 00h disable)
0A0-0BF  Second 8259 Programmable Interrupt Controller (AT, PS/2)
0A0 Second 8259 Command port  (see 8259)
0A1 Second 8259 Interrupt mask register  (see 8259)

0C0 TI SN76496 Programmable Tone/Noise Generator (PCjr)