2 layers150 × 300 mm
4 layers200 × 50 mm
Memory
pottsali/cpu-pub3Homebrew CPU project
- Size
- 200 × 50 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 77
- Nets
- 177
- Pads
- 647
- Tracks, vias
- 2,689, 468
- Pours
- 2
- Routed
- Yes
- KiCad
- KiCad 5 (file 20171130)
- Created
- 20 Oct 2019
- Updated
- 1 Jul 2020
Overview
Memory is an open-source printed circuit board by pottsali, from the pottsali/cpu-pub repository on GitHub. It is a 4-layer board of 200 × 50 mm with 77 parts on 177 nets, routed with 2,689 tracks and 468 vias.
It is built around the 74LS245SC, 74HCT541D and 74HCT1G32GW, with the 74HCT32D, 74AHC1G08GW and 74AHC1G86SE among its other parts. Its parts include 20 capacitors, 16 ICs, 13 resistors and 13 diodes.
Main components
974LS245SC
-0℃~+70℃ 12ns@5V,45pF 15mA 24mA 4.75V~5.25V 74LS 8 Bidirectional Output enable Schmitt trigger Tri-State - Buffers, Drivers, Receivers, Transceivers ROHSTexas InstrumentsBuffers, Drivers, Receivers, Transceivers
74HCT541D
SO-20-40℃~+125℃ 1 15ns@4.5V,50pF 160uA 4.5V~5.5V 6mA 6mA 74HCT 8 Tri-State Unidirectional SO-20-300mil Buffers, Drivers, Receivers, Transceivers ROHSNexperiaBuffers, Drivers, Receivers, Transceivers
74HCT1G32GW
TSSOP-5-1.3mm-40℃~+125℃ 10ns@4.5V,50pF 2 2 20uA 2V 2mA 2mA 3.7V 4.5V~5.5V 400mV 74HCT 800mV OR Gate Overvoltage-tolerant input TSSOP-5-1.3mm Logic Gates ROHSNexperiaLogic Gates
74HCT32D
SO-14-40℃~+125℃ 2 24ns@4.5V,50pF 2V 2uA 3.7V、4.4V 4 4.5V~5.5V 400mV 4mA 4mA 74HCT Series 800mV OR Gate SOIC-14 Logic Gates ROHSNexperiaGates
74AHC1G08GW
SOT-353-40℃~+125℃ 1 1.5V~3.85V 1.9V~2V、2.9V~3V、3.7V~3.94V、4.4V~4.5V 100mV、360mV~550mV 10nA 2 2V~5.5V 500mV~1.65V 74AHC Series 9.5ns@3.3V,15pF AND Gate Overvoltage-tolerant input StandardCMOS SOT-353 Logic Gates ROHSMDDLogic Gates74AHC1G86SE
SOT-353-40℃~+125℃ 1 1.5V~3.85V 1uA 2V~5.5V 500mV~1.65V 74AHC Series 8.8ns@5V,50pF 8mA 8mA XOR Gate SOT-353 Logic Gates ROHSDiodes IncorporatedLogic Gates74HCT04D
SO-14-40℃~+125℃ 1 19ns@4.5V,50pF 2V 2uA 3.7V 4.5V~5.5V 400mV 4mA 4mA 6 74HCT 800mV SO-14 Inverters ROHSNexperiaInverters
IS61C5128AL-10TLI
TSOPII-44-40℃~+85℃ 10ns 12mA 4.5V~5.5V 4Mbit 55mA Auto power-down function TSOPII-44 SRAM ROHSISSISRAM
25LC512-I/P
PDIP-8-40℃~+85℃ 1,000,000 cycles 2.5V~5.5V 200 Years 20MHz 512Kbit 5ms Hardware write protection function、Built-in power-on reset (POR)、Built-in write enable latch (WEL)、Power-down/Power-up protection circuit SPI PDIP-8 EEPROM ROHSMicrochip TechnologyEEPROM
README
README.mdMUPS/16 Homebrew CPU project
This is public repo for files from the MUPS/16 homebrew CPU project. Please see http://mups16.net for details.
Files
Schematics
Currently I've only uploaded the schematics for the PCBs here, and will add more as I complete the last few bits. Most of the schematics are documented on the MUPS/16 website.
Others
I have a few other sets of files to clean up and upload:
- A gate-level simulation of the whole system in Digital format
- Microcode generation, for the control ROMs
- An assembler
- A very basic monitor to test the system
These are not yet in a fit state to upload, but I will add them as I clean them up.
Parts
77| Qty | Value | Footprint | References |
|---|---|---|---|
| 20 | 100nf | Capacitor_SMD:C_0805_2012Metric | C101, C102, C103, C104, C105, C106, C107, C108, C109, C110, C111, C112, C113, C114, C115, C116 +4 |
| 13 | 4.7K | Resistor_SMD:R_0805_2012Metric | R101, R102, R103, R104, R105, R106, R107, R108, R109, R110, R111, R112, R113 |
| 13 | LED | LED_SMD:LED_0805_2012Metric | D101, D102, D103, D104, DCS101, DCS102, DR106, DRH107, DRL105, DWHE101, DWHO101, DWLE101, DWLO101 |
| 6 | IS61C5128AL-10TLI | Package_SO:TSOP-II-44_10.16x18.41mm_P0.8mm | EVEN0, EVEN1, EVEN2, ODD0, ODD1, ODD2 |
| 3 | 4075 | Package_SO:SOIC-14_3.9x8.7mm_P1.27mm | U106, U107, U109 |
| 3 | 74LS245 | Package_SO:SO-20_12.8x7.5mm_P1.27mm | U113, U114, U115 |
| 3 | Conn_01x02_Male | Connector_PinHeader_2.54mm:PinHeader_1x02_P2.54mm_Vertical | JPWR101, JPWR102, JPWR103 |
| 2 | 25LC512 | Package_SO:SOIC-8_3.9x4.9mm_P1.27mm | SROM0, SROM1 |
| 2 | 74HCT1G32 | Package_SO:TSOP-5_1.65x3.05mm_P0.95mm | U105, U108 |
| 2 | 74HCT32 | Package_SO:SOIC-14_3.9x8.7mm_P1.27mm | U101, U102 |
| 2 | 74HCT4094D,118 | SamacSys_Parts:SOIC127P600X175-16N | IC101, IC102 |
| 1 | 74AHC1G08 | Package_SO:TSOP-5_1.65x3.05mm_P0.95mm | U110 |
| 1 | 74AHC1G86 | Package_SO:TSOP-5_1.65x3.05mm_P0.95mm | U104 |
| 1 | 74HCT04 | Package_SO:SOIC-14_3.9x8.7mm_P1.27mm | U103 |
| 1 | 74HCT541 | Package_SO:SO-20_12.8x7.5mm_P1.27mm | U112 |
| 1 | Conn_01x05_Male | Connector_PinHeader_2.54mm:PinHeader_1x05_P2.54mm_Vertical | JFLAG101 |
| 1 | Conn_01x08_Male | Connector_PinHeader_2.54mm:PinHeader_1x08_P2.54mm_Vertical | JRST101 |
| 1 | Conn_01x16_Male | Connector_PinHeader_2.54mm:PinHeader_1x16_P2.54mm_Vertical | JDATA101 |
| 1 | Conn_01x24_Male | Connector_PinHeader_2.54mm:PinHeader_1x24_P2.54mm_Vertical | JADDR101 |
Questions
How big is the Memory PCB?
It measures 200 × 50 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Memory use?
77 parts, built around the 74LS245SC, 74HCT541D, 74HCT1G32GW and 74HCT32D. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Memory KiCad files?
From the pottsali/cpu-pub repository on GitHub, at the commit this page was made from: the board is schematics/mups16/memory/memory.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Can I use the Memory design in my own project?
Its repository states no licence, so its author keeps all rights: ask pottsali before reusing the design.
More from pottsali/cpu-pub
7- 4 layers150 × 150 mm
- 4 layers200 × 50 mm
- 4 layers100 × 40 mm
- 2 layers200 × 270 mm
- 2 layers88.9 × 47 mm
- 2 layers100 × 75 mm
Similar boards
- 4 layers120.2 × 104.1 mm
- 2 layers368.3 × 215.9 mm
- 2 layers170 × 170 mm
- 2 layers176.5 × 85.1 mm
- 2 layers104 × 69 mm
RC2014-RAM ROM NoBanking
dennisperry/RC2014_PCBs
A group of RC2014 PCBs I've designed to expand my system
39 parts - 2 layers80.8 × 60.1 mm
- 2 layers91.4 × 73.7 mm
SmdPracticeBoard
perriestudios/SMD-Soldering-PCB
A PCB I designed as a TA for EE 201 at UW over the Winter 2024
34 parts1 - 2 layers131.9 × 164.6 mm
