2 layers16 × 43 mm
Nrf24 remote
dragonlock2/kicadboards
Offsite backup for the miscellaneous KiCad boards that don't fit elsewhere
72 parts14Apache-2.0
4 layers75 × 60.6 mm
Op6-jig
kcxt/phone-test-jig9KiCad design for OnePlus 6 (and potentially other) phone test jigs.
- Size
- 75 × 60.6 mm
- Copper layers
- 4
- Thickness
- 1.6 mm
- Parts
- 32
- Nets
- 61
- Pads
- 187
- Tracks, vias
- 612, 75
- Pours
- 2
- Routed
- Yes
- KiCad
- KiCad 5 (file 20171130)
- Created
- 31 Aug 2021
- Updated
- 14 Feb 2022
Overview
Op6-jig is an open-source printed circuit board by kcxt, from the kcxt/phone-test-jig repository on GitHub, published under the GPL-3.0 licence. It is a 4-layer board of 75 × 60.6 mm with 32 parts on 61 nets, routed with 612 tracks and 75 vias.
It is built around the AP2192SG, ATMEGA32U4 and LSF0102YZTR, with the TYPE-C-31-M-12 among its other parts. Its parts include 11 resistors, 7 capacitors, 6 connectors, 3 ICs and 3 diodes. It belongs with the AVR (ATmega, ATtiny) boards of this library.
Main components
4
AP2192SG
SOP-8-40℃~+85℃ 1.5A 120mΩ 2 2.7V~5.5V Active High High Side Switch SOP-8 Power Distribution Switches ROHSDiodes IncorporatedPower Distribution Switches
ATMEGA32U4
UncategorisedUnknown maker
LSF0102YZTR
DSBGA-8-40℃~+125℃ 0V~5V 0V~5V 1 2 Auto Direction Detection Bidirectional Push-Pull、Open-drain DSBGA-8 Translators, Level Shifters ROHSTexas InstrumentsTranslators, Level Shifters
TYPE-C-31-M-12
SMD-30℃~+80℃ 1 10,000 cycles 16P 20V 5A 7.35mm Female Surface Mount, Right Angle Type-C SMD USB Connectors ROHSHRO ElectronicsUSB Connectors
README
README.mdOnePlus 6 Test Jig
The OnePlus 6 test jig is a proof of concept designed to turn the OnePlus 6 into a device which can be used in a board farm!
The PCB contains a header at the top for soldering wires onto test points on the phone, it features an Atmega32u4 which can act as a UART<->USB adapter, an LSF0102 bidirectional logic level voltage translator to convert the UART from the 5v of the Atmega down to the 1.8v of the phone (and vice versa).
The Atmega is also used to simulate button presses on the phone, the volume and power button test pads are normally high and pressed when low. Both of these features can be (though as yet untested) exposed via the same USB port, saving a port on the host and allowing for dirt simple control of the device, to test the inputs as well as perform a hard reset.
Being able to hard reset the board is a requirement for consideration in an automated board farm, this carried some complications on the OnePlus 6 as if you perform a hard reset combination (pressing volume up and power at the same time for 10 seconds) whilst VBUS (USB power) is high it will boot into EDL mode instead, so without a way to control VBUS the device would just be stuck in EDL. This is resolved by using a high-side FQP27P06 MOSFET.
NOTE: Currently waiting for PCB shipment, expect this design to contain bugs.
TODO
- Create a list of minimum hard requirements for a given device to be used as part of the farm
- Add a 12v connector and buck regulator to produce VBAT for devices which support it so that the batteries can be removed.
- Add PHONE_USB passthrough port so that devices without USB test points can still have VBUS be controlled by the atmega
Parts
32| Qty | Value | Footprint | References |
|---|---|---|---|
| 3 | 100nF | Capacitor_SMD:C_0805_2012Metric | C5, C6, C7 |
| 3 | 220 | Resistor_SMD:R_0805_2012Metric | R9, R10, R11 |
| 2 | 10k | Resistor_SMD:R_0805_2012Metric | R4, R7 |
| 2 | 1uF | Capacitor_SMD:C_0805_2012Metric | C1, C4 |
| 2 | 22 | Resistor_SMD:R_0805_2012Metric | R5, R6 |
| 2 | 22pF | Capacitor_SMD:C_0805_2012Metric | C2, C3 |
| 2 | 5.1k | Resistor_SMD:R_0805_2012Metric | R1, R2 |
| 2 | TYPE-C-31-M-12 | Local:HRO_TYPE-C-31-M-12 | J4, J5 |
| 1 | 16MHz | Crystal:Crystal_HC18-U_Vertical | Y1 |
| 1 | 3.3k | Resistor_SMD:R_0805_2012Metric | R3 |
| 1 | 5.6k | Resistor_SMD:R_0805_2012Metric | R8 |
| 1 | AP2192 | Package_SO:SO-8_3.9x4.9mm_P1.27mm | U3 |
| 1 | ATMEGA32U4 | ATmega32U4:ATmega32U4 | U1 |
| 1 | CONN_PHONE_DATA | Connector_PinHeader_2.54mm:PinHeader_1x10_P2.54mm_Vertical | J3 |
| 1 | CONN_PHONE_POWER | Connector_PinHeader_2.54mm:PinHeader_1x03_P2.54mm_Vertical | J6 |
| 1 | JTAG_ATMEGA | Connector_PinHeader_2.54mm:PinHeader_2x05_P2.54mm_Vertical | J2 |
| 1 | LED_B | LED_SMD:LED_1206_3216Metric | D3 |
| 1 | LED_G | LED_SMD:LED_1206_3216Metric | D2 |
| 1 | LED_R | LED_SMD:LED_1206_3216Metric | D1 |
| 1 | LSF0102YZTR | Package_SO:VSSOP-8_2.4x2.1mm_P0.5mm | U2 |
| 1 | PHONE_TP_BREAKOUT | Connector_PinHeader_2.54mm:PinHeader_2x10_P2.54mm_Vertical | J1 |
| 1 | SW_RESET | Button_Switch_THT:SW_PUSH_6mm | SW1 |
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Questions
How big is the Op6-jig PCB?
It measures 75 × 60.6 mm and has 4 copper layers, 1.6 mm thick.
What parts does the Op6-jig use?
32 parts, built around the AP2192SG, ATMEGA32U4, LSF0102YZTR and TYPE-C-31-M-12. The full list of its parts is on this page, with links to each part's symbol and footprint where PCBKit's library has them.
Where can I download the Op6-jig KiCad files?
From the kcxt/phone-test-jig repository on GitHub, at the commit this page was made from: the board is op6-jig.kicad_pcb. PCBKit opens the board in the browser, with nothing to install.
Can I use the Op6-jig design in my own project?
Its repository publishes it under the GPL-3.0 licence: you may reuse it on that licence's terms (keep the author's notice, and for a copyleft licence share your changes alike).